Add extend padding lock flag

 - ITensorInfo's padding cannot be extended if its lock_paddings flag is set to True.

Resolves: COMPMID-5714
Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com>
Change-Id: I6bca9bbf7172822af60562310578c438b9e15f46
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/8875
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: SiCong Li <sicong.li@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>

7 files changed, 75 insertions, 10 deletions

diff --git a/arm_compute/core/ITensorInfo.h b/arm_compute/core/ITensorInfo.h
index c48e6ebf79..1382649e74 100644
--- a/arm_compute/core/ITensorInfo.h
+++ b/arm_compute/core/ITensorInfo.h
@@ -142,6 +142,17 @@ public:
      * @return True if the strides or the offset to the first element have changed.
      */
     virtual bool auto_padding() = 0;
+    /** Set the lock paddings flag of the tensor.
+     * It should be set to True, when the tensor could be mapped to camera or frame buffer.
+     *
+     * @return Reference to this ITensorInfo object
+     */
+    virtual ITensorInfo &set_lock_paddings(bool flag) = 0;
+    /** Get the lock paddings flag value
+     *
+     * @return lock paddings flag value
+     */
+    virtual bool lock_paddings() const = 0;
     /** Update the offset to the first element, the strides and the total size.
      *
      * @note This function can only increase the offset, strides and total size.
diff --git a/arm_compute/core/SubTensorInfo.h b/arm_compute/core/SubTensorInfo.h
index 374ea5b8c6..21703b0d93 100644
--- a/arm_compute/core/SubTensorInfo.h
+++ b/arm_compute/core/SubTensorInfo.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2022 Arm Limited.
+ * Copyright (c) 2017-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -116,7 +116,13 @@ public:
         ARM_COMPUTE_ERROR_ON(_parent == nullptr);
         return _parent->auto_padding();
     };
+
+    ITensorInfo &set_lock_paddings(bool flag) override;
+
+    bool lock_paddings() const override;
+
     bool extend_padding(const PaddingSize &padding) override;
+
     size_t dimension(size_t index) const override
     {
         return _tensor_shape[index];
@@ -256,6 +262,7 @@ private:
     Coordinates     _coords;
     ValidRegion     _valid_region;
     bool            _extend_parent;
+    bool            _lock_paddings;
 };
 } // namespace arm_compute
 #endif /*ARM_COMPUTE_SUBTENSORINFO_H */
diff --git a/arm_compute/core/TensorInfo.h b/arm_compute/core/TensorInfo.h
index 7eb8c52d07..8436407a75 100644
--- a/arm_compute/core/TensorInfo.h
+++ b/arm_compute/core/TensorInfo.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2022 Arm Limited.
+ * Copyright (c) 2016-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -201,6 +201,8 @@ public:
     ITensorInfo &set_data_layout(const DataLayout &data_layout) override;
     ITensorInfo &reset_padding() override;
     bool         auto_padding() override;
+    ITensorInfo &set_lock_paddings(bool flag) override;
+    bool lock_paddings() const override;
     bool extend_padding(const PaddingSize &padding) override;
     size_t dimension(size_t index) const override
     {
@@ -330,6 +332,7 @@ private:
     DataLayout       _data_layout;
     bool             _are_values_constant;
     ITensorInfo::Id  _id;
+    bool             _lock_paddings;
 };
 
 /** Check whether two tensor info are equal.
diff --git a/src/core/SubTensorInfo.cpp b/src/core/SubTensorInfo.cpp
index 3d68331181..723b6bc016 100644
--- a/src/core/SubTensorInfo.cpp
+++ b/src/core/SubTensorInfo.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021 Arm Limited.
+ * Copyright (c) 2017-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -56,12 +56,12 @@ TensorShape extend_parent_shape(TensorShape parent_shape, TensorShape shape, Coo
 } // namespace
 
 SubTensorInfo::SubTensorInfo()
-    : _parent(nullptr), _tensor_shape(), _dims_state(), _coords(), _valid_region{ Coordinates(), _tensor_shape }, _extend_parent(false)
+    : _parent(nullptr), _tensor_shape(), _dims_state(), _coords(), _valid_region{ Coordinates(), _tensor_shape }, _extend_parent(false), _lock_paddings(false)
 {
 }
 
 SubTensorInfo::SubTensorInfo(ITensorInfo *parent, TensorShape tensor_shape, Coordinates coords, bool extend_parent)
-    : _parent(parent), _tensor_shape(tensor_shape), _dims_state(), _coords(coords), _valid_region{ Coordinates(), _tensor_shape }, _extend_parent(extend_parent)
+    : _parent(parent), _tensor_shape(tensor_shape), _dims_state(), _coords(coords), _valid_region{ Coordinates(), _tensor_shape }, _extend_parent(extend_parent), _lock_paddings(false)
 {
     ARM_COMPUTE_ERROR_ON(parent == nullptr);
 
@@ -114,8 +114,20 @@ ITensorInfo &SubTensorInfo::set_tensor_dims_state(const TensorDimsState &state)
     return *this;
 }
 
+ITensorInfo &SubTensorInfo::set_lock_paddings(bool flag)
+{
+    _lock_paddings = flag;
+    return *this;
+}
+
+bool SubTensorInfo::lock_paddings() const
+{
+    return _lock_paddings;
+}
+
 bool SubTensorInfo::extend_padding(const PaddingSize &padding)
 {
+    ARM_COMPUTE_ERROR_ON(_lock_paddings);
     ARM_COMPUTE_ERROR_ON(_parent == nullptr);
     ARM_COMPUTE_ERROR_ON(!_parent->is_resizable());
     ARM_COMPUTE_ERROR_ON(_parent->total_size() == 0);
diff --git a/src/core/TensorInfo.cpp b/src/core/TensorInfo.cpp
index 12f79444c6..954c6c5f1a 100644
--- a/src/core/TensorInfo.cpp
+++ b/src/core/TensorInfo.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2022 Arm Limited.
+ * Copyright (c) 2016-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -35,7 +35,7 @@ namespace arm_compute
 {
 TensorInfo::TensorInfo()
     : _total_size(0), _offset_first_element_in_bytes(0), _strides_in_bytes(), _num_channels(0), _tensor_shape(), _dims_state(), _data_type(DataType::UNKNOWN), _format(Format::UNKNOWN), _is_resizable{ true },
-      _valid_region{ Coordinates(), _tensor_shape }, _padding{ 0 }, _quantization_info(), _data_layout(DataLayout::NCHW), _are_values_constant(true), _id(invalid_tensor_id)
+      _valid_region{ Coordinates(), _tensor_shape }, _padding{ 0 }, _quantization_info(), _data_layout(DataLayout::NCHW), _are_values_constant(true), _id(invalid_tensor_id), _lock_paddings(false)
 {
 }
 
@@ -57,6 +57,7 @@ TensorInfo::TensorInfo(const ITensorInfo &info)
     _data_layout                   = info.data_layout();
     _are_values_constant           = info.are_values_constant();
     _id                            = invalid_tensor_id; // Tensor Id has to be explicitly set, instead of being copied
+    _lock_paddings                 = info.lock_paddings();
 }
 
 TensorInfo::TensorInfo(const TensorInfo &info)
@@ -77,6 +78,7 @@ TensorInfo::TensorInfo(const TensorInfo &info)
     _data_layout                   = info.data_layout();
     _are_values_constant           = info.are_values_constant();
     _id                            = invalid_tensor_id; // Tensor Id has to be explicitly set, instead of being copied
+    _lock_paddings                 = false;
 }
 TensorInfo::TensorInfo(Format format)
     : TensorInfo(TensorShape(), format)
@@ -264,8 +266,20 @@ std::tuple<Strides, size_t, size_t> TensorInfo::calculate_padding_requirements(c
     return std::make_tuple(required_strides, required_offset_first_element, required_total_size);
 }
 
+ITensorInfo &TensorInfo::set_lock_paddings(bool flag)
+{
+    _lock_paddings = flag;
+    return *this;
+}
+
+bool TensorInfo::lock_paddings() const
+{
+    return _lock_paddings;
+}
+
 bool TensorInfo::extend_padding(const PaddingSize &padding)
 {
+    ARM_COMPUTE_ERROR_ON(_lock_paddings);
     ARM_COMPUTE_ERROR_ON(!_is_resizable);
 
     bool updated = false;
diff --git a/tests/validation/UNIT/SubTensorInfo.cpp b/tests/validation/UNIT/SubTensorInfo.cpp
index 5a930620ce..ca5e46550c 100644
--- a/tests/validation/UNIT/SubTensorInfo.cpp
+++ b/tests/validation/UNIT/SubTensorInfo.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020 Arm Limited.
+ * Copyright (c) 2020-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -69,6 +69,7 @@ TEST_CASE(SubTensorCreation, framework::DatasetMode::ALL)
  *  - A) Extend padding when SubTensor XY does not match parent tensor should fail
  *    B) Extend with zero padding when SubTensor XY does not match parent tensor should succeed
  *  - C) Extend padding when SubTensor XY matches parent tensor should succeed
+ *  - D) Set lock padding to true, so that extend padding would fail
  */
 TEST_CASE(SubTensorPaddingExpansion, framework::DatasetMode::ALL)
 {
@@ -95,6 +96,14 @@ TEST_CASE(SubTensorPaddingExpansion, framework::DatasetMode::ALL)
         ARM_COMPUTE_EXPECT(tensor_info.padding().top == 2, framework::LogLevel::ERRORS);
         ARM_COMPUTE_EXPECT(tensor_info.padding().right == 1, framework::LogLevel::ERRORS);
     }
+
+    // Test D
+    {
+        TensorInfo    tensor_info(TensorShape(23U, 17U, 3U), 1, DataType::F32);
+        SubTensorInfo sub_tensor_info(&tensor_info, TensorShape(4U, 3U, 1U), Coordinates(5, 2, 1));
+        sub_tensor_info.set_lock_paddings(true);
+        ARM_COMPUTE_EXPECT_THROW(sub_tensor_info.extend_padding(PaddingSize(2, 1)), framework::LogLevel::ERRORS);
+    }
 }
 
 TEST_SUITE_END() // SubTensorInfo
diff --git a/tests/validation/UNIT/TensorInfo.cpp b/tests/validation/UNIT/TensorInfo.cpp
index 50b26293c9..b79c1e9253 100644
--- a/tests/validation/UNIT/TensorInfo.cpp
+++ b/tests/validation/UNIT/TensorInfo.cpp
@@ -184,8 +184,17 @@ TEST_CASE(SymmPerChannelQuantizationInfo, framework::DatasetMode::ALL)
     ARM_COMPUTE_EXPECT(info.quantization_info().offset().empty(), framework::LogLevel::ERRORS);
 }
 
-TEST_SUITE_END() // TensorInfoValidation
-TEST_SUITE_END()
+/** Validates lock paddings flag*/
+TEST_CASE(SubTensorPaddingExpansion, framework::DatasetMode::ALL)
+{
+    TensorInfo    tensor_info(TensorShape(23U, 17U, 3U), 1, DataType::F32);
+    tensor_info.set_lock_paddings(true);
+
+    // Now lock padding is set to true, therefore the extend padding would fail
+    ARM_COMPUTE_EXPECT_THROW(tensor_info.extend_padding(PaddingSize(2, 1)), framework::LogLevel::ERRORS);
+}
+TEST_SUITE_END() // TensorInfo
+TEST_SUITE_END() // UNIT
 } // namespace validation
 } // namespace test
 } // namespace arm_compute