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authorMohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com>2022-01-19 12:22:50 +0000
committerSiCong Li <sicong.li@arm.com>2022-01-21 10:56:35 +0000
commit066607f1384f502612869196c97b17ed0fc4caf3 (patch)
tree0a5d37650e551c4f3c49fd7e623498bd02c8ebdd
parentd5c496d87e3b446532dd3dd163e9768de0daff4e (diff)
downloadComputeLibrary-066607f1384f502612869196c97b17ed0fc4caf3.tar.gz
A73 Devices Regression 300% fix
- Currently regresses on A73 devices (tested on android hikey, inceptionv3), this patch solves this - Changed mws for all cores to use default values - Existing mws value for A73 tuned for hikey-linux, caused regression on hikey-android Resolves [COMPMID-5044] Change-Id: Ifd6faaa34a0b405d0c390015566f2c75436dfb07 Signed-off-by: Mohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6973 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: SiCong Li <sicong.li@arm.com>
-rw-r--r--src/core/NEON/kernels/NEPadLayerKernel.cpp18
-rw-r--r--src/cpu/kernels/CpuActivationKernel.cpp12
-rw-r--r--src/cpu/kernels/CpuAddKernel.cpp16
-rw-r--r--src/cpu/kernels/CpuIm2ColKernel.cpp18
-rw-r--r--src/cpu/kernels/CpuReshapeKernel.cpp18
-rw-r--r--src/cpu/kernels/assembly/CpuGemmAssemblyWrapperKernel.h18
-rw-r--r--src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.cpp18
7 files changed, 26 insertions, 92 deletions
diff --git a/src/core/NEON/kernels/NEPadLayerKernel.cpp b/src/core/NEON/kernels/NEPadLayerKernel.cpp
index 4e689e74e4..734510b637 100644
--- a/src/core/NEON/kernels/NEPadLayerKernel.cpp
+++ b/src/core/NEON/kernels/NEPadLayerKernel.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2021 Arm Limited.
+ * Copyright (c) 2019-2022 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -262,19 +262,9 @@ void NEPadLayerKernel::run(const Window &window, const ThreadInfo &info)
size_t NEPadLayerKernel::get_mws(const CPUInfo &platform, size_t thread_count) const
{
ARM_COMPUTE_UNUSED(thread_count);
- // Tuning results that gave optimized results in performance investigation
- if (platform.get_cpu_model() == CPUModel::A73 )
- {
- return 10240;
- }
- else if (platform.get_cpu_model() == CPUModel::A76)
- {
- return 9216;
- }
- else
- {
- return ICPPKernel::default_mws;
- }
+ ARM_COMPUTE_UNUSED(platform);
+
+ return ICPPKernel::default_mws;
}
} // namespace arm_compute
diff --git a/src/cpu/kernels/CpuActivationKernel.cpp b/src/cpu/kernels/CpuActivationKernel.cpp
index c048b14a96..cfe732ab5f 100644
--- a/src/cpu/kernels/CpuActivationKernel.cpp
+++ b/src/cpu/kernels/CpuActivationKernel.cpp
@@ -201,15 +201,9 @@ Status CpuActivationKernel::validate(const ITensorInfo *src, const ITensorInfo *
size_t CpuActivationKernel::get_mws(const CPUInfo &platform, size_t thread_count) const
{
ARM_COMPUTE_UNUSED(thread_count);
- // Tuning results that gave optimized results in performance investigation
- if(platform.get_cpu_model() == CPUModel::A73)
- {
- return 10240;
- }
- else
- {
- return 9216;
- }
+ ARM_COMPUTE_UNUSED(platform);
+
+ return ICPPKernel::default_mws;
}
void CpuActivationKernel::run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info)
diff --git a/src/cpu/kernels/CpuAddKernel.cpp b/src/cpu/kernels/CpuAddKernel.cpp
index c27ee9f1bd..deb7379aea 100644
--- a/src/cpu/kernels/CpuAddKernel.cpp
+++ b/src/cpu/kernels/CpuAddKernel.cpp
@@ -256,19 +256,9 @@ const std::vector<CpuAddKernel::AddKernel> &CpuAddKernel::get_available_kernels(
size_t CpuAddKernel::get_mws(const CPUInfo &platform, size_t thread_count) const
{
ARM_COMPUTE_UNUSED(thread_count);
- // Tuning results that gave optimized results in performance investigation
- if(platform.get_cpu_model() == CPUModel::A73)
- {
- return 10240;
- }
- else if(platform.get_cpu_model() == CPUModel::A76)
- {
- return 9216;
- }
- else
- {
- return ICPPKernel::default_mws;
- }
+ ARM_COMPUTE_UNUSED(platform);
+
+ return ICPPKernel::default_mws;
}
} // namespace kernels
diff --git a/src/cpu/kernels/CpuIm2ColKernel.cpp b/src/cpu/kernels/CpuIm2ColKernel.cpp
index 58890fe5a2..875d66594f 100644
--- a/src/cpu/kernels/CpuIm2ColKernel.cpp
+++ b/src/cpu/kernels/CpuIm2ColKernel.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2021 Arm Limited.
+ * Copyright (c) 2017-2022 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -447,19 +447,9 @@ const char *CpuIm2ColKernel::name() const
size_t CpuIm2ColKernel::get_mws(const CPUInfo &platform, size_t thread_count) const
{
ARM_COMPUTE_UNUSED(thread_count);
- // Tuning results that gave optimized results in performance investigation
- if (platform.get_cpu_model() == CPUModel::A73 )
- {
- return 10240;
- }
- else if (platform.get_cpu_model() == CPUModel::A76)
- {
- return 9216;
- }
- else
- {
- return ICPPKernel::default_mws;
- }
+ ARM_COMPUTE_UNUSED(platform);
+
+ return ICPPKernel::default_mws;
}
} // namespace kernels
} // namespace cpu
diff --git a/src/cpu/kernels/CpuReshapeKernel.cpp b/src/cpu/kernels/CpuReshapeKernel.cpp
index 49cb91b330..068ff07efa 100644
--- a/src/cpu/kernels/CpuReshapeKernel.cpp
+++ b/src/cpu/kernels/CpuReshapeKernel.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2021 Arm Limited.
+ * Copyright (c) 2017-2022 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -138,19 +138,9 @@ const char *CpuReshapeKernel::name() const
size_t CpuReshapeKernel::get_mws(const CPUInfo &platform, size_t thread_count) const
{
ARM_COMPUTE_UNUSED(thread_count);
- // Tuning results that gave optimized results in performance investigation
- if (platform.get_cpu_model() == CPUModel::A73 )
- {
- return 10240;
- }
- else if (platform.get_cpu_model() == CPUModel::A76)
- {
- return 9216;
- }
- else
- {
- return ICPPKernel::default_mws;
- }
+ ARM_COMPUTE_UNUSED(platform);
+
+ return ICPPKernel::default_mws;
}
} // namespace kernels
diff --git a/src/cpu/kernels/assembly/CpuGemmAssemblyWrapperKernel.h b/src/cpu/kernels/assembly/CpuGemmAssemblyWrapperKernel.h
index 212fd79306..10bf8e4ff7 100644
--- a/src/cpu/kernels/assembly/CpuGemmAssemblyWrapperKernel.h
+++ b/src/cpu/kernels/assembly/CpuGemmAssemblyWrapperKernel.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2021 Arm Limited.
+ * Copyright (c) 2018-2022 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -125,19 +125,9 @@ public:
size_t get_mws(const CPUInfo &platform, size_t thread_count) const override
{
ARM_COMPUTE_UNUSED(thread_count);
- // Tuning results that gave optimized results in performance investigation
- if (platform.get_cpu_model() == CPUModel::A73 )
- {
- return 3072;
- }
- else if (platform.get_cpu_model() == CPUModel::A76)
- {
- return 4096;
- }
- else
- {
- return ICPPKernel::default_mws;
- }
+ ARM_COMPUTE_UNUSED(platform);
+
+ return ICPPKernel::default_mws;
}
private:
diff --git a/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.cpp b/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.cpp
index 6c235df59f..17bbd1629c 100644
--- a/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.cpp
+++ b/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited.
+ * Copyright (c) 2021-2022 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -358,19 +358,9 @@ const char *CpuDepthwiseConv2dAssemblyWrapperKernel::name() const
size_t CpuDepthwiseConv2dAssemblyWrapperKernel::get_mws(const CPUInfo &platform, size_t thread_count) const
{
ARM_COMPUTE_UNUSED(thread_count);
- // Tuning results that gave optimized results in performance investigation
- if (platform.get_cpu_model() == CPUModel::A73 )
- {
- return 10240;
- }
- else if (platform.get_cpu_model() == CPUModel::A76)
- {
- return 9216;
- }
- else
- {
- return ICPPKernel::default_mws;
- }
+ ARM_COMPUTE_UNUSED(platform);
+
+ return ICPPKernel::default_mws;
}
} // namespace kernels
} // namespace cpu