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| author | Georgios Pinitas <georgios.pinitas@arm.com> | 2021-10-06 13:19:55 +0100 |
|---|---|---|
| committer | Georgios Pinitas <georgios.pinitas@arm.com> | 2021-10-21 17:15:59 +0000 |
| commit | 2277a0d411cd92f954ee00591b914914d2ea992f (patch) | |
| tree | 72c409772186dccc637981eccff1101cd2819b77 | |
| parent | 2eb1e353338400bedaa9f077addf863f80cee168 (diff) | |
| download | ComputeLibrary-2277a0d411cd92f954ee00591b914914d2ea992f.tar.gz | |
Fix enforcing incorrect ISA feature for given CPU models
Removes forcing dot-product support for A64fx on NEON.
Dot-product is only supported in the SVE pipeline.
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Change-Id: I72c2485e72246b9c39efd4e2b9b1d63a1e9c28f6
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6379
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
| -rw-r--r-- | src/common/cpuinfo/CpuIsaInfo.cpp | 8 | ||||
| -rw-r--r-- | src/common/cpuinfo/CpuModel.cpp | 1 |
2 files changed, 4 insertions, 5 deletions
diff --git a/src/common/cpuinfo/CpuIsaInfo.cpp b/src/common/cpuinfo/CpuIsaInfo.cpp index 845ad1c4e9..7899e0dd92 100644 --- a/src/common/cpuinfo/CpuIsaInfo.cpp +++ b/src/common/cpuinfo/CpuIsaInfo.cpp @@ -110,12 +110,12 @@ void decode_regs(CpuIsaInfo &isa, const uint64_t isar0, const uint64_t isar1, co isa.svef32mm = is_supported(svefr0, 52); } -/** Handle features from whitelisted models in case of problematic kernels +/** Handle features from allow-listed models in case of problematic kernels * * @param[in, out] isa ISA to update * @param[in] model CPU model type */ -void whitelisted_model_features(CpuIsaInfo &isa, CpuModel model) +void allowlisted_model_features(CpuIsaInfo &isa, CpuModel model) { if(isa.dot == false) { @@ -139,7 +139,7 @@ CpuIsaInfo init_cpu_isa_from_hwcaps(uint32_t hwcaps, uint32_t hwcaps2, uint32_t decode_hwcaps(isa, hwcaps, hwcaps2); const CpuModel model = midr_to_model(midr); - whitelisted_model_features(isa, model); + allowlisted_model_features(isa, model); return isa; } @@ -151,7 +151,7 @@ CpuIsaInfo init_cpu_isa_from_regs(uint64_t isar0, uint64_t isar1, uint64_t pfr0, decode_regs(isa, isar0, isar1, pfr0, svefr0); const CpuModel model = midr_to_model(midr); - whitelisted_model_features(isa, model); + allowlisted_model_features(isa, model); return isa; } diff --git a/src/common/cpuinfo/CpuModel.cpp b/src/common/cpuinfo/CpuModel.cpp index 2328f62515..2579057f89 100644 --- a/src/common/cpuinfo/CpuModel.cpp +++ b/src/common/cpuinfo/CpuModel.cpp @@ -69,7 +69,6 @@ bool model_supports_dot(CpuModel model) case CpuModel::A510: case CpuModel::X1: case CpuModel::V1: - case CpuModel::A64FX: return true; default: return false; |