diff options
| author | Freddie Liardet <frederick.liardet@arm.com> | 2021-08-04 11:57:37 +0100 |
|---|---|---|
| committer | Sheri Zhang <sheri.zhang@arm.com> | 2021-08-04 15:54:00 +0000 |
| commit | 6269f87f5caca3a83a4822e0556fbf284158615c (patch) | |
| tree | 0f814b2f6356aa073529a8d00c94913e006d1f6d | |
| parent | 38ce29d5dce9a09769b55b2717d105f984247e31 (diff) | |
| download | ComputeLibrary-6269f87f5caca3a83a4822e0556fbf284158615c.tar.gz | |
Fix depthwise convolution assembly kernels
Resolves: COMPMID-4710
Change-Id: I35b964731aeed0e6f4f873f59341bee48e4a41fd
Signed-off-by: Freddie Liardet <frederick.liardet@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6039
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
12 files changed, 11435 insertions, 7814 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp index 99f46015aa..143070cc7e 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp @@ -87,438 +87,634 @@ void a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl( ); __asm__ __volatile__( - "mov x17, #0x0\n" - "mov x16, #0x0\n" + "mov x22, #0x0\n" + "mov x21, #0x0\n" "1:" // Tile loop - "str x17, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "str x22, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "mov x26, #0x2\n" "mov x25, #0x2\n" - "str x16, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "mov x15, #0x2\n" - "ldr x14, [%x[params_struct], %[offsetof_args_params]]\n" - "add x24, %x[params_struct], %[offsetof_args_min]\n" - "ldr x23, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" - "add x21, %x[params_struct], %[offsetof_args_max]\n" - "ldr x13, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" - "mov x22, #0x0\n" + "str x21, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x24, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" + "ldr x23, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" + "mul x20, x22, x24\n" // offset = tile_i * ld_input_row + "ldr x14, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" + "ldr x13, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" + "mul x19, x22, x23\n" // offset = tile_i * ld_output_row + "mov x22, #0x10\n" // cntb _, ALL, #1 + "madd x20, x21, x14, x20\n" // offset += tile_j * ld_input_col "ldr x12, [%x[params_struct], %[offsetof_args_inptr]]\n" - "mul x19, x17, x23\n" // offset = tile_i * ld_input_row - "ldr x20, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" - "madd x19, x16, x13, x19\n" // offset += tile_j * ld_input_col - "ldr x11, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" - "mul x19, x19, x25\n" // offset *= kernel_stride * output_size - "ldr x10, [%x[params_struct], %[offsetof_args_outptr]]\n" - "add x12, x12, x19, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) - "ld1r { v18.8h }, [x24]\n" - "add x9, x12, x23, LSL #1\n" - "ld1r { v17.8h }, [x21]\n" - "add x28, x9, x23, LSL #1\n" + "lsl x14, x14, #0x1\n" + "ldr x11, [%x[params_struct], %[offsetof_args_outptr]]\n" + "madd x19, x21, x13, x19\n" // offset += tile_j * ld_output_col + "lsr x21, %x[n_channels], #0x3\n" + "add x10, x14, x14\n" + "ldr x9, [%x[params_struct], %[offsetof_args_params]]\n" + "mul x20, x20, x26\n" // offset *= kernel_stride * output_size + "add x12, x12, x20, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) + "add x28, x12, x24, LSL #1\n" + "mul x19, x19, x25\n" // offset *= output_tile_size + "add x27, x28, x24, LSL #1\n" + "add x11, x11, x19, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) + "add x20, %x[params_struct], %[offsetof_args_min]\n" + "add x19, %x[params_struct], %[offsetof_args_max]\n" + "ld1r { v18.8h }, [x20]\n" + "ld1r { v17.8h }, [x19]\n" + "add x26, x27, x24, LSL #1\n" + "add x25, x10, x14\n" + "add x24, x11, x23, LSL #1\n" "lsl x13, x13, #0x1\n" - "add x27, x28, x23, LSL #1\n" - "add x26, x13, x13\n" - "add x25, x26, x13\n" - "mul x19, x17, x20\n" // offset = tile_i * ld_output_row - "madd x19, x16, x11, x19\n" // offset += tile_j * ld_output_col - "mul x19, x19, x15\n" // offset *= output_tile_size - "add x10, x10, x19, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) - "add x24, x10, x20, LSL #1\n" - "lsl x11, x11, #0x1\n" - "mov x21, #0x10\n" // cntb _, ALL, #1 - "sub x20, XZR, x21\n" - "lsr x19, %x[n_channels], #0x3\n" - "cbz x19, 4f\n" - "ldr q16, [x14, #0x0]\n" - "ldr q0, [x14, #0x10]\n" - "cmp x21, x19, LSL #4\n" - "ldr q1, [x14, #0x20]\n" - "ldr q2, [x14, #0x30]\n" - "ldr q3, [x14, #0x40]\n" - "ldr q4, [x14, #0x50]\n" - "ldr q5, [x14, #0x60]\n" - "ldr q6, [x14, #0x70]\n" - "ldr q7, [x14, #0x80]\n" - "ldr q8, [x14, #0x90]\n" - "add x14, x14, #0xa0\n" - "ldr q9, [x9, x13]\n" + "mov x20, #0x0\n" + "sub x19, XZR, x22\n" + "cbz x21, 4f\n" + "ldr q16, [x9, #0x0]\n" + "cmp x22, x21, LSL #4\n" + "ldr q0, [x9, #0x10]\n" + "ldr q1, [x9, #0x20]\n" + "ldr q2, [x9, #0x30]\n" + "ldr q3, [x9, #0x40]\n" + "ldr q4, [x9, #0x50]\n" + "ldr q5, [x9, #0x60]\n" + "ldr q6, [x9, #0x70]\n" + "ldr q7, [x9, #0x80]\n" + "ldr q8, [x9, #0x90]\n" + "ldr q9, [x28, x14]\n" + "add x9, x9, #0xa0\n" "ld1 { v10.8h }, [x12]\n" "ldr q11, [x12, x25]\n" - "ldr q12, [x9, x26]\n" - "ldr q13, [x28, x13]\n" + "ldr q12, [x28, x10]\n" + "ldr q13, [x27, x14]\n" "bge 3f\n" "2:" // Tile loop: Channel loop - "mov v31.16b, v16.16b\n fmla v31.8h, v4.8h, v9.8h\n" - "add x20, x20, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v3.8h, v9.8h\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v4.8h, v9.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v3.8h, v9.8h\n" "add x22, x22, #0x10\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v1.8h, v9.8h\n" - "add x21, x21, #0x10\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "ld1 { v9.8h }, [x27]\n" - "cmp x21, x19, LSL #4\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr q10, [x28, x26]\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "ldr q11, [x27, x25]\n" - "fmla v29.8h, v2.8h, v12.8h\n" - "ldr q16, [x14, #0x0]\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "fmla v31.8h, v5.8h, v12.8h\n" - "fmla v30.8h, v4.8h, v12.8h\n" - "ldr q12, [x12, x13]\n" - "fmla v29.8h, v6.8h, v9.8h\n" - "ldr q9, [x12, x26]\n" - "add x12, x12, #0x10\n" - "fmla v28.8h, v3.8h, v13.8h\n" - "fmla v31.8h, v7.8h, v13.8h\n" - "fmla v30.8h, v6.8h, v13.8h\n" - "fmla v29.8h, v4.8h, v13.8h\n" - "fmla v28.8h, v8.8h, v11.8h\n" - "ld1 { v11.8h }, [x9]\n" + "cmp x22, x21, LSL #4\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "ld1 { v9.8h }, [x26]\n" + "add x19, x19, #0x10\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "ldr q11, [x26, x25]\n" + "ldr q10, [x27, x10]\n" + "fmla v30.8h, v2.8h, v12.8h\n" "fmla v31.8h, v1.8h, v12.8h\n" - "fmla v30.8h, v0.8h, v12.8h\n" - "ldr q12, [x9, x25]\n" - "add x9, x9, #0x10\n" - "fmla v29.8h, v5.8h, v10.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "ldr q4, [x14, #0x50]\n" - "fmla v31.8h, v2.8h, v9.8h\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "ld1 { v9.8h }, [x28]\n" - "ldr q1, [x14, #0x20]\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q0, [x14, #0x10]\n" - "fmla v28.8h, v2.8h, v12.8h\n" - "ldr q2, [x14, #0x30]\n" - "fmla v31.8h, v8.8h, v10.8h\n" - "fmla v30.8h, v7.8h, v10.8h\n" - "ldr q10, [x28, x25]\n" + "add x20, x20, #0x10\n" + "ldr q16, [x9, #0x0]\n" + "fmla v28.8h, v5.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v12.8h\n" + "ldr q12, [x12, x14]\n" + "fmla v30.8h, v6.8h, v9.8h\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "ldr q9, [x12, x10]\n" + "add x12, x12, #0x10\n" + "fmla v28.8h, v7.8h, v13.8h\n" + "fmla v29.8h, v6.8h, v13.8h\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "fmla v31.8h, v8.8h, v11.8h\n" + "ld1 { v11.8h }, [x28]\n" + "fmla v28.8h, v1.8h, v12.8h\n" + "fmla v29.8h, v0.8h, v12.8h\n" + "ldr q12, [x28, x25]\n" "add x28, x28, #0x10\n" - "fmla v29.8h, v3.8h, v9.8h\n" - "ldr q13, [x28, x13]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x27, x13]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr q12, [x27, x26]\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "ldr q4, [x9, #0x50]\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "ld1 { v9.8h }, [x27]\n" + "ldr q1, [x9, #0x20]\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "ldr q0, [x9, #0x10]\n" + "ldr q2, [x9, #0x30]\n" + "fmla v28.8h, v8.8h, v10.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "ldr q10, [x27, x25]\n" "add x27, x27, #0x10\n" - "fmla v28.8h, v5.8h, v10.8h\n" - "ldr q3, [x14, #0x40]\n" - "ldr q5, [x14, #0x60]\n" - "fmla v31.8h, v6.8h, v9.8h\n" - "ldr q9, [x9, x13]\n" - "fmla v30.8h, v8.8h, v10.8h\n" - "ld1 { v10.8h }, [x12]\n" - "fmla v29.8h, v7.8h, v11.8h\n" - "fmla v28.8h, v6.8h, v11.8h\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "fmla v31.8h, v5.8h, v10.8h\n" + "ldr q13, [x27, x14]\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "ldr q11, [x26, x14]\n" + "fmla v29.8h, v5.8h, v12.8h\n" + "ldr q12, [x26, x10]\n" + "fmla v30.8h, v7.8h, v11.8h\n" + "fmla v31.8h, v6.8h, v11.8h\n" + "add x26, x26, #0x10\n" "ldr q11, [x12, x25]\n" - "ldr q6, [x14, #0x70]\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmla v29.8h, v8.8h, v12.8h\n" - "ldr q8, [x14, #0x90]\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "ldr q12, [x9, x26]\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "ldr q7, [x14, #0x80]\n" - "add x14, x14, #0xa0\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "st1 { v31.8h }, [x10]\n" - "fmax v29.8h, v29.8h, v18.8h\n" + "fmla v28.8h, v6.8h, v9.8h\n" + "fmla v29.8h, v8.8h, v10.8h\n" "fmax v28.8h, v28.8h, v18.8h\n" - "str q30, [x10, x11]\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "st1 { v29.8h }, [x24]\n" + "ldr q9, [x28, x14]\n" + "fmla v30.8h, v8.8h, v12.8h\n" + "fmla v31.8h, v7.8h, v12.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "ld1 { v10.8h }, [x12]\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" + "ldr q12, [x28, x10]\n" + "ldr q3, [x9, #0x40]\n" "fmin v28.8h, v28.8h, v17.8h\n" - "add x10, x10, #0x10\n" - "str q28, [x24, x11]\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "st1 { v28.8h }, [x11]\n" + "ldr q5, [x9, #0x60]\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "str q29, [x11, x13]\n" + "add x11, x11, #0x10\n" + "st1 { v30.8h }, [x24]\n" + "ldr q6, [x9, #0x70]\n" + "ldr q7, [x9, #0x80]\n" + "str q31, [x24, x13]\n" "add x24, x24, #0x10\n" + "ldr q8, [x9, #0x90]\n" + "add x9, x9, #0xa0\n" "blt 2b\n" "3:" // Tile loop: Channel tail - "mov v31.16b, v16.16b\n fmla v31.8h, v4.8h, v9.8h\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v3.8h, v9.8h\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v1.8h, v9.8h\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "ld1 { v9.8h }, [x27]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr q10, [x28, x26]\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "ldr q11, [x27, x25]\n" - "fmla v29.8h, v2.8h, v12.8h\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "fmla v31.8h, v5.8h, v12.8h\n" - "fmla v30.8h, v4.8h, v12.8h\n" - "ldr q12, [x12, x13]\n" - "fmla v29.8h, v6.8h, v9.8h\n" - "ldr q9, [x12, x26]\n" - "add x12, x12, #0x10\n" - "fmla v28.8h, v3.8h, v13.8h\n" - "fmla v31.8h, v7.8h, v13.8h\n" - "fmla v30.8h, v6.8h, v13.8h\n" - "fmla v29.8h, v4.8h, v13.8h\n" - "fmla v28.8h, v8.8h, v11.8h\n" - "ld1 { v11.8h }, [x9]\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v4.8h, v9.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v3.8h, v9.8h\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "ld1 { v9.8h }, [x26]\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "ldr q11, [x26, x25]\n" + "ldr q10, [x27, x10]\n" + "fmla v30.8h, v2.8h, v12.8h\n" "fmla v31.8h, v1.8h, v12.8h\n" - "fmla v30.8h, v0.8h, v12.8h\n" - "ldr q12, [x9, x25]\n" - "add x9, x9, #0x10\n" - "fmla v29.8h, v5.8h, v10.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "fmla v31.8h, v2.8h, v9.8h\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "ld1 { v9.8h }, [x28]\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "fmla v28.8h, v2.8h, v12.8h\n" - "fmla v31.8h, v8.8h, v10.8h\n" - "fmla v30.8h, v7.8h, v10.8h\n" - "ldr q10, [x28, x25]\n" + "fmla v28.8h, v5.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v12.8h\n" + "ldr q12, [x12, x14]\n" + "fmla v30.8h, v6.8h, v9.8h\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "ldr q9, [x12, x10]\n" + "add x12, x12, #0x10\n" + "fmla v28.8h, v7.8h, v13.8h\n" + "fmla v29.8h, v6.8h, v13.8h\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "fmla v31.8h, v8.8h, v11.8h\n" + "ld1 { v11.8h }, [x28]\n" + "fmla v28.8h, v1.8h, v12.8h\n" + "fmla v29.8h, v0.8h, v12.8h\n" + "ldr q12, [x28, x25]\n" "add x28, x28, #0x10\n" - "fmla v29.8h, v3.8h, v9.8h\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x27, x13]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr q12, [x27, x26]\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "ld1 { v9.8h }, [x27]\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "fmla v28.8h, v8.8h, v10.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "ldr q10, [x27, x25]\n" "add x27, x27, #0x10\n" - "fmla v28.8h, v5.8h, v10.8h\n" - "fmla v31.8h, v6.8h, v9.8h\n" - "fmla v30.8h, v8.8h, v10.8h\n" - "fmla v29.8h, v7.8h, v11.8h\n" - "fmla v28.8h, v6.8h, v11.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmla v29.8h, v8.8h, v12.8h\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "st1 { v31.8h }, [x10]\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "str q30, [x10, x11]\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "add x10, x10, #0x10\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "fmla v31.8h, v5.8h, v10.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "ldr q11, [x26, x14]\n" + "fmla v29.8h, v5.8h, v12.8h\n" + "ldr q12, [x26, x10]\n" + "fmla v30.8h, v7.8h, v11.8h\n" + "fmla v31.8h, v6.8h, v11.8h\n" + "add x26, x26, #0x10\n" + "fmla v28.8h, v6.8h, v9.8h\n" + "fmla v29.8h, v8.8h, v10.8h\n" "fmax v28.8h, v28.8h, v18.8h\n" - "st1 { v29.8h }, [x24]\n" + "fmla v30.8h, v8.8h, v12.8h\n" + "fmla v31.8h, v7.8h, v12.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" "fmin v28.8h, v28.8h, v17.8h\n" - "str q28, [x24, x11]\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "st1 { v28.8h }, [x11]\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "str q29, [x11, x13]\n" + "add x11, x11, #0x10\n" + "st1 { v30.8h }, [x24]\n" + "str q31, [x24, x13]\n" "add x24, x24, #0x10\n" "4:" // Tile loop: Oddments - "tst %x[n_channels], #0x1\n" - "beq 31f\n" - "ldr q16, [x14, #0x0]\n" - "ldr q0, [x14, #0x10]\n" - "add x23, x9, x13\n" - "ldr q1, [x14, #0x20]\n" + "tst %x[n_channels], #0x7\n" + "beq 57f\n" + "ldr q16, [x9, #0x0]\n" + "ldr q0, [x9, #0x10]\n" + "ldr q1, [x9, #0x20]\n" + "ldr q2, [x9, #0x30]\n" + "add x23, x28, x14\n" "add x22, x12, XZR\n" - "ldr q2, [x14, #0x30]\n" + "ldr q3, [x9, #0x40]\n" + "ldr q4, [x9, #0x50]\n" "add x21, x12, x25\n" - "ldr q3, [x14, #0x40]\n" - "add x20, x9, x26\n" - "ldr q4, [x14, #0x50]\n" - "add x19, x28, x13\n" - "ldr q5, [x14, #0x60]\n" - "ldr q6, [x14, #0x70]\n" - "ldr q7, [x14, #0x80]\n" - "ldr q8, [x14, #0x90]\n" + "add x20, x28, x10\n" + "ldr q5, [x9, #0x60]\n" + "ldr q6, [x9, #0x70]\n" + "add x19, x27, x14\n" + "ldr q7, [x9, #0x80]\n" + "ldr q8, [x9, #0x90]\n" + "tbz %x[n_channels], #2, 6f\n" + "ldr d9, [x23], #0x8\n" + "ldr d10, [x22], #0x8\n" + "ldr d11, [x21], #0x8\n" + "ldr d12, [x20], #0x8\n" + "ldr d13, [x19], #0x8\n" "tbz %x[n_channels], #1, 5f\n" + "ld1 { v9.s }[2], [x23], #0x4\n" + "ld1 { v10.s }[2], [x22], #0x4\n" + "ld1 { v11.s }[2], [x21], #0x4\n" + "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 8f\n" + "ld1 { v9.h }[6], [x23]\n" + "ld1 { v10.h }[6], [x22]\n" + "ld1 { v11.h }[6], [x21]\n" + "ld1 { v12.h }[6], [x20]\n" + "ld1 { v13.h }[6], [x19]\n" + "b 8f\n" + "5:" // Tile loop: Oddments: Load inputs: (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 8f\n" + "ld1 { v9.h }[4], [x23]\n" + "ld1 { v10.h }[4], [x22]\n" + "ld1 { v11.h }[4], [x21]\n" + "ld1 { v12.h }[4], [x20]\n" + "ld1 { v13.h }[4], [x19]\n" + "b 8f\n" + "6:" // Tile loop: Oddments: Load inputs: (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 7f\n" "ldr s9, [x23], #0x4\n" "ldr s10, [x22], #0x4\n" "ldr s11, [x21], #0x4\n" "ldr s12, [x20], #0x4\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 6f\n" + "tbz %x[n_channels], #0, 8f\n" "ld1 { v9.h }[2], [x23]\n" "ld1 { v10.h }[2], [x22]\n" "ld1 { v11.h }[2], [x21]\n" "ld1 { v12.h }[2], [x20]\n" "ld1 { v13.h }[2], [x19]\n" - "b 6f\n" - "5:" // Tile loop: Oddments: Load inputs: (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 1: Unset + "b 8f\n" + "7:" // Tile loop: Oddments: Load inputs: (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 2: Unset: Bit 1: Unset "ldr h9, [x23, #0x0]\n" "ldr h10, [x22, #0x0]\n" "ldr h11, [x21, #0x0]\n" "ldr h12, [x20, #0x0]\n" "ldr h13, [x19, #0x0]\n" - "6:" // Tile loop: Oddments: Load inputs: (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 1: End - "mov v31.16b, v16.16b\n fmla v31.8h, v4.8h, v9.8h\n" - "add x19, x27, XZR\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v3.8h, v9.8h\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v1.8h, v9.8h\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v12.8h\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "fmla v31.8h, v5.8h, v12.8h\n" - "fmla v30.8h, v4.8h, v12.8h\n" - "tbz %x[n_channels], #1, 7f\n" + "8:" // Tile loop: Oddments: Load inputs: (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 2: End + "mov v28.16b, v16.16b\n fmla v28.8h, v4.8h, v9.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v3.8h, v9.8h\n" + "add x19, x26, XZR\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v12.8h\n" + "fmla v30.8h, v2.8h, v12.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "tbz %x[n_channels], #2, 10f\n" + "ldr d9, [x19], #0x8\n" + "tbz %x[n_channels], #1, 9f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 12f\n" + "ld1 { v9.h }[6], [x19]\n" + "b 12f\n" + "9:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 12f\n" + "ld1 { v9.h }[4], [x19]\n" + "b 12f\n" + "10:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 11f\n" "ldr s9, [x19], #0x4\n" - "tbz %x[n_channels], #0, 8f\n" + "tbz %x[n_channels], #0, 12f\n" "ld1 { v9.h }[2], [x19]\n" - "b 8f\n" - "7:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: Unset + "b 12f\n" + "11:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset: Bit 1: Unset "ldr h9, [x19, #0x0]\n" - "8:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: End - "fmla v29.8h, v6.8h, v9.8h\n" - "add x19, x27, x25\n" - "fmla v31.8h, v7.8h, v13.8h\n" - "fmla v30.8h, v6.8h, v13.8h\n" - "fmla v28.8h, v3.8h, v13.8h\n" - "fmla v29.8h, v4.8h, v13.8h\n" - "tbz %x[n_channels], #1, 9f\n" + "12:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: End + "fmla v30.8h, v6.8h, v9.8h\n" + "fmla v28.8h, v7.8h, v13.8h\n" + "add x19, x26, x25\n" + "fmla v29.8h, v6.8h, v13.8h\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "tbz %x[n_channels], #2, 14f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 13f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 16f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 16f\n" + "13:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 16f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 16f\n" + "14:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 15f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 10f\n" + "tbz %x[n_channels], #0, 16f\n" "ld1 { v11.h }[2], [x19]\n" - "b 10f\n" - "9:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: Unset + "b 16f\n" + "15:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "10:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: End - "fmla v28.8h, v8.8h, v11.8h\n" - "add x19, x12, x13\n" - "tbz %x[n_channels], #1, 11f\n" + "16:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: End + "fmla v31.8h, v8.8h, v11.8h\n" + "add x19, x12, x14\n" + "tbz %x[n_channels], #2, 18f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 17f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 20f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 20f\n" + "17:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 20f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 20f\n" + "18:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 19f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 12f\n" + "tbz %x[n_channels], #0, 20f\n" "ld1 { v12.h }[2], [x19]\n" - "b 12f\n" - "11:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 1: Unset + "b 20f\n" + "19:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "12:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 1: End - "fmla v31.8h, v1.8h, v12.8h\n" - "add x19, x12, x26\n" - "fmla v30.8h, v0.8h, v12.8h\n" - "tbz %x[n_channels], #1, 13f\n" + "20:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: End + "fmla v28.8h, v1.8h, v12.8h\n" + "fmla v29.8h, v0.8h, v12.8h\n" + "add x19, x12, x10\n" + "tbz %x[n_channels], #2, 22f\n" + "ldr d9, [x19], #0x8\n" + "tbz %x[n_channels], #1, 21f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 24f\n" + "ld1 { v9.h }[6], [x19]\n" + "b 24f\n" + "21:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 24f\n" + "ld1 { v9.h }[4], [x19]\n" + "b 24f\n" + "22:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 23f\n" "ldr s9, [x19], #0x4\n" - "tbz %x[n_channels], #0, 14f\n" + "tbz %x[n_channels], #0, 24f\n" "ld1 { v9.h }[2], [x19]\n" - "b 14f\n" - "13:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 1: Unset + "b 24f\n" + "23:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Unset: Bit 1: Unset "ldr h9, [x19, #0x0]\n" - "14:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 1: End - "fmla v31.8h, v2.8h, v9.8h\n" - "add x19, x28, x26\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "tbz %x[n_channels], #1, 15f\n" + "24:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: End + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "add x19, x27, x10\n" + "tbz %x[n_channels], #2, 26f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 25f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 28f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 28f\n" + "25:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 28f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 28f\n" + "26:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 27f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 16f\n" + "tbz %x[n_channels], #0, 28f\n" "ld1 { v10.h }[2], [x19]\n" - "b 16f\n" - "15:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 1: Unset + "b 28f\n" + "27:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "16:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 1: End - "fmla v31.8h, v8.8h, v10.8h\n" - "add x19, x9, XZR\n" - "fmla v30.8h, v7.8h, v10.8h\n" - "fmla v29.8h, v5.8h, v10.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "tbz %x[n_channels], #1, 17f\n" + "28:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 2: End + "fmla v28.8h, v8.8h, v10.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "add x19, x28, XZR\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "tbz %x[n_channels], #2, 30f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 29f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 32f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 32f\n" + "29:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 32f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 32f\n" + "30:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 31f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 18f\n" + "tbz %x[n_channels], #0, 32f\n" "ld1 { v11.h }[2], [x19]\n" - "b 18f\n" - "17:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 1: Unset + "b 32f\n" + "31:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "18:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 1: End - "fmla v31.8h, v3.8h, v11.8h\n" - "add x19, x9, x25\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "tbz %x[n_channels], #1, 19f\n" + "32:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: End + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "add x19, x28, x25\n" + "tbz %x[n_channels], #2, 34f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 33f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 36f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 36f\n" + "33:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 36f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 36f\n" + "34:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 35f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 20f\n" + "tbz %x[n_channels], #0, 36f\n" "ld1 { v12.h }[2], [x19]\n" - "b 20f\n" - "19:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: Unset + "b 36f\n" + "35:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "20:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: End - "fmla v30.8h, v5.8h, v12.8h\n" - "add x19, x28, XZR\n" - "fmla v28.8h, v2.8h, v12.8h\n" - "tbz %x[n_channels], #1, 21f\n" + "36:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: End + "fmla v29.8h, v5.8h, v12.8h\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "add x19, x27, XZR\n" + "tbz %x[n_channels], #2, 38f\n" + "ldr d9, [x19], #0x8\n" + "tbz %x[n_channels], #1, 37f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 40f\n" + "ld1 { v9.h }[6], [x19]\n" + "b 40f\n" + "37:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 40f\n" + "ld1 { v9.h }[4], [x19]\n" + "b 40f\n" + "38:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 39f\n" "ldr s9, [x19], #0x4\n" - "tbz %x[n_channels], #0, 22f\n" + "tbz %x[n_channels], #0, 40f\n" "ld1 { v9.h }[2], [x19]\n" - "b 22f\n" - "21:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 1: Unset + "b 40f\n" + "39:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Unset: Bit 1: Unset "ldr h9, [x19, #0x0]\n" - "22:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 1: End - "fmla v31.8h, v6.8h, v9.8h\n" - "add x19, x28, x25\n" - "fmla v29.8h, v3.8h, v9.8h\n" - "tbz %x[n_channels], #1, 23f\n" + "40:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: End + "fmla v28.8h, v6.8h, v9.8h\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "add x19, x27, x25\n" + "tbz %x[n_channels], #2, 42f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 41f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 44f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 44f\n" + "41:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 44f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 44f\n" + "42:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 43f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 24f\n" + "tbz %x[n_channels], #0, 44f\n" "ld1 { v10.h }[2], [x19]\n" - "b 24f\n" - "23:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 1: Unset + "b 44f\n" + "43:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "24:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 1: End - "fmla v30.8h, v8.8h, v10.8h\n" - "add x19, x27, x13\n" - "fmla v28.8h, v5.8h, v10.8h\n" - "tbz %x[n_channels], #1, 25f\n" + "44:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: End + "fmla v29.8h, v8.8h, v10.8h\n" + "fmla v31.8h, v5.8h, v10.8h\n" + "add x19, x26, x14\n" + "tbz %x[n_channels], #2, 46f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 45f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 48f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 48f\n" + "45:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 48f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 48f\n" + "46:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 47f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 26f\n" + "tbz %x[n_channels], #0, 48f\n" "ld1 { v11.h }[2], [x19]\n" - "b 26f\n" - "25:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: Unset + "b 48f\n" + "47:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "26:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: End - "fmla v29.8h, v7.8h, v11.8h\n" - "add x19, x27, x26\n" - "fmla v28.8h, v6.8h, v11.8h\n" - "tbz %x[n_channels], #1, 27f\n" + "48:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: End + "fmla v30.8h, v7.8h, v11.8h\n" + "fmla v31.8h, v6.8h, v11.8h\n" + "add x19, x26, x10\n" + "tbz %x[n_channels], #2, 50f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 49f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 52f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 52f\n" + "49:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 52f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 52f\n" + "50:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 51f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 28f\n" + "tbz %x[n_channels], #0, 52f\n" "ld1 { v12.h }[2], [x19]\n" - "b 28f\n" - "27:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: Unset + "b 52f\n" + "51:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "28:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: End - "fmla v29.8h, v8.8h, v12.8h\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "fmin v30.8h, v30.8h, v17.8h\n" + "52:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: End + "fmla v30.8h, v8.8h, v12.8h\n" + "fmla v31.8h, v7.8h, v12.8h\n" "fmax v28.8h, v28.8h, v18.8h\n" - "fmin v29.8h, v29.8h, v17.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" "fmin v28.8h, v28.8h, v17.8h\n" - "tbz %x[n_channels], #1, 29f\n" - "mov x19, x10\n" - "st1 { v31.s }[0], [x19], x11\n" - "add x10, x10, #0x4\n" - "st1 { v30.s }[0], [x19]\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "tbz %x[n_channels], #2, 54f\n" + "mov x20, x11\n" + "mov x19, x24\n" + "st1 { v28.d }[0], [x20], x13\n" + "add x11, x11, #0x8\n" + "add x24, x24, #0x8\n" + "st1 { v30.d }[0], [x19], x13\n" + "st1 { v29.d }[0], [x20]\n" + "st1 { v31.d }[0], [x19]\n" + "tbz %x[n_channels], #1, 53f\n" + "mov x20, x11\n" + "mov x19, x24\n" + "st1 { v28.s }[2], [x20], x13\n" + "add x11, x11, #0x4\n" + "add x24, x24, #0x4\n" + "st1 { v30.s }[2], [x19], x13\n" + "st1 { v29.s }[2], [x20]\n" + "st1 { v31.s }[2], [x19]\n" + "tbz %x[n_channels], #0, 56f\n" + "mov x20, x11\n" + "mov x19, x24\n" + "st1 { v28.h }[6], [x20], x13\n" + "st1 { v30.h }[6], [x19], x13\n" + "st1 { v29.h }[6], [x20]\n" + "st1 { v31.h }[6], [x19]\n" + "b 56f\n" + "53:" // Tile loop: Oddments: Store: Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 56f\n" + "mov x20, x11\n" + "mov x19, x24\n" + "st1 { v28.h }[4], [x20], x13\n" + "st1 { v30.h }[4], [x19], x13\n" + "st1 { v29.h }[4], [x20]\n" + "st1 { v31.h }[4], [x19]\n" + "b 56f\n" + "54:" // Tile loop: Oddments: Store: Bit 2: Unset + "tbz %x[n_channels], #1, 55f\n" + "mov x20, x11\n" "mov x19, x24\n" - "st1 { v29.s }[0], [x19], x11\n" + "st1 { v28.s }[0], [x20], x13\n" + "st1 { v30.s }[0], [x19], x13\n" + "add x11, x11, #0x4\n" "add x24, x24, #0x4\n" - "st1 { v28.s }[0], [x19]\n" - "tbz %x[n_channels], #0, 30f\n" - "mov x20, x10\n" - "st1 { v31.h }[2], [x20], x11\n" + "st1 { v29.s }[0], [x20]\n" + "st1 { v31.s }[0], [x19]\n" + "tbz %x[n_channels], #0, 56f\n" + "mov x20, x11\n" "mov x19, x24\n" - "st1 { v30.h }[2], [x20]\n" - "st1 { v29.h }[2], [x19], x11\n" - "st1 { v28.h }[2], [x19]\n" - "b 30f\n" - "29:" // Tile loop: Oddments: Store: Bit 1: Unset - "mov x20, x10\n" - "st1 { v31.h }[0], [x20], x11\n" + "st1 { v28.h }[2], [x20], x13\n" + "st1 { v30.h }[2], [x19], x13\n" + "st1 { v29.h }[2], [x20]\n" + "st1 { v31.h }[2], [x19]\n" + "b 56f\n" + "55:" // Tile loop: Oddments: Store: Bit 2: Unset: Bit 1: Unset + "mov x20, x11\n" "mov x19, x24\n" - "st1 { v30.h }[0], [x20]\n" - "st1 { v29.h }[0], [x19], x11\n" - "st1 { v28.h }[0], [x19]\n" - "30:" // Tile loop: Oddments: Store: Bit 1: End + "st1 { v28.h }[0], [x20], x13\n" + "st1 { v30.h }[0], [x19], x13\n" + "st1 { v29.h }[0], [x20]\n" + "st1 { v31.h }[0], [x19]\n" + "56:" // Tile loop: Oddments: Store: Bit 2: End - "31:" // Tile loop: End - "ldr x17, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "add x21, x17, #0x1\n" - "ldr x16, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" - "add x16, x16, #0x1\n" + "57:" // Tile loop: End + "ldr x21, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x22, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "add x21, x21, #0x1\n" + "add x20, x22, #0x1\n" "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" - "cmp x16, x19\n" - "csel x16, x16, XZR, LT\n" - "csel x17, x17, x21, LT\n" - "cmp x17, x20\n" + "cmp x21, x19\n" + "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" + "csel x22, x22, x20, LT\n" + "csel x21, x21, XZR, LT\n" + "cmp x22, x19\n" "blt 1b\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v16", "v17", "v18", "v28", "v29", "v30", "v31", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" + : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v16", "v17", "v18", "v28", "v29", "v30", "v31", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" ); } diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp index af83238d2e..35a9714944 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp @@ -79,429 +79,613 @@ void a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst_indirect_impl( __asm__ __volatile__( "ldr x21, [%x[params_struct], %[offsetof_args_outptrs]]\n" - "add x16, %x[params_struct], %[offsetof_Args_inptrs]\n" - "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" + "mov x16, #0x10\n" // cntb _, ALL, #1 + "lsr x15, %x[n_channels], #0x3\n" + "ldr x14, [%x[params_struct], %[offsetof_args_params]]\n" "add x20, %x[params_struct], %[offsetof_args_min]\n" "add x19, %x[params_struct], %[offsetof_args_max]\n" + "ldp x13, x12, [x21, #0x0]\n" + "ldp x11, x10, [x21, #0x10]\n" + "add x9, %x[params_struct], %[offsetof_Args_inptrs]\n" "ld1r { v18.8h }, [x20]\n" "ld1r { v17.8h }, [x19]\n" - "mov x14, #0x0\n" - "ldp x13, x12, [x21, #0x0]\n" - "mov x11, #0x10\n" // cntb _, ALL, #1 - "ldp x10, x9, [x21, #0x10]\n" - "sub x28, XZR, x11\n" - "lsr x27, %x[n_channels], #0x3\n" - "cbz x27, 3f\n" - "ldr q16, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "cmp x11, x27, LSL #4\n" - "ldr q1, [x15, #0x20]\n" - "ldr q2, [x15, #0x30]\n" - "ldr q3, [x15, #0x40]\n" - "ldr q4, [x15, #0x50]\n" - "ldr q5, [x15, #0x60]\n" - "ldr q6, [x15, #0x70]\n" - "ldr q7, [x15, #0x80]\n" - "ldr q8, [x15, #0x90]\n" - "add x15, x15, #0xa0\n" - "ldp x26, x25, [x16, #0x0]\n" - "ldp x24, x23, [x16, #0x10]\n" - "ldr x22, [x16, #0x20]\n" - "ldr q9, [x26, x14]\n" - "ldr q10, [x25, x14]\n" - "ldr q11, [x24, x14]\n" - "ldr q12, [x23, x14]\n" - "ldr q13, [x22, x14]\n" + "mov x28, #0x0\n" + "sub x27, XZR, x16\n" + "cbz x15, 3f\n" + "ldp x26, x25, [x9, #0x0]\n" + "ldp x24, x23, [x9, #0x10]\n" + "ldr x22, [x9, #0x20]\n" + "cmp x16, x15, LSL #4\n" + "ldr q16, [x14, #0x0]\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "ldr q2, [x14, #0x30]\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "ldr q9, [x26, x28]\n" + "add x14, x14, #0xa0\n" + "ldr q10, [x25, x28]\n" + "ldr q11, [x24, x28]\n" + "ldr q12, [x23, x28]\n" + "ldr q13, [x22, x28]\n" "bge 2f\n" "1:" // Channel loop - "mov v31.16b, v16.16b\n fmla v31.8h, v4.8h, v9.8h\n" - "ldr x21, [x16, #0x28]\n" - "add x28, x28, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v3.8h, v9.8h\n" - "ldr x20, [x16, #0x30]\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v1.8h, v9.8h\n" - "ldr x19, [x16, #0x38]\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "ldr q9, [x21, x14]\n" - "ldr x26, [x16, #0x40]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr x25, [x16, #0x48]\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v12.8h\n" - "ldr q11, [x20, x14]\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "ldr q10, [x25, x14]\n" - "ldr x24, [x16, #0x50]\n" - "fmla v31.8h, v5.8h, v12.8h\n" - "ldr x23, [x16, #0x58]\n" - "fmla v30.8h, v4.8h, v12.8h\n" - "fmla v29.8h, v6.8h, v9.8h\n" - "ldr q12, [x19, x14]\n" - "fmla v28.8h, v3.8h, v13.8h\n" - "ldr q9, [x26, x14]\n" - "ldr x22, [x16, #0x60]\n" - "fmla v31.8h, v7.8h, v13.8h\n" - "ldr x21, [x16, #0x68]\n" - "fmla v30.8h, v6.8h, v13.8h\n" - "fmla v29.8h, v4.8h, v13.8h\n" - "ldr x20, [x16, #0x70]\n" - "fmla v28.8h, v8.8h, v11.8h\n" - "ldr q11, [x24, x14]\n" - "ldr x19, [x16, #0x78]\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v4.8h, v9.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v3.8h, v9.8h\n" + "ldr x21, [x9, #0x28]\n" + "ldr x20, [x9, #0x30]\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "ldr q9, [x21, x28]\n" + "ldr x19, [x9, #0x38]\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "ldr q11, [x20, x28]\n" + "ldr x25, [x9, #0x48]\n" + "fmla v30.8h, v2.8h, v12.8h\n" "fmla v31.8h, v1.8h, v12.8h\n" - "ldp x26, x25, [x16, #0x0]\n" - "fmla v30.8h, v0.8h, v12.8h\n" - "fmla v29.8h, v5.8h, v10.8h\n" - "ldr q12, [x23, x14]\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "ldp x24, x23, [x16, #0x10]\n" - "ldr q16, [x15, #0x0]\n" - "fmla v31.8h, v2.8h, v9.8h\n" - "ldr q4, [x15, #0x50]\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q9, [x22, x14]\n" - "fmla v28.8h, v2.8h, v12.8h\n" - "ldr x22, [x16, #0x20]\n" - "ldr q0, [x15, #0x10]\n" - "fmla v31.8h, v8.8h, v10.8h\n" - "ldr q1, [x15, #0x20]\n" - "fmla v30.8h, v7.8h, v10.8h\n" - "ldr q10, [x21, x14]\n" - "fmla v29.8h, v3.8h, v9.8h\n" - "ldr q13, [x22, x11]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x20, x14]\n" - "ldr q2, [x15, #0x30]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "fmla v28.8h, v5.8h, v10.8h\n" - "ldr q12, [x19, x14]\n" - "add x14, x14, #0x10\n" - "fmla v31.8h, v6.8h, v9.8h\n" - "ldr q9, [x26, x11]\n" - "fmla v29.8h, v7.8h, v11.8h\n" - "ldr q3, [x15, #0x40]\n" - "fmla v30.8h, v8.8h, v10.8h\n" - "ldr q10, [x25, x11]\n" - "fmla v28.8h, v6.8h, v11.8h\n" - "ldr q11, [x24, x11]\n" - "ldr q5, [x15, #0x60]\n" - "fmla v29.8h, v8.8h, v12.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "ldr q6, [x15, #0x70]\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "ldr q8, [x15, #0x90]\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "ldr q12, [x23, x11]\n" - "add x11, x11, #0x10\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "ldr q7, [x15, #0x80]\n" - "cmp x11, x27, LSL #4\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "str q31, [x13, x28]\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "add x15, x15, #0xa0\n" + "ldr x26, [x9, #0x40]\n" + "ldr q10, [x25, x28]\n" + "fmla v28.8h, v5.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v12.8h\n" + "ldr q12, [x19, x28]\n" + "ldr x24, [x9, #0x50]\n" + "fmla v30.8h, v6.8h, v9.8h\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "ldr q9, [x26, x28]\n" + "ldr x23, [x9, #0x58]\n" + "fmla v28.8h, v7.8h, v13.8h\n" + "fmla v29.8h, v6.8h, v13.8h\n" + "ldr x22, [x9, #0x60]\n" + "ldr x21, [x9, #0x68]\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "fmla v31.8h, v8.8h, v11.8h\n" + "ldr q11, [x24, x28]\n" + "ldr x20, [x9, #0x70]\n" + "fmla v28.8h, v1.8h, v12.8h\n" + "fmla v29.8h, v0.8h, v12.8h\n" + "ldr q12, [x23, x28]\n" + "ldr x19, [x9, #0x78]\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "ldp x26, x25, [x9, #0x0]\n" + "ldp x24, x23, [x9, #0x10]\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "ldr q9, [x22, x28]\n" + "ldr x22, [x9, #0x20]\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "ldr q13, [x22, x16]\n" + "add x27, x27, #0x10\n" + "fmla v28.8h, v8.8h, v10.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "ldr q10, [x21, x28]\n" + "ldr q16, [x14, #0x0]\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "fmla v31.8h, v5.8h, v10.8h\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "ldr q11, [x20, x28]\n" + "fmla v29.8h, v5.8h, v12.8h\n" + "ldr q12, [x19, x28]\n" + "fmla v30.8h, v7.8h, v11.8h\n" + "fmla v31.8h, v6.8h, v11.8h\n" + "ldr q11, [x24, x16]\n" + "add x28, x28, #0x10\n" + "fmla v28.8h, v6.8h, v9.8h\n" + "fmla v29.8h, v8.8h, v10.8h\n" "fmax v28.8h, v28.8h, v18.8h\n" - "str q30, [x12, x28]\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "str q29, [x10, x28]\n" + "ldr q9, [x26, x16]\n" + "fmla v30.8h, v8.8h, v12.8h\n" + "fmla v31.8h, v7.8h, v12.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "ldr q10, [x25, x16]\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" + "ldr q12, [x23, x16]\n" + "add x16, x16, #0x10\n" + "cmp x16, x15, LSL #4\n" "fmin v28.8h, v28.8h, v17.8h\n" - "str q28, [x9, x28]\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "str q28, [x13, x27]\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "str q29, [x12, x27]\n" + "ldr q2, [x14, #0x30]\n" + "str q30, [x11, x27]\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "str q31, [x10, x27]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "add x14, x14, #0xa0\n" "blt 1b\n" "2:" // Channel tail - "mov v31.16b, v16.16b\n fmla v31.8h, v4.8h, v9.8h\n" - "ldr x21, [x16, #0x28]\n" - "add x28, x28, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v3.8h, v9.8h\n" - "ldr x20, [x16, #0x30]\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v1.8h, v9.8h\n" - "ldr x19, [x16, #0x38]\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "ldr q9, [x21, x14]\n" - "ldr x26, [x16, #0x40]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr x25, [x16, #0x48]\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v12.8h\n" - "ldr q11, [x20, x14]\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "ldr q10, [x25, x14]\n" - "ldr x24, [x16, #0x50]\n" - "fmla v31.8h, v5.8h, v12.8h\n" - "ldr x23, [x16, #0x58]\n" - "fmla v30.8h, v4.8h, v12.8h\n" - "fmla v29.8h, v6.8h, v9.8h\n" - "ldr q12, [x19, x14]\n" - "fmla v28.8h, v3.8h, v13.8h\n" - "ldr q9, [x26, x14]\n" - "ldr x22, [x16, #0x60]\n" - "fmla v31.8h, v7.8h, v13.8h\n" - "ldr x21, [x16, #0x68]\n" - "fmla v30.8h, v6.8h, v13.8h\n" - "fmla v29.8h, v4.8h, v13.8h\n" - "ldr x20, [x16, #0x70]\n" - "fmla v28.8h, v8.8h, v11.8h\n" - "ldr q11, [x24, x14]\n" - "ldr x19, [x16, #0x78]\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v4.8h, v9.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v3.8h, v9.8h\n" + "ldr x21, [x9, #0x28]\n" + "ldr x20, [x9, #0x30]\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "ldr q9, [x21, x28]\n" + "ldr x19, [x9, #0x38]\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "ldr q11, [x20, x28]\n" + "ldr x25, [x9, #0x48]\n" + "fmla v30.8h, v2.8h, v12.8h\n" "fmla v31.8h, v1.8h, v12.8h\n" - "fmla v30.8h, v0.8h, v12.8h\n" - "ldr q12, [x23, x14]\n" - "fmla v29.8h, v5.8h, v10.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "fmla v31.8h, v2.8h, v9.8h\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "ldr q9, [x22, x14]\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "fmla v28.8h, v2.8h, v12.8h\n" - "fmla v31.8h, v8.8h, v10.8h\n" - "fmla v30.8h, v7.8h, v10.8h\n" - "ldr q10, [x21, x14]\n" - "fmla v29.8h, v3.8h, v9.8h\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x20, x14]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr q12, [x19, x14]\n" - "add x14, x14, #0x10\n" - "fmla v28.8h, v5.8h, v10.8h\n" - "fmla v31.8h, v6.8h, v9.8h\n" - "fmla v29.8h, v7.8h, v11.8h\n" - "fmla v30.8h, v8.8h, v10.8h\n" - "fmla v28.8h, v6.8h, v11.8h\n" - "fmla v29.8h, v8.8h, v12.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "str q31, [x13, x28]\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "str q30, [x12, x28]\n" - "fmin v29.8h, v29.8h, v17.8h\n" + "ldr x26, [x9, #0x40]\n" + "ldr q10, [x25, x28]\n" + "fmla v28.8h, v5.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v12.8h\n" + "ldr q12, [x19, x28]\n" + "ldr x24, [x9, #0x50]\n" + "fmla v30.8h, v6.8h, v9.8h\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "ldr q9, [x26, x28]\n" + "ldr x23, [x9, #0x58]\n" + "fmla v28.8h, v7.8h, v13.8h\n" + "fmla v29.8h, v6.8h, v13.8h\n" + "ldr x22, [x9, #0x60]\n" + "ldr x21, [x9, #0x68]\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "fmla v31.8h, v8.8h, v11.8h\n" + "ldr q11, [x24, x28]\n" + "ldr x20, [x9, #0x70]\n" + "fmla v28.8h, v1.8h, v12.8h\n" + "fmla v29.8h, v0.8h, v12.8h\n" + "ldr q12, [x23, x28]\n" + "ldr x19, [x9, #0x78]\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "add x27, x27, #0x10\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "ldr q9, [x22, x28]\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "fmla v28.8h, v8.8h, v10.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "ldr q10, [x21, x28]\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "fmla v31.8h, v5.8h, v10.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "ldr q11, [x20, x28]\n" + "fmla v29.8h, v5.8h, v12.8h\n" + "ldr q12, [x19, x28]\n" + "fmla v30.8h, v7.8h, v11.8h\n" + "fmla v31.8h, v6.8h, v11.8h\n" + "add x28, x28, #0x10\n" + "fmla v28.8h, v6.8h, v9.8h\n" + "fmla v29.8h, v8.8h, v10.8h\n" "fmax v28.8h, v28.8h, v18.8h\n" - "str q29, [x10, x28]\n" + "fmla v30.8h, v8.8h, v12.8h\n" + "fmla v31.8h, v7.8h, v12.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" "fmin v28.8h, v28.8h, v17.8h\n" - "str q28, [x9, x28]\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "str q28, [x13, x27]\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "str q29, [x12, x27]\n" + "str q30, [x11, x27]\n" + "str q31, [x10, x27]\n" "3:" // Oddments - "tst %x[n_channels], #0x1\n" - "beq 30f\n" - "ldr q16, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "mov x28, x14\n" - "ldr q1, [x15, #0x20]\n" - "add x13, x13, x28\n" - "ldr q2, [x15, #0x30]\n" - "add x12, x12, x28\n" - "ldr q3, [x15, #0x40]\n" - "add x10, x10, x28\n" - "ldr q4, [x15, #0x50]\n" - "add x9, x9, x28\n" - "ldr q5, [x15, #0x60]\n" - "ldr q6, [x15, #0x70]\n" - "ldr q7, [x15, #0x80]\n" - "ldr q8, [x15, #0x90]\n" - "ldr x26, [x16, #0x0]\n" - "ldr x25, [x16, #0x8]\n" - "add x26, x26, x14\n" - "ldr x24, [x16, #0x10]\n" - "ldr x23, [x16, #0x18]\n" - "add x25, x25, x14\n" - "ldr x22, [x16, #0x20]\n" - "add x24, x24, x14\n" - "add x23, x23, x14\n" - "add x22, x22, x14\n" + "tst %x[n_channels], #0x7\n" + "beq 56f\n" + "mov x27, x28\n" + "ldr x26, [x9, #0x0]\n" + "ldr x25, [x9, #0x8]\n" + "ldr x24, [x9, #0x10]\n" + "add x13, x13, x27\n" + "add x12, x12, x27\n" + "ldr x23, [x9, #0x18]\n" + "ldr x22, [x9, #0x20]\n" + "add x11, x11, x27\n" + "add x10, x10, x27\n" + "ldr q16, [x14, #0x0]\n" + "ldr q0, [x14, #0x10]\n" + "add x26, x26, x28\n" + "add x25, x25, x28\n" + "ldr q1, [x14, #0x20]\n" + "ldr q2, [x14, #0x30]\n" + "add x24, x24, x28\n" + "add x23, x23, x28\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "add x22, x22, x28\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "tbz %x[n_channels], #2, 5f\n" + "ld1 { v9.d }[0], [x26], #0x8\n" + "ld1 { v10.d }[0], [x25], #0x8\n" + "ld1 { v11.d }[0], [x24], #0x8\n" + "ld1 { v12.d }[0], [x23], #0x8\n" + "ld1 { v13.d }[0], [x22], #0x8\n" "tbz %x[n_channels], #1, 4f\n" + "ld1 { v9.s }[2], [x26], #0x4\n" + "ld1 { v10.s }[2], [x25], #0x4\n" + "ld1 { v11.s }[2], [x24], #0x4\n" + "ld1 { v12.s }[2], [x23], #0x4\n" + "ld1 { v13.s }[2], [x22], #0x4\n" + "tbz %x[n_channels], #0, 7f\n" + "ld1 { v9.h }[6], [x26], #0x2\n" + "ld1 { v10.h }[6], [x25], #0x2\n" + "ld1 { v11.h }[6], [x24], #0x2\n" + "ld1 { v12.h }[6], [x23], #0x2\n" + "ld1 { v13.h }[6], [x22], #0x2\n" + "b 7f\n" + "4:" // Oddments: Load inputs (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 7f\n" + "ld1 { v9.h }[4], [x26], #0x2\n" + "ld1 { v10.h }[4], [x25], #0x2\n" + "ld1 { v11.h }[4], [x24], #0x2\n" + "ld1 { v12.h }[4], [x23], #0x2\n" + "ld1 { v13.h }[4], [x22], #0x2\n" + "b 7f\n" + "5:" // Oddments: Load inputs (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 6f\n" "ld1 { v9.s }[0], [x26], #0x4\n" "ld1 { v10.s }[0], [x25], #0x4\n" "ld1 { v11.s }[0], [x24], #0x4\n" "ld1 { v12.s }[0], [x23], #0x4\n" "ld1 { v13.s }[0], [x22], #0x4\n" - "tbz %x[n_channels], #0, 5f\n" + "tbz %x[n_channels], #0, 7f\n" "ld1 { v9.h }[2], [x26], #0x2\n" "ld1 { v10.h }[2], [x25], #0x2\n" "ld1 { v11.h }[2], [x24], #0x2\n" "ld1 { v12.h }[2], [x23], #0x2\n" "ld1 { v13.h }[2], [x22], #0x2\n" - "b 5f\n" - "4:" // Oddments: Load inputs (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 1: Unset + "b 7f\n" + "6:" // Oddments: Load inputs (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v9.h }[0], [x26], #0x2\n" "ld1 { v10.h }[0], [x25], #0x2\n" "ld1 { v11.h }[0], [x24], #0x2\n" "ld1 { v12.h }[0], [x23], #0x2\n" "ld1 { v13.h }[0], [x22], #0x2\n" - "5:" // Oddments: Load inputs (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 1: End - "mov v31.16b, v16.16b\n fmla v31.8h, v4.8h, v9.8h\n" - "ldr x21, [x16, #0x28]\n" - "add x21, x21, x14\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v3.8h, v9.8h\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v1.8h, v9.8h\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v12.8h\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "fmla v31.8h, v5.8h, v12.8h\n" - "fmla v30.8h, v4.8h, v12.8h\n" - "tbz %x[n_channels], #1, 6f\n" + "7:" // Oddments: Load inputs (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 2: End + "mov v28.16b, v16.16b\n fmla v28.8h, v4.8h, v9.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v3.8h, v9.8h\n" + "ldr x21, [x9, #0x28]\n" + "add x21, x21, x28\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v12.8h\n" + "fmla v30.8h, v2.8h, v12.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "tbz %x[n_channels], #2, 9f\n" + "ld1 { v9.d }[0], [x21], #0x8\n" + "tbz %x[n_channels], #1, 8f\n" + "ld1 { v9.s }[2], [x21], #0x4\n" + "tbz %x[n_channels], #0, 11f\n" + "ld1 { v9.h }[6], [x21], #0x2\n" + "b 11f\n" + "8:" // Oddments: Load input (3, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 11f\n" + "ld1 { v9.h }[4], [x21], #0x2\n" + "b 11f\n" + "9:" // Oddments: Load input (3, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 10f\n" "ld1 { v9.s }[0], [x21], #0x4\n" - "tbz %x[n_channels], #0, 7f\n" + "tbz %x[n_channels], #0, 11f\n" "ld1 { v9.h }[2], [x21], #0x2\n" - "b 7f\n" - "6:" // Oddments: Load input (3, 0): Bit 1: Unset + "b 11f\n" + "10:" // Oddments: Load input (3, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v9.h }[0], [x21], #0x2\n" - "7:" // Oddments: Load input (3, 0): Bit 1: End - "fmla v29.8h, v6.8h, v9.8h\n" - "ldr x20, [x16, #0x30]\n" - "fmla v31.8h, v7.8h, v13.8h\n" - "add x20, x20, x14\n" - "fmla v30.8h, v6.8h, v13.8h\n" - "fmla v28.8h, v3.8h, v13.8h\n" - "fmla v29.8h, v4.8h, v13.8h\n" - "tbz %x[n_channels], #1, 8f\n" + "11:" // Oddments: Load input (3, 0): Bit 2: End + "fmla v30.8h, v6.8h, v9.8h\n" + "ldr x20, [x9, #0x30]\n" + "fmla v28.8h, v7.8h, v13.8h\n" + "add x20, x20, x28\n" + "fmla v29.8h, v6.8h, v13.8h\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "tbz %x[n_channels], #2, 13f\n" + "ld1 { v11.d }[0], [x20], #0x8\n" + "tbz %x[n_channels], #1, 12f\n" + "ld1 { v11.s }[2], [x20], #0x4\n" + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v11.h }[6], [x20], #0x2\n" + "b 15f\n" + "12:" // Oddments: Load input (3, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v11.h }[4], [x20], #0x2\n" + "b 15f\n" + "13:" // Oddments: Load input (3, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 14f\n" "ld1 { v11.s }[0], [x20], #0x4\n" - "tbz %x[n_channels], #0, 9f\n" + "tbz %x[n_channels], #0, 15f\n" "ld1 { v11.h }[2], [x20], #0x2\n" - "b 9f\n" - "8:" // Oddments: Load input (3, 3): Bit 1: Unset + "b 15f\n" + "14:" // Oddments: Load input (3, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x20], #0x2\n" - "9:" // Oddments: Load input (3, 3): Bit 1: End - "fmla v28.8h, v8.8h, v11.8h\n" - "ldr x19, [x16, #0x38]\n" - "add x19, x19, x14\n" - "tbz %x[n_channels], #1, 10f\n" + "15:" // Oddments: Load input (3, 3): Bit 2: End + "ldr x19, [x9, #0x38]\n" + "fmla v31.8h, v8.8h, v11.8h\n" + "add x19, x19, x28\n" + "tbz %x[n_channels], #2, 17f\n" + "ld1 { v12.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 16f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v12.h }[6], [x19], #0x2\n" + "b 19f\n" + "16:" // Oddments: Load input (0, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v12.h }[4], [x19], #0x2\n" + "b 19f\n" + "17:" // Oddments: Load input (0, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 18f\n" "ld1 { v12.s }[0], [x19], #0x4\n" - "tbz %x[n_channels], #0, 11f\n" + "tbz %x[n_channels], #0, 19f\n" "ld1 { v12.h }[2], [x19], #0x2\n" - "b 11f\n" - "10:" // Oddments: Load input (0, 1): Bit 1: Unset + "b 19f\n" + "18:" // Oddments: Load input (0, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x19], #0x2\n" - "11:" // Oddments: Load input (0, 1): Bit 1: End - "fmla v31.8h, v1.8h, v12.8h\n" - "ldr x26, [x16, #0x40]\n" - "fmla v30.8h, v0.8h, v12.8h\n" - "add x26, x26, x14\n" - "tbz %x[n_channels], #1, 12f\n" + "19:" // Oddments: Load input (0, 1): Bit 2: End + "ldr x26, [x9, #0x40]\n" + "fmla v28.8h, v1.8h, v12.8h\n" + "fmla v29.8h, v0.8h, v12.8h\n" + "add x26, x26, x28\n" + "tbz %x[n_channels], #2, 21f\n" + "ld1 { v9.d }[0], [x26], #0x8\n" + "tbz %x[n_channels], #1, 20f\n" + "ld1 { v9.s }[2], [x26], #0x4\n" + "tbz %x[n_channels], #0, 23f\n" + "ld1 { v9.h }[6], [x26], #0x2\n" + "b 23f\n" + "20:" // Oddments: Load input (0, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 23f\n" + "ld1 { v9.h }[4], [x26], #0x2\n" + "b 23f\n" + "21:" // Oddments: Load input (0, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 22f\n" "ld1 { v9.s }[0], [x26], #0x4\n" - "tbz %x[n_channels], #0, 13f\n" + "tbz %x[n_channels], #0, 23f\n" "ld1 { v9.h }[2], [x26], #0x2\n" - "b 13f\n" - "12:" // Oddments: Load input (0, 2): Bit 1: Unset + "b 23f\n" + "22:" // Oddments: Load input (0, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v9.h }[0], [x26], #0x2\n" - "13:" // Oddments: Load input (0, 2): Bit 1: End - "fmla v31.8h, v2.8h, v9.8h\n" - "ldr x25, [x16, #0x48]\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "add x25, x25, x14\n" - "tbz %x[n_channels], #1, 14f\n" + "23:" // Oddments: Load input (0, 2): Bit 2: End + "ldr x25, [x9, #0x48]\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "add x25, x25, x28\n" + "tbz %x[n_channels], #2, 25f\n" + "ld1 { v10.d }[0], [x25], #0x8\n" + "tbz %x[n_channels], #1, 24f\n" + "ld1 { v10.s }[2], [x25], #0x4\n" + "tbz %x[n_channels], #0, 27f\n" + "ld1 { v10.h }[6], [x25], #0x2\n" + "b 27f\n" + "24:" // Oddments: Load input (2, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 27f\n" + "ld1 { v10.h }[4], [x25], #0x2\n" + "b 27f\n" + "25:" // Oddments: Load input (2, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 26f\n" "ld1 { v10.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 15f\n" + "tbz %x[n_channels], #0, 27f\n" "ld1 { v10.h }[2], [x25], #0x2\n" - "b 15f\n" - "14:" // Oddments: Load input (2, 2): Bit 1: Unset + "b 27f\n" + "26:" // Oddments: Load input (2, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v10.h }[0], [x25], #0x2\n" - "15:" // Oddments: Load input (2, 2): Bit 1: End - "fmla v31.8h, v8.8h, v10.8h\n" - "ldr x24, [x16, #0x50]\n" - "fmla v30.8h, v7.8h, v10.8h\n" - "add x24, x24, x14\n" - "fmla v29.8h, v5.8h, v10.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "tbz %x[n_channels], #1, 16f\n" + "27:" // Oddments: Load input (2, 2): Bit 2: End + "ldr x24, [x9, #0x50]\n" + "fmla v28.8h, v8.8h, v10.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "add x24, x24, x28\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "tbz %x[n_channels], #2, 29f\n" + "ld1 { v11.d }[0], [x24], #0x8\n" + "tbz %x[n_channels], #1, 28f\n" + "ld1 { v11.s }[2], [x24], #0x4\n" + "tbz %x[n_channels], #0, 31f\n" + "ld1 { v11.h }[6], [x24], #0x2\n" + "b 31f\n" + "28:" // Oddments: Load input (1, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 31f\n" + "ld1 { v11.h }[4], [x24], #0x2\n" + "b 31f\n" + "29:" // Oddments: Load input (1, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 30f\n" "ld1 { v11.s }[0], [x24], #0x4\n" - "tbz %x[n_channels], #0, 17f\n" + "tbz %x[n_channels], #0, 31f\n" "ld1 { v11.h }[2], [x24], #0x2\n" - "b 17f\n" - "16:" // Oddments: Load input (1, 0): Bit 1: Unset + "b 31f\n" + "30:" // Oddments: Load input (1, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x24], #0x2\n" - "17:" // Oddments: Load input (1, 0): Bit 1: End - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr x23, [x16, #0x58]\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "add x23, x23, x14\n" - "tbz %x[n_channels], #1, 18f\n" + "31:" // Oddments: Load input (1, 0): Bit 2: End + "ldr x23, [x9, #0x58]\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "add x23, x23, x28\n" + "tbz %x[n_channels], #2, 33f\n" + "ld1 { v12.d }[0], [x23], #0x8\n" + "tbz %x[n_channels], #1, 32f\n" + "ld1 { v12.s }[2], [x23], #0x4\n" + "tbz %x[n_channels], #0, 35f\n" + "ld1 { v12.h }[6], [x23], #0x2\n" + "b 35f\n" + "32:" // Oddments: Load input (1, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 35f\n" + "ld1 { v12.h }[4], [x23], #0x2\n" + "b 35f\n" + "33:" // Oddments: Load input (1, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 34f\n" "ld1 { v12.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 19f\n" + "tbz %x[n_channels], #0, 35f\n" "ld1 { v12.h }[2], [x23], #0x2\n" - "b 19f\n" - "18:" // Oddments: Load input (1, 3): Bit 1: Unset + "b 35f\n" + "34:" // Oddments: Load input (1, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x23], #0x2\n" - "19:" // Oddments: Load input (1, 3): Bit 1: End - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr x22, [x16, #0x60]\n" - "fmla v28.8h, v2.8h, v12.8h\n" - "add x22, x22, x14\n" - "tbz %x[n_channels], #1, 20f\n" + "35:" // Oddments: Load input (1, 3): Bit 2: End + "ldr x22, [x9, #0x60]\n" + "fmla v29.8h, v5.8h, v12.8h\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "add x22, x22, x28\n" + "tbz %x[n_channels], #2, 37f\n" + "ld1 { v9.d }[0], [x22], #0x8\n" + "tbz %x[n_channels], #1, 36f\n" + "ld1 { v9.s }[2], [x22], #0x4\n" + "tbz %x[n_channels], #0, 39f\n" + "ld1 { v9.h }[6], [x22], #0x2\n" + "b 39f\n" + "36:" // Oddments: Load input (2, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 39f\n" + "ld1 { v9.h }[4], [x22], #0x2\n" + "b 39f\n" + "37:" // Oddments: Load input (2, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 38f\n" "ld1 { v9.s }[0], [x22], #0x4\n" - "tbz %x[n_channels], #0, 21f\n" + "tbz %x[n_channels], #0, 39f\n" "ld1 { v9.h }[2], [x22], #0x2\n" - "b 21f\n" - "20:" // Oddments: Load input (2, 0): Bit 1: Unset + "b 39f\n" + "38:" // Oddments: Load input (2, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v9.h }[0], [x22], #0x2\n" - "21:" // Oddments: Load input (2, 0): Bit 1: End - "fmla v31.8h, v6.8h, v9.8h\n" - "ldr x21, [x16, #0x68]\n" - "fmla v29.8h, v3.8h, v9.8h\n" - "add x21, x21, x14\n" - "tbz %x[n_channels], #1, 22f\n" + "39:" // Oddments: Load input (2, 0): Bit 2: End + "ldr x21, [x9, #0x68]\n" + "fmla v28.8h, v6.8h, v9.8h\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "add x21, x21, x28\n" + "tbz %x[n_channels], #2, 41f\n" + "ld1 { v10.d }[0], [x21], #0x8\n" + "tbz %x[n_channels], #1, 40f\n" + "ld1 { v10.s }[2], [x21], #0x4\n" + "tbz %x[n_channels], #0, 43f\n" + "ld1 { v10.h }[6], [x21], #0x2\n" + "b 43f\n" + "40:" // Oddments: Load input (2, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 43f\n" + "ld1 { v10.h }[4], [x21], #0x2\n" + "b 43f\n" + "41:" // Oddments: Load input (2, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 42f\n" "ld1 { v10.s }[0], [x21], #0x4\n" - "tbz %x[n_channels], #0, 23f\n" + "tbz %x[n_channels], #0, 43f\n" "ld1 { v10.h }[2], [x21], #0x2\n" - "b 23f\n" - "22:" // Oddments: Load input (2, 3): Bit 1: Unset + "b 43f\n" + "42:" // Oddments: Load input (2, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v10.h }[0], [x21], #0x2\n" - "23:" // Oddments: Load input (2, 3): Bit 1: End - "fmla v30.8h, v8.8h, v10.8h\n" - "ldr x20, [x16, #0x70]\n" - "fmla v28.8h, v5.8h, v10.8h\n" - "add x20, x20, x14\n" - "tbz %x[n_channels], #1, 24f\n" + "43:" // Oddments: Load input (2, 3): Bit 2: End + "ldr x20, [x9, #0x70]\n" + "fmla v29.8h, v8.8h, v10.8h\n" + "fmla v31.8h, v5.8h, v10.8h\n" + "add x20, x20, x28\n" + "tbz %x[n_channels], #2, 45f\n" + "ld1 { v11.d }[0], [x20], #0x8\n" + "tbz %x[n_channels], #1, 44f\n" + "ld1 { v11.s }[2], [x20], #0x4\n" + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v11.h }[6], [x20], #0x2\n" + "b 47f\n" + "44:" // Oddments: Load input (3, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v11.h }[4], [x20], #0x2\n" + "b 47f\n" + "45:" // Oddments: Load input (3, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 46f\n" "ld1 { v11.s }[0], [x20], #0x4\n" - "tbz %x[n_channels], #0, 25f\n" + "tbz %x[n_channels], #0, 47f\n" "ld1 { v11.h }[2], [x20], #0x2\n" - "b 25f\n" - "24:" // Oddments: Load input (3, 1): Bit 1: Unset + "b 47f\n" + "46:" // Oddments: Load input (3, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x20], #0x2\n" - "25:" // Oddments: Load input (3, 1): Bit 1: End - "fmla v29.8h, v7.8h, v11.8h\n" - "ldr x19, [x16, #0x78]\n" - "fmla v28.8h, v6.8h, v11.8h\n" - "add x19, x19, x14\n" - "tbz %x[n_channels], #1, 26f\n" + "47:" // Oddments: Load input (3, 1): Bit 2: End + "ldr x19, [x9, #0x78]\n" + "fmla v30.8h, v7.8h, v11.8h\n" + "fmla v31.8h, v6.8h, v11.8h\n" + "add x19, x19, x28\n" + "tbz %x[n_channels], #2, 49f\n" + "ld1 { v12.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 48f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v12.h }[6], [x19], #0x2\n" + "b 51f\n" + "48:" // Oddments: Load input (3, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v12.h }[4], [x19], #0x2\n" + "b 51f\n" + "49:" // Oddments: Load input (3, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 50f\n" "ld1 { v12.s }[0], [x19], #0x4\n" - "tbz %x[n_channels], #0, 27f\n" + "tbz %x[n_channels], #0, 51f\n" "ld1 { v12.h }[2], [x19], #0x2\n" - "b 27f\n" - "26:" // Oddments: Load input (3, 2): Bit 1: Unset + "b 51f\n" + "50:" // Oddments: Load input (3, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x19], #0x2\n" - "27:" // Oddments: Load input (3, 2): Bit 1: End - "fmla v29.8h, v8.8h, v12.8h\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "fmin v30.8h, v30.8h, v17.8h\n" + "51:" // Oddments: Load input (3, 2): Bit 2: End + "fmla v30.8h, v8.8h, v12.8h\n" + "fmla v31.8h, v7.8h, v12.8h\n" "fmax v28.8h, v28.8h, v18.8h\n" - "fmin v29.8h, v29.8h, v17.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" "fmin v28.8h, v28.8h, v17.8h\n" - "tbz %x[n_channels], #1, 28f\n" - "st1 { v31.s }[0], [x13], #0x4\n" - "st1 { v30.s }[0], [x12], #0x4\n" - "st1 { v29.s }[0], [x10], #0x4\n" - "st1 { v28.s }[0], [x9], #0x4\n" - "tbz %x[n_channels], #0, 29f\n" - "st1 { v31.h }[2], [x13], #0x2\n" - "st1 { v30.h }[2], [x12], #0x2\n" - "st1 { v29.h }[2], [x10], #0x2\n" - "st1 { v28.h }[2], [x9], #0x2\n" - "b 29f\n" - "28:" // Oddments: Store: Bit 1: Unset - "st1 { v31.h }[0], [x13], #0x2\n" - "st1 { v30.h }[0], [x12], #0x2\n" - "st1 { v29.h }[0], [x10], #0x2\n" - "st1 { v28.h }[0], [x9], #0x2\n" - "29:" // Oddments: Store: Bit 1: End + "fmin v29.8h, v29.8h, v17.8h\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "tbz %x[n_channels], #2, 53f\n" + "st1 { v28.d }[0], [x13], #0x8\n" + "st1 { v29.d }[0], [x12], #0x8\n" + "st1 { v30.d }[0], [x11], #0x8\n" + "st1 { v31.d }[0], [x10], #0x8\n" + "tbz %x[n_channels], #1, 52f\n" + "st1 { v28.s }[2], [x13], #0x4\n" + "st1 { v29.s }[2], [x12], #0x4\n" + "st1 { v30.s }[2], [x11], #0x4\n" + "st1 { v31.s }[2], [x10], #0x4\n" + "tbz %x[n_channels], #0, 55f\n" + "st1 { v28.h }[6], [x13], #0x2\n" + "st1 { v29.h }[6], [x12], #0x2\n" + "st1 { v30.h }[6], [x11], #0x2\n" + "st1 { v31.h }[6], [x10], #0x2\n" + "b 55f\n" + "52:" // Oddments: Store: Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 55f\n" + "st1 { v28.h }[4], [x13], #0x2\n" + "st1 { v29.h }[4], [x12], #0x2\n" + "st1 { v30.h }[4], [x11], #0x2\n" + "st1 { v31.h }[4], [x10], #0x2\n" + "b 55f\n" + "53:" // Oddments: Store: Bit 2: Unset + "tbz %x[n_channels], #1, 54f\n" + "st1 { v28.s }[0], [x13], #0x4\n" + "st1 { v29.s }[0], [x12], #0x4\n" + "st1 { v30.s }[0], [x11], #0x4\n" + "st1 { v31.s }[0], [x10], #0x4\n" + "tbz %x[n_channels], #0, 55f\n" + "st1 { v28.h }[2], [x13], #0x2\n" + "st1 { v29.h }[2], [x12], #0x2\n" + "st1 { v30.h }[2], [x11], #0x2\n" + "st1 { v31.h }[2], [x10], #0x2\n" + "b 55f\n" + "54:" // Oddments: Store: Bit 2: Unset: Bit 1: Unset + "st1 { v28.h }[0], [x13], #0x2\n" + "st1 { v29.h }[0], [x12], #0x2\n" + "st1 { v30.h }[0], [x11], #0x2\n" + "st1 { v31.h }[0], [x10], #0x2\n" + "55:" // Oddments: Store: Bit 2: End - "30:" // End + "56:" // End : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp index 3bdd544a54..c2d67661f6 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp @@ -87,739 +87,1069 @@ void a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst_direct_impl( ); __asm__ __volatile__( - "mov x7, #0x0\n" - "mov x8, #0x0\n" + "mov x23, #0x0\n" + "mov x22, #0x0\n" "1:" // Tile loop - "str x7, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "str x23, [%x[params_struct], %[offsetof_args_tile_i]]\n" "mov x26, #0x3\n" - "str x8, [%x[params_struct], %[offsetof_args_tile_j]]\n" "mov x25, #0x3\n" - "ldr x17, [%x[params_struct], %[offsetof_args_params]]\n" - "add x24, %x[params_struct], %[offsetof_args_min]\n" - "ldr x22, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" - "add x21, %x[params_struct], %[offsetof_args_max]\n" - "ldr x16, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" - "mov x23, #0x0\n" + "str x22, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x24, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" + "ldr x21, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" + "mul x20, x23, x24\n" // offset = tile_i * ld_input_row + "ldr x17, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" + "ldr x16, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" + "mul x19, x23, x21\n" // offset = tile_i * ld_output_row + "mov x23, #0x10\n" // cntb _, ALL, #1 + "madd x20, x22, x17, x20\n" // offset += tile_j * ld_input_col "ldr x15, [%x[params_struct], %[offsetof_args_inptr]]\n" - "mul x19, x7, x22\n" // offset = tile_i * ld_input_row - "ldr x20, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" - "madd x19, x8, x16, x19\n" // offset += tile_j * ld_input_col - "ldr x14, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" - "mul x19, x19, x26\n" // offset *= kernel_stride * output_size - "ldr x13, [%x[params_struct], %[offsetof_args_outptr]]\n" - "add x15, x15, x19, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) - "ld1r { v18.8h }, [x24]\n" - "add x12, x15, x22, LSL #1\n" - "ld1r { v17.8h }, [x21]\n" - "add x11, x12, x22, LSL #1\n" + "lsl x17, x17, #0x1\n" + "ldr x14, [%x[params_struct], %[offsetof_args_outptr]]\n" + "madd x19, x22, x16, x19\n" // offset += tile_j * ld_output_col "lsl x16, x16, #0x1\n" - "add x10, x11, x22, LSL #1\n" - "add x9, x10, x22, LSL #1\n" - "add x28, x16, x16\n" - "add x27, x28, x16\n" - "add x26, x27, x16\n" - "mul x19, x7, x20\n" // offset = tile_i * ld_output_row - "madd x19, x8, x14, x19\n" // offset += tile_j * ld_output_col - "mul x19, x19, x25\n" // offset *= output_tile_size - "add x13, x13, x19, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) - "add x25, x13, x20, LSL #1\n" - "add x24, x25, x20, LSL #1\n" - "lsl x14, x14, #0x1\n" - "add x22, x14, x14\n" - "mov x21, #0x10\n" // cntb _, ALL, #1 - "sub x20, XZR, x21\n" - "lsr x19, %x[n_channels], #0x3\n" - "cbz x19, 4f\n" - "ldr q16, [x17, #0x0]\n" - "ldr q0, [x17, #0x10]\n" - "cmp x21, x19, LSL #4\n" - "ldr q1, [x17, #0x20]\n" - "ldr q2, [x17, #0x30]\n" - "ldr q3, [x17, #0x40]\n" - "ldr q4, [x17, #0x50]\n" - "ldr q5, [x17, #0x60]\n" - "ldr q6, [x17, #0x70]\n" - "ldr q7, [x17, #0x80]\n" - "ldr q8, [x17, #0x90]\n" - "add x17, x17, #0xa0\n" - "ldr q9, [x11, x28]\n" + "lsr x22, %x[n_channels], #0x3\n" + "ldr x13, [%x[params_struct], %[offsetof_args_params]]\n" + "mul x20, x20, x26\n" // offset *= kernel_stride * output_size + "add x15, x15, x20, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) + "add x12, x15, x24, LSL #1\n" + "mul x19, x19, x25\n" // offset *= output_tile_size + "add x11, x12, x24, LSL #1\n" + "add x10, x17, x17\n" + "add x14, x14, x19, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) + "add x9, x11, x24, LSL #1\n" + "add x28, x10, x17\n" + "add x27, x14, x21, LSL #1\n" + "add x20, %x[params_struct], %[offsetof_args_min]\n" + "add x19, %x[params_struct], %[offsetof_args_max]\n" + "ld1r { v18.8h }, [x20]\n" + "ld1r { v17.8h }, [x19]\n" + "add x26, x9, x24, LSL #1\n" + "add x25, x28, x17\n" + "add x24, x27, x21, LSL #1\n" + "add x21, x16, x16\n" + "mov x20, #0x0\n" + "sub x19, XZR, x23\n" + "cbz x22, 4f\n" + "ldr q16, [x13, #0x0]\n" + "cmp x23, x22, LSL #4\n" + "ldr q0, [x13, #0x10]\n" + "ldr q1, [x13, #0x20]\n" + "ldr q2, [x13, #0x30]\n" + "ldr q3, [x13, #0x40]\n" + "ldr q4, [x13, #0x50]\n" + "ldr q5, [x13, #0x60]\n" + "ldr q6, [x13, #0x70]\n" + "ldr q7, [x13, #0x80]\n" + "ldr q8, [x13, #0x90]\n" + "ldr q9, [x11, x10]\n" + "add x13, x13, #0xa0\n" "ld1 { v10.8h }, [x15]\n" - "ldr q11, [x15, x26]\n" - "ld1 { v12.8h }, [x9]\n" - "ldr q13, [x12, x28]\n" + "ldr q11, [x15, x25]\n" + "ld1 { v12.8h }, [x26]\n" + "ldr q13, [x12, x10]\n" "bge 3f\n" "2:" // Tile loop: Channel loop - "mov v31.16b, v16.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "add x20, x20, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v7.8h, v9.8h\n" + "mov v24.16b, v16.16b\n fmla v24.8h, v7.8h, v9.8h\n" + "mov v23.16b, v16.16b\n fmla v23.8h, v8.8h, v9.8h\n" "add x23, x23, #0x10\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "add x21, x21, #0x10\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v5.8h, v9.8h\n" - "cmp x21, x19, LSL #4\n" + "cmp x23, x22, LSL #4\n" + "mov v25.16b, v16.16b\n fmla v25.8h, v6.8h, v9.8h\n" + "fmla v24.8h, v4.8h, v13.8h\n" + "add x19, x19, #0x10\n" + "add x20, x20, #0x10\n" + "mov v26.16b, v16.16b\n fmla v26.8h, v5.8h, v9.8h\n" "mov v27.16b, v16.16b\n fmla v27.8h, v4.8h, v9.8h\n" - "mov v26.16b, v16.16b\n fmla v26.8h, v3.8h, v9.8h\n" - "mov v25.16b, v16.16b\n fmla v25.8h, v2.8h, v9.8h\n" - "mov v24.16b, v16.16b\n fmla v24.8h, v1.8h, v9.8h\n" - "mov v23.16b, v16.16b\n fmla v23.8h, v0.8h, v9.8h\n" - "ldr q16, [x17, #0x0]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr q10, [x11, x27]\n" - "fmla v29.8h, v2.8h, v11.8h\n" - "ldr q11, [x11, x16]\n" - "fmla v25.8h, v6.8h, v12.8h\n" - "ldr q12, [x9, x26]\n" - "fmla v30.8h, v4.8h, v13.8h\n" - "fmla v31.8h, v5.8h, v13.8h\n" - "fmla v29.8h, v3.8h, v13.8h\n" - "fmla v28.8h, v2.8h, v13.8h\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v3.8h, v9.8h\n" + "fmla v23.8h, v0.8h, v10.8h\n" + "ldr q10, [x11, x28]\n" + "fmla v25.8h, v2.8h, v11.8h\n" + "ldr q11, [x11, x17]\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v2.8h, v9.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "fmla v23.8h, v5.8h, v13.8h\n" + "fmla v25.8h, v3.8h, v13.8h\n" + "fmla v26.8h, v2.8h, v13.8h\n" "fmla v27.8h, v1.8h, v13.8h\n" - "fmla v26.8h, v0.8h, v13.8h\n" - "ldr q13, [x15, x16]\n" - "fmla v23.8h, v8.8h, v12.8h\n" - "ldr q12, [x15, x27]\n" - "fmla v31.8h, v7.8h, v11.8h\n" - "fmla v30.8h, v6.8h, v11.8h\n" - "fmla v28.8h, v4.8h, v11.8h\n" + "fmla v28.8h, v0.8h, v13.8h\n" + "ldr q13, [x15, x17]\n" + "fmla v29.8h, v6.8h, v12.8h\n" + "ldr q12, [x26, x25]\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "fmla v24.8h, v0.8h, v13.8h\n" + "ldr q16, [x13, #0x0]\n" + "fmla v31.8h, v8.8h, v12.8h\n" + "ldr q12, [x15, x28]\n" + "fmla v23.8h, v7.8h, v11.8h\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "fmla v26.8h, v4.8h, v11.8h\n" "fmla v27.8h, v3.8h, v11.8h\n" - "fmla v25.8h, v1.8h, v11.8h\n" - "fmla v24.8h, v0.8h, v11.8h\n" + "fmla v29.8h, v1.8h, v11.8h\n" "ld1 { v11.8h }, [x12]\n" - "fmla v31.8h, v1.8h, v13.8h\n" - "fmla v30.8h, v0.8h, v13.8h\n" - "ldr q13, [x12, x26]\n" - "fmla v29.8h, v1.8h, v12.8h\n" + "fmla v24.8h, v2.8h, v12.8h\n" + "fmla v25.8h, v1.8h, v12.8h\n" + "ld1 { v12.8h }, [x9]\n" + "fmla v28.8h, v4.8h, v10.8h\n" + "fmla v23.8h, v1.8h, v13.8h\n" + "ldr q13, [x12, x25]\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "fmla v24.8h, v8.8h, v10.8h\n" + "fmla v25.8h, v7.8h, v10.8h\n" "fmla v27.8h, v5.8h, v10.8h\n" - "fmla v26.8h, v4.8h, v10.8h\n" - "fmla v30.8h, v2.8h, v12.8h\n" - "ld1 { v12.8h }, [x10]\n" - "fmla v29.8h, v7.8h, v10.8h\n" - "fmla v24.8h, v2.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" - "fmla v30.8h, v8.8h, v10.8h\n" - "ldr q10, [x10, x28]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "fmla v28.8h, v0.8h, v11.8h\n" - "ldr q11, [x10, x26]\n" - "fmla v29.8h, v5.8h, v13.8h\n" - "fmla v26.8h, v2.8h, v13.8h\n" - "ldr q13, [x9, x16]\n" - "fmla v25.8h, v3.8h, v12.8h\n" - "fmla v28.8h, v6.8h, v12.8h\n" - "ldr q12, [x12, x16]\n" + "fmla v26.8h, v0.8h, v11.8h\n" + "ldr q10, [x9, x10]\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "fmla v28.8h, v2.8h, v13.8h\n" + "fmla v30.8h, v4.8h, v10.8h\n" + "fmla v31.8h, v3.8h, v10.8h\n" + "fmla v23.8h, v3.8h, v11.8h\n" + "fmla v25.8h, v5.8h, v13.8h\n" + "ldr q11, [x9, x25]\n" + "ldr q13, [x26, x17]\n" + "fmla v26.8h, v6.8h, v12.8h\n" "fmla v27.8h, v7.8h, v10.8h\n" - "fmla v26.8h, v6.8h, v10.8h\n" - "fmla v25.8h, v5.8h, v10.8h\n" - "fmla v28.8h, v8.8h, v10.8h\n" - "fmla v24.8h, v4.8h, v10.8h\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "fmla v26.8h, v8.8h, v11.8h\n" - "fmla v25.8h, v7.8h, v13.8h\n" - "fmla v24.8h, v6.8h, v13.8h\n" - "ldr q13, [x9, x27]\n" - "fmla v23.8h, v5.8h, v11.8h\n" - "ldr q11, [x12, x27]\n" - "add x12, x12, #0x10\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v28.8h, v1.8h, v12.8h\n" + "ldr q12, [x12, x17]\n" + "fmla v29.8h, v5.8h, v10.8h\n" + "fmla v28.8h, v6.8h, v10.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "fmla v30.8h, v6.8h, v13.8h\n" + "fmla v26.8h, v8.8h, v10.8h\n" + "fmla v29.8h, v7.8h, v13.8h\n" + "ldr q13, [x26, x28]\n" + "fmla v24.8h, v3.8h, v12.8h\n" "fmla v27.8h, v0.8h, v12.8h\n" - "ldr q12, [x10, x16]\n" - "fmla v29.8h, v4.8h, v11.8h\n" - "fmla v30.8h, v5.8h, v11.8h\n" - "fmla v26.8h, v1.8h, v11.8h\n" + "fmla v28.8h, v8.8h, v11.8h\n" + "ldr q11, [x12, x28]\n" + "fmla v30.8h, v8.8h, v13.8h\n" + "add x12, x12, #0x10\n" + "fmla v31.8h, v7.8h, v13.8h\n" + "fmla v23.8h, v4.8h, v12.8h\n" + "ldr q13, [x9, x28]\n" + "fmla v26.8h, v1.8h, v12.8h\n" + "fmla v24.8h, v5.8h, v11.8h\n" + "ldr q12, [x9, x17]\n" + "add x9, x9, #0x10\n" + "fmla v25.8h, v4.8h, v11.8h\n" "fmla v27.8h, v2.8h, v11.8h\n" - "ldr q11, [x15, x28]\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "ldr q11, [x15, x10]\n" + "fmla v29.8h, v4.8h, v12.8h\n" "add x15, x15, #0x10\n" - "fmla v24.8h, v8.8h, v13.8h\n" + "fmla v30.8h, v3.8h, v12.8h\n" + "fmla v31.8h, v4.8h, v13.8h\n" "ld1 { v10.8h }, [x15]\n" - "fmla v23.8h, v7.8h, v13.8h\n" - "ldr q13, [x10, x27]\n" - "add x10, x10, #0x10\n" - "fmla v28.8h, v7.8h, v12.8h\n" + "ldr q4, [x13, #0x50]\n" + "fmla v26.8h, v7.8h, v12.8h\n" "fmla v27.8h, v6.8h, v12.8h\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "fmla v24.8h, v3.8h, v12.8h\n" "ld1 { v12.8h }, [x11]\n" - "fmla v31.8h, v2.8h, v11.8h\n" - "fmla v30.8h, v1.8h, v11.8h\n" - "ldr q1, [x17, #0x20]\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x11, x26]\n" + "fmla v23.8h, v2.8h, v11.8h\n" + "fmla v24.8h, v1.8h, v11.8h\n" + "fmax v24.8h, v24.8h, v18.8h\n" + "ldr q1, [x13, #0x20]\n" + "fmla v25.8h, v0.8h, v11.8h\n" + "ldr q11, [x11, x25]\n" + "fmla v28.8h, v7.8h, v13.8h\n" "add x11, x11, #0x10\n" + "fmla v30.8h, v5.8h, v13.8h\n" + "fmla v29.8h, v0.8h, v12.8h\n" + "fmin v24.8h, v24.8h, v17.8h\n" + "ldr q9, [x11, x10]\n" + "fmla v31.8h, v2.8h, v11.8h\n" "fmla v27.8h, v8.8h, v13.8h\n" - "ldr q9, [x11, x28]\n" - "fmla v26.8h, v7.8h, v13.8h\n" - "fmla v24.8h, v5.8h, v13.8h\n" - "fmla v23.8h, v4.8h, v13.8h\n" - "ldr q13, [x9, x28]\n" - "add x9, x9, #0x10\n" - "fmla v31.8h, v6.8h, v12.8h\n" - "ldr q4, [x17, #0x50]\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "ldr q3, [x17, #0x40]\n" - "fmla v25.8h, v0.8h, v12.8h\n" - "ld1 { v12.8h }, [x9]\n" - "fmla v29.8h, v8.8h, v11.8h\n" - "ldr q0, [x17, #0x10]\n" - "fmla v26.8h, v5.8h, v11.8h\n" - "ldr q5, [x17, #0x60]\n" - "fmla v23.8h, v2.8h, v11.8h\n" - "ldr q11, [x15, x26]\n" - "fmla v25.8h, v8.8h, v13.8h\n" - "ldr q2, [x17, #0x30]\n" - "fmla v24.8h, v7.8h, v13.8h\n" - "ldr q7, [x17, #0x80]\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "ldr q8, [x17, #0x90]\n" - "fmla v23.8h, v6.8h, v13.8h\n" - "ldr q13, [x12, x28]\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "ldr q6, [x17, #0x70]\n" - "add x17, x17, #0xa0\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "st1 { v31.8h }, [x13]\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "str q30, [x13, x14]\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "fmax v28.8h, v28.8h, v18.8h\n" - "str q29, [x13, x22]\n" - "fmin v28.8h, v28.8h, v17.8h\n" - "add x13, x13, #0x10\n" + "ldr q13, [x26, x10]\n" "fmax v27.8h, v27.8h, v18.8h\n" - "st1 { v28.8h }, [x25]\n" - "fmax v26.8h, v26.8h, v18.8h\n" - "fmax v25.8h, v25.8h, v18.8h\n" - "fmin v27.8h, v27.8h, v17.8h\n" - "str q27, [x25, x14]\n" - "fmin v26.8h, v26.8h, v17.8h\n" - "fmin v25.8h, v25.8h, v17.8h\n" - "str q26, [x25, x22]\n" - "fmax v24.8h, v24.8h, v18.8h\n" - "add x25, x25, #0x10\n" + "fmla v23.8h, v6.8h, v12.8h\n" + "fmla v26.8h, v3.8h, v12.8h\n" "fmax v23.8h, v23.8h, v18.8h\n" - "st1 { v25.8h }, [x24]\n" - "fmin v24.8h, v24.8h, v17.8h\n" - "str q24, [x24, x14]\n" + "add x26, x26, #0x10\n" + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" + "fmax v25.8h, v25.8h, v18.8h\n" + "ldr q11, [x15, x25]\n" + "fmla v29.8h, v8.8h, v13.8h\n" + "fmla v30.8h, v7.8h, v13.8h\n" + "fmax v26.8h, v26.8h, v18.8h\n" + "ld1 { v12.8h }, [x26]\n" + "fmla v31.8h, v6.8h, v13.8h\n" + "fmax v28.8h, v28.8h, v18.8h\n" + "ldr q13, [x12, x10]\n" + "ldr q0, [x13, #0x10]\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "ldr q2, [x13, #0x30]\n" + "ldr q3, [x13, #0x40]\n" + "fmax v31.8h, v31.8h, v18.8h\n" "fmin v23.8h, v23.8h, v17.8h\n" - "str q23, [x24, x22]\n" + "st1 { v23.8h }, [x14]\n" + "ldr q5, [x13, #0x60]\n" + "fmin v25.8h, v25.8h, v17.8h\n" + "fmin v26.8h, v26.8h, v17.8h\n" + "str q24, [x14, x16]\n" + "ldr q6, [x13, #0x70]\n" + "fmin v27.8h, v27.8h, v17.8h\n" + "fmin v28.8h, v28.8h, v17.8h\n" + "str q25, [x14, x21]\n" + "add x14, x14, #0x10\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "st1 { v26.8h }, [x27]\n" + "ldr q7, [x13, #0x80]\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "str q27, [x27, x16]\n" + "ldr q8, [x13, #0x90]\n" + "add x13, x13, #0xa0\n" + "str q28, [x27, x21]\n" + "add x27, x27, #0x10\n" + "st1 { v29.8h }, [x24]\n" + "str q30, [x24, x16]\n" + "str q31, [x24, x21]\n" "add x24, x24, #0x10\n" "blt 2b\n" "3:" // Tile loop: Channel tail - "mov v31.16b, v16.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v7.8h, v9.8h\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v5.8h, v9.8h\n" + "mov v24.16b, v16.16b\n fmla v24.8h, v7.8h, v9.8h\n" + "mov v23.16b, v16.16b\n fmla v23.8h, v8.8h, v9.8h\n" + "mov v25.16b, v16.16b\n fmla v25.8h, v6.8h, v9.8h\n" + "fmla v24.8h, v4.8h, v13.8h\n" + "mov v26.16b, v16.16b\n fmla v26.8h, v5.8h, v9.8h\n" "mov v27.16b, v16.16b\n fmla v27.8h, v4.8h, v9.8h\n" - "mov v26.16b, v16.16b\n fmla v26.8h, v3.8h, v9.8h\n" - "mov v25.16b, v16.16b\n fmla v25.8h, v2.8h, v9.8h\n" - "mov v24.16b, v16.16b\n fmla v24.8h, v1.8h, v9.8h\n" - "mov v23.16b, v16.16b\n fmla v23.8h, v0.8h, v9.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr q10, [x11, x27]\n" - "fmla v29.8h, v2.8h, v11.8h\n" - "ldr q11, [x11, x16]\n" - "fmla v25.8h, v6.8h, v12.8h\n" - "ldr q12, [x9, x26]\n" - "fmla v30.8h, v4.8h, v13.8h\n" - "fmla v31.8h, v5.8h, v13.8h\n" - "fmla v29.8h, v3.8h, v13.8h\n" - "fmla v28.8h, v2.8h, v13.8h\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v3.8h, v9.8h\n" + "fmla v23.8h, v0.8h, v10.8h\n" + "ldr q10, [x11, x28]\n" + "fmla v25.8h, v2.8h, v11.8h\n" + "ldr q11, [x11, x17]\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v2.8h, v9.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "fmla v23.8h, v5.8h, v13.8h\n" + "fmla v25.8h, v3.8h, v13.8h\n" + "fmla v26.8h, v2.8h, v13.8h\n" "fmla v27.8h, v1.8h, v13.8h\n" - "fmla v26.8h, v0.8h, v13.8h\n" - "ldr q13, [x15, x16]\n" - "fmla v23.8h, v8.8h, v12.8h\n" - "ldr q12, [x15, x27]\n" - "fmla v31.8h, v7.8h, v11.8h\n" - "fmla v30.8h, v6.8h, v11.8h\n" - "fmla v28.8h, v4.8h, v11.8h\n" + "fmla v28.8h, v0.8h, v13.8h\n" + "ldr q13, [x15, x17]\n" + "fmla v29.8h, v6.8h, v12.8h\n" + "ldr q12, [x26, x25]\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "fmla v24.8h, v0.8h, v13.8h\n" + "fmla v31.8h, v8.8h, v12.8h\n" + "ldr q12, [x15, x28]\n" + "fmla v23.8h, v7.8h, v11.8h\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "fmla v26.8h, v4.8h, v11.8h\n" "fmla v27.8h, v3.8h, v11.8h\n" - "fmla v25.8h, v1.8h, v11.8h\n" - "fmla v24.8h, v0.8h, v11.8h\n" + "fmla v29.8h, v1.8h, v11.8h\n" "ld1 { v11.8h }, [x12]\n" - "fmla v31.8h, v1.8h, v13.8h\n" - "fmla v30.8h, v0.8h, v13.8h\n" - "ldr q13, [x12, x26]\n" - "fmla v29.8h, v1.8h, v12.8h\n" + "fmla v24.8h, v2.8h, v12.8h\n" + "fmla v25.8h, v1.8h, v12.8h\n" + "ld1 { v12.8h }, [x9]\n" + "fmla v28.8h, v4.8h, v10.8h\n" + "fmla v23.8h, v1.8h, v13.8h\n" + "ldr q13, [x12, x25]\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "fmla v24.8h, v8.8h, v10.8h\n" + "fmla v25.8h, v7.8h, v10.8h\n" "fmla v27.8h, v5.8h, v10.8h\n" - "fmla v26.8h, v4.8h, v10.8h\n" - "fmla v30.8h, v2.8h, v12.8h\n" - "ld1 { v12.8h }, [x10]\n" - "fmla v29.8h, v7.8h, v10.8h\n" - "fmla v24.8h, v2.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" - "fmla v30.8h, v8.8h, v10.8h\n" - "ldr q10, [x10, x28]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "fmla v28.8h, v0.8h, v11.8h\n" - "ldr q11, [x10, x26]\n" - "fmla v29.8h, v5.8h, v13.8h\n" - "fmla v26.8h, v2.8h, v13.8h\n" - "ldr q13, [x9, x16]\n" - "fmla v25.8h, v3.8h, v12.8h\n" - "fmla v28.8h, v6.8h, v12.8h\n" - "ldr q12, [x12, x16]\n" + "fmla v26.8h, v0.8h, v11.8h\n" + "ldr q10, [x9, x10]\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "fmla v28.8h, v2.8h, v13.8h\n" + "fmla v30.8h, v4.8h, v10.8h\n" + "fmla v31.8h, v3.8h, v10.8h\n" + "fmla v23.8h, v3.8h, v11.8h\n" + "fmla v25.8h, v5.8h, v13.8h\n" + "ldr q11, [x9, x25]\n" + "ldr q13, [x26, x17]\n" + "fmla v26.8h, v6.8h, v12.8h\n" "fmla v27.8h, v7.8h, v10.8h\n" - "fmla v26.8h, v6.8h, v10.8h\n" - "fmla v25.8h, v5.8h, v10.8h\n" - "fmla v28.8h, v8.8h, v10.8h\n" - "fmla v24.8h, v4.8h, v10.8h\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "fmla v26.8h, v8.8h, v11.8h\n" - "fmla v25.8h, v7.8h, v13.8h\n" - "fmla v24.8h, v6.8h, v13.8h\n" - "ldr q13, [x9, x27]\n" - "fmla v23.8h, v5.8h, v11.8h\n" - "ldr q11, [x12, x27]\n" - "add x12, x12, #0x10\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v28.8h, v1.8h, v12.8h\n" + "ldr q12, [x12, x17]\n" + "fmla v29.8h, v5.8h, v10.8h\n" + "fmla v28.8h, v6.8h, v10.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "fmla v30.8h, v6.8h, v13.8h\n" + "fmla v26.8h, v8.8h, v10.8h\n" + "fmla v29.8h, v7.8h, v13.8h\n" + "ldr q13, [x26, x28]\n" + "fmla v24.8h, v3.8h, v12.8h\n" "fmla v27.8h, v0.8h, v12.8h\n" - "ldr q12, [x10, x16]\n" - "fmla v29.8h, v4.8h, v11.8h\n" - "fmla v30.8h, v5.8h, v11.8h\n" - "fmla v26.8h, v1.8h, v11.8h\n" + "fmla v28.8h, v8.8h, v11.8h\n" + "ldr q11, [x12, x28]\n" + "fmla v30.8h, v8.8h, v13.8h\n" + "add x12, x12, #0x10\n" + "fmla v31.8h, v7.8h, v13.8h\n" + "fmla v23.8h, v4.8h, v12.8h\n" + "ldr q13, [x9, x28]\n" + "fmla v26.8h, v1.8h, v12.8h\n" + "fmla v24.8h, v5.8h, v11.8h\n" + "ldr q12, [x9, x17]\n" + "add x9, x9, #0x10\n" + "fmla v25.8h, v4.8h, v11.8h\n" "fmla v27.8h, v2.8h, v11.8h\n" - "ldr q11, [x15, x28]\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "ldr q11, [x15, x10]\n" + "fmla v29.8h, v4.8h, v12.8h\n" "add x15, x15, #0x10\n" - "fmla v24.8h, v8.8h, v13.8h\n" - "fmla v23.8h, v7.8h, v13.8h\n" - "ldr q13, [x10, x27]\n" - "add x10, x10, #0x10\n" - "fmla v28.8h, v7.8h, v12.8h\n" + "fmla v30.8h, v3.8h, v12.8h\n" + "fmla v31.8h, v4.8h, v13.8h\n" + "fmla v26.8h, v7.8h, v12.8h\n" "fmla v27.8h, v6.8h, v12.8h\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "fmla v24.8h, v3.8h, v12.8h\n" "ld1 { v12.8h }, [x11]\n" - "fmla v31.8h, v2.8h, v11.8h\n" - "fmla v30.8h, v1.8h, v11.8h\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x11, x26]\n" + "fmla v23.8h, v2.8h, v11.8h\n" + "fmla v24.8h, v1.8h, v11.8h\n" + "fmax v24.8h, v24.8h, v18.8h\n" + "fmla v25.8h, v0.8h, v11.8h\n" + "ldr q11, [x11, x25]\n" + "fmla v28.8h, v7.8h, v13.8h\n" + "fmin v24.8h, v24.8h, v17.8h\n" + "fmla v30.8h, v5.8h, v13.8h\n" + "fmla v29.8h, v0.8h, v12.8h\n" "add x11, x11, #0x10\n" + "fmla v31.8h, v2.8h, v11.8h\n" "fmla v27.8h, v8.8h, v13.8h\n" - "fmla v26.8h, v7.8h, v13.8h\n" - "fmla v24.8h, v5.8h, v13.8h\n" - "fmla v23.8h, v4.8h, v13.8h\n" - "ldr q13, [x9, x28]\n" - "add x9, x9, #0x10\n" - "fmla v31.8h, v6.8h, v12.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "fmla v25.8h, v0.8h, v12.8h\n" - "fmla v29.8h, v8.8h, v11.8h\n" - "fmla v26.8h, v5.8h, v11.8h\n" - "fmla v23.8h, v2.8h, v11.8h\n" - "fmla v25.8h, v8.8h, v13.8h\n" - "fmla v24.8h, v7.8h, v13.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmla v23.8h, v6.8h, v13.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "st1 { v31.8h }, [x13]\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "str q30, [x13, x14]\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "fmax v28.8h, v28.8h, v18.8h\n" - "str q29, [x13, x22]\n" - "fmin v28.8h, v28.8h, v17.8h\n" - "add x13, x13, #0x10\n" + "ldr q13, [x26, x10]\n" "fmax v27.8h, v27.8h, v18.8h\n" - "st1 { v28.8h }, [x25]\n" - "fmax v26.8h, v26.8h, v18.8h\n" - "fmax v25.8h, v25.8h, v18.8h\n" - "fmin v27.8h, v27.8h, v17.8h\n" - "str q27, [x25, x14]\n" - "fmin v26.8h, v26.8h, v17.8h\n" - "fmin v25.8h, v25.8h, v17.8h\n" - "str q26, [x25, x22]\n" - "fmax v24.8h, v24.8h, v18.8h\n" - "add x25, x25, #0x10\n" + "fmla v23.8h, v6.8h, v12.8h\n" + "fmla v26.8h, v3.8h, v12.8h\n" "fmax v23.8h, v23.8h, v18.8h\n" - "st1 { v25.8h }, [x24]\n" - "fmin v24.8h, v24.8h, v17.8h\n" - "str q24, [x24, x14]\n" + "add x26, x26, #0x10\n" + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" + "fmax v25.8h, v25.8h, v18.8h\n" + "fmla v29.8h, v8.8h, v13.8h\n" + "fmla v30.8h, v7.8h, v13.8h\n" + "fmax v26.8h, v26.8h, v18.8h\n" + "fmla v31.8h, v6.8h, v13.8h\n" + "fmax v28.8h, v28.8h, v18.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" "fmin v23.8h, v23.8h, v17.8h\n" - "str q23, [x24, x22]\n" + "st1 { v23.8h }, [x14]\n" + "fmin v25.8h, v25.8h, v17.8h\n" + "fmin v26.8h, v26.8h, v17.8h\n" + "str q24, [x14, x16]\n" + "fmin v27.8h, v27.8h, v17.8h\n" + "fmin v28.8h, v28.8h, v17.8h\n" + "str q25, [x14, x21]\n" + "add x14, x14, #0x10\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "st1 { v26.8h }, [x27]\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "str q27, [x27, x16]\n" + "str q28, [x27, x21]\n" + "add x27, x27, #0x10\n" + "st1 { v29.8h }, [x24]\n" + "str q30, [x24, x16]\n" + "str q31, [x24, x21]\n" "add x24, x24, #0x10\n" "4:" // Tile loop: Oddments - "tst %x[n_channels], #0x1\n" - "beq 49f\n" - "ldr q16, [x17, #0x0]\n" - "ldr q0, [x17, #0x10]\n" - "add x23, x11, x28\n" - "ldr q1, [x17, #0x20]\n" + "tst %x[n_channels], #0x7\n" + "beq 93f\n" + "ldr q16, [x13, #0x0]\n" + "ldr q0, [x13, #0x10]\n" + "ldr q1, [x13, #0x20]\n" + "ldr q2, [x13, #0x30]\n" + "add x23, x11, x10\n" "add x22, x15, XZR\n" - "ldr q2, [x17, #0x30]\n" - "add x21, x15, x26\n" - "ldr q3, [x17, #0x40]\n" - "add x20, x9, XZR\n" - "ldr q4, [x17, #0x50]\n" - "add x19, x12, x28\n" - "ldr q5, [x17, #0x60]\n" - "ldr q6, [x17, #0x70]\n" - "ldr q7, [x17, #0x80]\n" - "ldr q8, [x17, #0x90]\n" + "ldr q3, [x13, #0x40]\n" + "ldr q4, [x13, #0x50]\n" + "add x21, x15, x25\n" + "add x20, x26, XZR\n" + "ldr q5, [x13, #0x60]\n" + "ldr q6, [x13, #0x70]\n" + "add x19, x12, x10\n" + "ldr q7, [x13, #0x80]\n" + "ldr q8, [x13, #0x90]\n" + "tbz %x[n_channels], #2, 6f\n" + "ldr d9, [x23], #0x8\n" + "ldr d10, [x22], #0x8\n" + "ldr d11, [x21], #0x8\n" + "ldr d12, [x20], #0x8\n" + "ldr d13, [x19], #0x8\n" "tbz %x[n_channels], #1, 5f\n" + "ld1 { v9.s }[2], [x23], #0x4\n" + "ld1 { v10.s }[2], [x22], #0x4\n" + "ld1 { v11.s }[2], [x21], #0x4\n" + "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 8f\n" + "ld1 { v9.h }[6], [x23]\n" + "ld1 { v10.h }[6], [x22]\n" + "ld1 { v11.h }[6], [x21]\n" + "ld1 { v12.h }[6], [x20]\n" + "ld1 { v13.h }[6], [x19]\n" + "b 8f\n" + "5:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 8f\n" + "ld1 { v9.h }[4], [x23]\n" + "ld1 { v10.h }[4], [x22]\n" + "ld1 { v11.h }[4], [x21]\n" + "ld1 { v12.h }[4], [x20]\n" + "ld1 { v13.h }[4], [x19]\n" + "b 8f\n" + "6:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 7f\n" "ldr s9, [x23], #0x4\n" "ldr s10, [x22], #0x4\n" "ldr s11, [x21], #0x4\n" "ldr s12, [x20], #0x4\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 6f\n" + "tbz %x[n_channels], #0, 8f\n" "ld1 { v9.h }[2], [x23]\n" "ld1 { v10.h }[2], [x22]\n" "ld1 { v11.h }[2], [x21]\n" "ld1 { v12.h }[2], [x20]\n" "ld1 { v13.h }[2], [x19]\n" - "b 6f\n" - "5:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 1: Unset + "b 8f\n" + "7:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 2: Unset: Bit 1: Unset "ldr h9, [x23, #0x0]\n" "ldr h10, [x22, #0x0]\n" "ldr h11, [x21, #0x0]\n" "ldr h12, [x20, #0x0]\n" "ldr h13, [x19, #0x0]\n" - "6:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 1: End - "mov v31.16b, v16.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "add x19, x9, x26\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v7.8h, v9.8h\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v5.8h, v9.8h\n" + "8:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 2: End + "mov v23.16b, v16.16b\n fmla v23.8h, v8.8h, v9.8h\n" + "mov v25.16b, v16.16b\n fmla v25.8h, v6.8h, v9.8h\n" + "add x19, x26, x25\n" + "mov v24.16b, v16.16b\n fmla v24.8h, v7.8h, v9.8h\n" + "mov v26.16b, v16.16b\n fmla v26.8h, v5.8h, v9.8h\n" "mov v27.16b, v16.16b\n fmla v27.8h, v4.8h, v9.8h\n" - "mov v26.16b, v16.16b\n fmla v26.8h, v3.8h, v9.8h\n" - "mov v25.16b, v16.16b\n fmla v25.8h, v2.8h, v9.8h\n" - "mov v24.16b, v16.16b\n fmla v24.8h, v1.8h, v9.8h\n" - "mov v23.16b, v16.16b\n fmla v23.8h, v0.8h, v9.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "fmla v29.8h, v2.8h, v11.8h\n" - "fmla v25.8h, v6.8h, v12.8h\n" - "fmla v30.8h, v4.8h, v13.8h\n" - "fmla v31.8h, v5.8h, v13.8h\n" - "fmla v29.8h, v3.8h, v13.8h\n" - "fmla v28.8h, v2.8h, v13.8h\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v3.8h, v9.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v2.8h, v9.8h\n" + "fmla v23.8h, v0.8h, v10.8h\n" + "fmla v25.8h, v2.8h, v11.8h\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "fmla v29.8h, v6.8h, v12.8h\n" + "fmla v23.8h, v5.8h, v13.8h\n" + "fmla v24.8h, v4.8h, v13.8h\n" + "fmla v25.8h, v3.8h, v13.8h\n" + "fmla v26.8h, v2.8h, v13.8h\n" "fmla v27.8h, v1.8h, v13.8h\n" - "fmla v26.8h, v0.8h, v13.8h\n" - "tbz %x[n_channels], #1, 7f\n" + "fmla v28.8h, v0.8h, v13.8h\n" + "tbz %x[n_channels], #2, 10f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 9f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 12f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 12f\n" + "9:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 12f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 12f\n" + "10:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 11f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 8f\n" + "tbz %x[n_channels], #0, 12f\n" "ld1 { v12.h }[2], [x19]\n" - "b 8f\n" - "7:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 1: Unset + "b 12f\n" + "11:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "8:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 1: End - "fmla v23.8h, v8.8h, v12.8h\n" - "add x19, x11, x16\n" - "tbz %x[n_channels], #1, 9f\n" + "12:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: End + "fmla v31.8h, v8.8h, v12.8h\n" + "add x19, x11, x17\n" + "tbz %x[n_channels], #2, 14f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 13f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 16f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 16f\n" + "13:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 16f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 16f\n" + "14:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 15f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 10f\n" + "tbz %x[n_channels], #0, 16f\n" "ld1 { v11.h }[2], [x19]\n" - "b 10f\n" - "9:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 1: Unset + "b 16f\n" + "15:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "10:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 1: End - "fmla v31.8h, v7.8h, v11.8h\n" - "add x19, x15, x16\n" - "fmla v30.8h, v6.8h, v11.8h\n" - "fmla v28.8h, v4.8h, v11.8h\n" + "16:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: End + "fmla v23.8h, v7.8h, v11.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "add x19, x15, x17\n" + "fmla v26.8h, v4.8h, v11.8h\n" "fmla v27.8h, v3.8h, v11.8h\n" - "fmla v25.8h, v1.8h, v11.8h\n" - "fmla v24.8h, v0.8h, v11.8h\n" - "tbz %x[n_channels], #1, 11f\n" + "fmla v29.8h, v1.8h, v11.8h\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "tbz %x[n_channels], #2, 18f\n" + "ldr d13, [x19], #0x8\n" + "tbz %x[n_channels], #1, 17f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 20f\n" + "ld1 { v13.h }[6], [x19]\n" + "b 20f\n" + "17:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 20f\n" + "ld1 { v13.h }[4], [x19]\n" + "b 20f\n" + "18:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 19f\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 12f\n" + "tbz %x[n_channels], #0, 20f\n" "ld1 { v13.h }[2], [x19]\n" - "b 12f\n" - "11:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 1: Unset + "b 20f\n" + "19:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Unset: Bit 1: Unset "ldr h13, [x19, #0x0]\n" - "12:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 1: End - "fmla v31.8h, v1.8h, v13.8h\n" - "add x19, x15, x27\n" - "fmla v30.8h, v0.8h, v13.8h\n" - "tbz %x[n_channels], #1, 13f\n" + "20:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: End + "fmla v23.8h, v1.8h, v13.8h\n" + "fmla v24.8h, v0.8h, v13.8h\n" + "add x19, x15, x28\n" + "tbz %x[n_channels], #2, 22f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 21f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 24f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 24f\n" + "21:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 24f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 24f\n" + "22:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 23f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 14f\n" + "tbz %x[n_channels], #0, 24f\n" "ld1 { v12.h }[2], [x19]\n" - "b 14f\n" - "13:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 1: Unset + "b 24f\n" + "23:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "14:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 1: End - "fmla v30.8h, v2.8h, v12.8h\n" - "add x19, x11, x27\n" - "fmla v29.8h, v1.8h, v12.8h\n" - "tbz %x[n_channels], #1, 15f\n" + "24:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: End + "fmla v24.8h, v2.8h, v12.8h\n" + "fmla v25.8h, v1.8h, v12.8h\n" + "add x19, x11, x28\n" + "tbz %x[n_channels], #2, 26f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 25f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 28f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 28f\n" + "25:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 28f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 28f\n" + "26:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 27f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 16f\n" + "tbz %x[n_channels], #0, 28f\n" "ld1 { v10.h }[2], [x19]\n" - "b 16f\n" - "15:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 1: Unset + "b 28f\n" + "27:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "16:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 1: End - "fmla v30.8h, v8.8h, v10.8h\n" + "28:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: End + "fmla v24.8h, v8.8h, v10.8h\n" + "fmla v25.8h, v7.8h, v10.8h\n" "add x19, x12, XZR\n" - "fmla v29.8h, v7.8h, v10.8h\n" "fmla v27.8h, v5.8h, v10.8h\n" - "fmla v26.8h, v4.8h, v10.8h\n" - "fmla v24.8h, v2.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" - "tbz %x[n_channels], #1, 17f\n" + "fmla v28.8h, v4.8h, v10.8h\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "tbz %x[n_channels], #2, 30f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 29f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 32f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 32f\n" + "29:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 32f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 32f\n" + "30:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 31f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 18f\n" + "tbz %x[n_channels], #0, 32f\n" "ld1 { v11.h }[2], [x19]\n" - "b 18f\n" - "17:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 1: Unset + "b 32f\n" + "31:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "18:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 1: End - "fmla v31.8h, v3.8h, v11.8h\n" - "add x19, x12, x26\n" - "fmla v28.8h, v0.8h, v11.8h\n" - "tbz %x[n_channels], #1, 19f\n" + "32:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: End + "fmla v23.8h, v3.8h, v11.8h\n" + "fmla v26.8h, v0.8h, v11.8h\n" + "add x19, x12, x25\n" + "tbz %x[n_channels], #2, 34f\n" + "ldr d13, [x19], #0x8\n" + "tbz %x[n_channels], #1, 33f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 36f\n" + "ld1 { v13.h }[6], [x19]\n" + "b 36f\n" + "33:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 36f\n" + "ld1 { v13.h }[4], [x19]\n" + "b 36f\n" + "34:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 35f\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 20f\n" + "tbz %x[n_channels], #0, 36f\n" "ld1 { v13.h }[2], [x19]\n" - "b 20f\n" - "19:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 1: Unset + "b 36f\n" + "35:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Unset: Bit 1: Unset "ldr h13, [x19, #0x0]\n" - "20:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 1: End - "fmla v29.8h, v5.8h, v13.8h\n" - "add x19, x10, XZR\n" - "fmla v26.8h, v2.8h, v13.8h\n" - "tbz %x[n_channels], #1, 21f\n" + "36:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: End + "fmla v25.8h, v5.8h, v13.8h\n" + "fmla v28.8h, v2.8h, v13.8h\n" + "add x19, x9, XZR\n" + "tbz %x[n_channels], #2, 38f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 37f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 40f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 40f\n" + "37:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 40f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 40f\n" + "38:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 39f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 22f\n" + "tbz %x[n_channels], #0, 40f\n" "ld1 { v12.h }[2], [x19]\n" - "b 22f\n" - "21:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: Unset + "b 40f\n" + "39:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "22:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: End - "fmla v28.8h, v6.8h, v12.8h\n" - "add x19, x10, x28\n" - "fmla v25.8h, v3.8h, v12.8h\n" - "tbz %x[n_channels], #1, 23f\n" + "40:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: End + "fmla v26.8h, v6.8h, v12.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "add x19, x9, x10\n" + "tbz %x[n_channels], #2, 42f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 41f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 44f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 44f\n" + "41:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 44f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 44f\n" + "42:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 43f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 24f\n" + "tbz %x[n_channels], #0, 44f\n" "ld1 { v10.h }[2], [x19]\n" - "b 24f\n" - "23:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: Unset + "b 44f\n" + "43:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "24:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: End - "fmla v28.8h, v8.8h, v10.8h\n" - "add x19, x10, x26\n" + "44:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: End + "fmla v26.8h, v8.8h, v10.8h\n" "fmla v27.8h, v7.8h, v10.8h\n" - "fmla v26.8h, v6.8h, v10.8h\n" - "fmla v25.8h, v5.8h, v10.8h\n" - "fmla v24.8h, v4.8h, v10.8h\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "tbz %x[n_channels], #1, 25f\n" + "add x19, x9, x25\n" + "fmla v28.8h, v6.8h, v10.8h\n" + "fmla v29.8h, v5.8h, v10.8h\n" + "fmla v30.8h, v4.8h, v10.8h\n" + "fmla v31.8h, v3.8h, v10.8h\n" + "tbz %x[n_channels], #2, 46f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 45f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 48f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 48f\n" + "45:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 48f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 48f\n" + "46:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 47f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 26f\n" + "tbz %x[n_channels], #0, 48f\n" "ld1 { v11.h }[2], [x19]\n" - "b 26f\n" - "25:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 1: Unset + "b 48f\n" + "47:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "26:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 1: End - "fmla v26.8h, v8.8h, v11.8h\n" - "add x19, x9, x16\n" - "fmla v23.8h, v5.8h, v11.8h\n" - "tbz %x[n_channels], #1, 27f\n" + "48:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: End + "fmla v28.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "add x19, x26, x17\n" + "tbz %x[n_channels], #2, 50f\n" + "ldr d13, [x19], #0x8\n" + "tbz %x[n_channels], #1, 49f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 52f\n" + "ld1 { v13.h }[6], [x19]\n" + "b 52f\n" + "49:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 52f\n" + "ld1 { v13.h }[4], [x19]\n" + "b 52f\n" + "50:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 51f\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 28f\n" + "tbz %x[n_channels], #0, 52f\n" "ld1 { v13.h }[2], [x19]\n" - "b 28f\n" - "27:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 1: Unset + "b 52f\n" + "51:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Unset: Bit 1: Unset "ldr h13, [x19, #0x0]\n" - "28:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 1: End - "fmla v25.8h, v7.8h, v13.8h\n" - "add x19, x12, x16\n" - "fmla v24.8h, v6.8h, v13.8h\n" - "tbz %x[n_channels], #1, 29f\n" + "52:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: End + "fmla v29.8h, v7.8h, v13.8h\n" + "fmla v30.8h, v6.8h, v13.8h\n" + "add x19, x12, x17\n" + "tbz %x[n_channels], #2, 54f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 53f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 56f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 56f\n" + "53:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 56f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 56f\n" + "54:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 55f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 30f\n" + "tbz %x[n_channels], #0, 56f\n" "ld1 { v12.h }[2], [x19]\n" - "b 30f\n" - "29:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 1: Unset + "b 56f\n" + "55:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "30:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 1: End - "fmla v31.8h, v4.8h, v12.8h\n" - "add x19, x12, x27\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v28.8h, v1.8h, v12.8h\n" + "56:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: End + "fmla v23.8h, v4.8h, v12.8h\n" + "fmla v24.8h, v3.8h, v12.8h\n" + "add x19, x12, x28\n" + "fmla v26.8h, v1.8h, v12.8h\n" "fmla v27.8h, v0.8h, v12.8h\n" - "tbz %x[n_channels], #1, 31f\n" + "tbz %x[n_channels], #2, 58f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 57f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 60f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 60f\n" + "57:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 60f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 60f\n" + "58:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 59f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 32f\n" + "tbz %x[n_channels], #0, 60f\n" "ld1 { v11.h }[2], [x19]\n" - "b 32f\n" - "31:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: Unset + "b 60f\n" + "59:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "32:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: End - "fmla v30.8h, v5.8h, v11.8h\n" - "add x19, x9, x27\n" - "fmla v29.8h, v4.8h, v11.8h\n" + "60:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: End + "fmla v24.8h, v5.8h, v11.8h\n" + "fmla v25.8h, v4.8h, v11.8h\n" + "add x19, x26, x28\n" "fmla v27.8h, v2.8h, v11.8h\n" - "fmla v26.8h, v1.8h, v11.8h\n" - "tbz %x[n_channels], #1, 33f\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "tbz %x[n_channels], #2, 62f\n" + "ldr d13, [x19], #0x8\n" + "tbz %x[n_channels], #1, 61f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 64f\n" + "ld1 { v13.h }[6], [x19]\n" + "b 64f\n" + "61:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 64f\n" + "ld1 { v13.h }[4], [x19]\n" + "b 64f\n" + "62:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 63f\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 34f\n" + "tbz %x[n_channels], #0, 64f\n" "ld1 { v13.h }[2], [x19]\n" - "b 34f\n" - "33:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 1: Unset + "b 64f\n" + "63:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Unset: Bit 1: Unset "ldr h13, [x19, #0x0]\n" - "34:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 1: End - "fmla v24.8h, v8.8h, v13.8h\n" - "add x19, x10, x16\n" - "fmla v23.8h, v7.8h, v13.8h\n" - "tbz %x[n_channels], #1, 35f\n" + "64:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: End + "fmla v30.8h, v8.8h, v13.8h\n" + "fmla v31.8h, v7.8h, v13.8h\n" + "add x19, x9, x17\n" + "tbz %x[n_channels], #2, 66f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 65f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 68f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 68f\n" + "65:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 68f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 68f\n" + "66:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 67f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 36f\n" + "tbz %x[n_channels], #0, 68f\n" "ld1 { v12.h }[2], [x19]\n" - "b 36f\n" - "35:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: Unset + "b 68f\n" + "67:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "36:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: End - "fmla v28.8h, v7.8h, v12.8h\n" - "add x19, x15, x28\n" + "68:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: End + "fmla v26.8h, v7.8h, v12.8h\n" "fmla v27.8h, v6.8h, v12.8h\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "fmla v24.8h, v3.8h, v12.8h\n" - "tbz %x[n_channels], #1, 37f\n" + "add x19, x15, x10\n" + "fmla v29.8h, v4.8h, v12.8h\n" + "fmla v30.8h, v3.8h, v12.8h\n" + "tbz %x[n_channels], #2, 70f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 69f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 72f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 72f\n" + "69:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 72f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 72f\n" + "70:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 71f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 38f\n" + "tbz %x[n_channels], #0, 72f\n" "ld1 { v11.h }[2], [x19]\n" - "b 38f\n" - "37:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 1: Unset + "b 72f\n" + "71:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "38:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 1: End - "fmla v31.8h, v2.8h, v11.8h\n" - "add x19, x10, x27\n" - "fmla v30.8h, v1.8h, v11.8h\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "tbz %x[n_channels], #1, 39f\n" + "72:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: End + "fmla v23.8h, v2.8h, v11.8h\n" + "fmla v24.8h, v1.8h, v11.8h\n" + "add x19, x9, x28\n" + "fmla v25.8h, v0.8h, v11.8h\n" + "tbz %x[n_channels], #2, 74f\n" + "ldr d13, [x19], #0x8\n" + "tbz %x[n_channels], #1, 73f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 76f\n" + "ld1 { v13.h }[6], [x19]\n" + "b 76f\n" + "73:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 76f\n" + "ld1 { v13.h }[4], [x19]\n" + "b 76f\n" + "74:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 75f\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 40f\n" + "tbz %x[n_channels], #0, 76f\n" "ld1 { v13.h }[2], [x19]\n" - "b 40f\n" - "39:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: Unset + "b 76f\n" + "75:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset: Bit 1: Unset "ldr h13, [x19, #0x0]\n" - "40:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: End + "76:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: End "fmla v27.8h, v8.8h, v13.8h\n" + "fmla v28.8h, v7.8h, v13.8h\n" "add x19, x11, XZR\n" - "fmla v26.8h, v7.8h, v13.8h\n" - "fmla v24.8h, v5.8h, v13.8h\n" - "fmla v23.8h, v4.8h, v13.8h\n" - "tbz %x[n_channels], #1, 41f\n" + "fmla v30.8h, v5.8h, v13.8h\n" + "fmla v31.8h, v4.8h, v13.8h\n" + "tbz %x[n_channels], #2, 78f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 77f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 80f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 80f\n" + "77:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 80f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 80f\n" + "78:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 79f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 42f\n" + "tbz %x[n_channels], #0, 80f\n" "ld1 { v12.h }[2], [x19]\n" - "b 42f\n" - "41:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 1: Unset + "b 80f\n" + "79:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "42:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 1: End - "fmla v31.8h, v6.8h, v12.8h\n" - "add x19, x11, x26\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "fmla v25.8h, v0.8h, v12.8h\n" - "tbz %x[n_channels], #1, 43f\n" + "80:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: End + "fmla v23.8h, v6.8h, v12.8h\n" + "fmla v26.8h, v3.8h, v12.8h\n" + "add x19, x11, x25\n" + "fmla v29.8h, v0.8h, v12.8h\n" + "tbz %x[n_channels], #2, 82f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 81f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 84f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 84f\n" + "81:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 84f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 84f\n" + "82:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 83f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 44f\n" + "tbz %x[n_channels], #0, 84f\n" "ld1 { v11.h }[2], [x19]\n" - "b 44f\n" - "43:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 1: Unset + "b 84f\n" + "83:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "44:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 1: End - "fmla v29.8h, v8.8h, v11.8h\n" - "add x19, x9, x28\n" - "fmla v26.8h, v5.8h, v11.8h\n" - "fmla v23.8h, v2.8h, v11.8h\n" - "tbz %x[n_channels], #1, 45f\n" + "84:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: End + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" + "add x19, x26, x10\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "tbz %x[n_channels], #2, 86f\n" + "ldr d13, [x19], #0x8\n" + "tbz %x[n_channels], #1, 85f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 88f\n" + "ld1 { v13.h }[6], [x19]\n" + "b 88f\n" + "85:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 88f\n" + "ld1 { v13.h }[4], [x19]\n" + "b 88f\n" + "86:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 87f\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 46f\n" + "tbz %x[n_channels], #0, 88f\n" "ld1 { v13.h }[2], [x19]\n" - "b 46f\n" - "45:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 1: Unset + "b 88f\n" + "87:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Unset: Bit 1: Unset "ldr h13, [x19, #0x0]\n" - "46:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 1: End - "fmla v25.8h, v8.8h, v13.8h\n" - "fmla v24.8h, v7.8h, v13.8h\n" - "fmla v23.8h, v6.8h, v13.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "fmax v28.8h, v28.8h, v18.8h\n" - "fmax v27.8h, v27.8h, v18.8h\n" - "fmax v26.8h, v26.8h, v18.8h\n" - "fmin v28.8h, v28.8h, v17.8h\n" - "fmin v27.8h, v27.8h, v17.8h\n" - "fmin v26.8h, v26.8h, v17.8h\n" - "fmax v25.8h, v25.8h, v18.8h\n" - "fmax v24.8h, v24.8h, v18.8h\n" + "88:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: End + "fmla v29.8h, v8.8h, v13.8h\n" + "fmla v30.8h, v7.8h, v13.8h\n" "fmax v23.8h, v23.8h, v18.8h\n" - "fmin v25.8h, v25.8h, v17.8h\n" - "fmin v24.8h, v24.8h, v17.8h\n" + "fmla v31.8h, v6.8h, v13.8h\n" + "fmax v24.8h, v24.8h, v18.8h\n" + "fmax v25.8h, v25.8h, v18.8h\n" + "fmax v26.8h, v26.8h, v18.8h\n" + "fmax v27.8h, v27.8h, v18.8h\n" + "fmax v28.8h, v28.8h, v18.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" "fmin v23.8h, v23.8h, v17.8h\n" - "tbz %x[n_channels], #1, 47f\n" - "mov x19, x13\n" - "st1 { v31.s }[0], [x19], x14\n" - "add x13, x13, #0x4\n" - "st1 { v30.s }[0], [x19], x14\n" - "mov x20, x25\n" - "st1 { v29.s }[0], [x19]\n" - "st1 { v28.s }[0], [x20], x14\n" - "add x25, x25, #0x4\n" - "st1 { v27.s }[0], [x20], x14\n" + "fmin v24.8h, v24.8h, v17.8h\n" + "fmin v25.8h, v25.8h, v17.8h\n" + "fmin v26.8h, v26.8h, v17.8h\n" + "fmin v27.8h, v27.8h, v17.8h\n" + "fmin v28.8h, v28.8h, v17.8h\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "tbz %x[n_channels], #2, 90f\n" + "mov x21, x14\n" + "mov x20, x27\n" + "mov x19, x24\n" + "st1 { v23.d }[0], [x21], x16\n" + "st1 { v26.d }[0], [x20], x16\n" + "add x14, x14, #0x8\n" + "add x27, x27, #0x8\n" + "st1 { v29.d }[0], [x19], x16\n" + "add x24, x24, #0x8\n" + "st1 { v24.d }[0], [x21], x16\n" + "st1 { v27.d }[0], [x20], x16\n" + "st1 { v30.d }[0], [x19], x16\n" + "st1 { v25.d }[0], [x21]\n" + "st1 { v28.d }[0], [x20]\n" + "st1 { v31.d }[0], [x19]\n" + "tbz %x[n_channels], #1, 89f\n" + "mov x21, x14\n" + "mov x20, x27\n" "mov x19, x24\n" - "st1 { v26.s }[0], [x20]\n" + "st1 { v23.s }[2], [x21], x16\n" + "add x14, x14, #0x4\n" + "st1 { v26.s }[2], [x20], x16\n" + "add x27, x27, #0x4\n" "add x24, x24, #0x4\n" - "st1 { v25.s }[0], [x19], x14\n" - "st1 { v24.s }[0], [x19], x14\n" - "st1 { v23.s }[0], [x19]\n" - "tbz %x[n_channels], #0, 48f\n" - "mov x21, x13\n" - "st1 { v31.h }[2], [x21], x14\n" - "mov x20, x25\n" - "st1 { v30.h }[2], [x21], x14\n" - "st1 { v28.h }[2], [x20], x14\n" + "st1 { v29.s }[2], [x19], x16\n" + "st1 { v24.s }[2], [x21], x16\n" + "st1 { v27.s }[2], [x20], x16\n" + "st1 { v30.s }[2], [x19], x16\n" + "st1 { v25.s }[2], [x21]\n" + "st1 { v28.s }[2], [x20]\n" + "st1 { v31.s }[2], [x19]\n" + "tbz %x[n_channels], #0, 92f\n" + "mov x21, x14\n" + "mov x20, x27\n" "mov x19, x24\n" - "st1 { v29.h }[2], [x21]\n" - "st1 { v27.h }[2], [x20], x14\n" - "st1 { v26.h }[2], [x20]\n" - "st1 { v25.h }[2], [x19], x14\n" - "st1 { v24.h }[2], [x19], x14\n" - "st1 { v23.h }[2], [x19]\n" - "b 48f\n" - "47:" // Tile loop: Oddments: Store: Bit 1: Unset - "mov x21, x13\n" - "st1 { v31.h }[0], [x21], x14\n" - "mov x20, x25\n" + "st1 { v23.h }[6], [x21], x16\n" + "st1 { v26.h }[6], [x20], x16\n" + "st1 { v29.h }[6], [x19], x16\n" + "st1 { v24.h }[6], [x21], x16\n" + "st1 { v27.h }[6], [x20], x16\n" + "st1 { v30.h }[6], [x19], x16\n" + "st1 { v25.h }[6], [x21]\n" + "st1 { v28.h }[6], [x20]\n" + "st1 { v31.h }[6], [x19]\n" + "b 92f\n" + "89:" // Tile loop: Oddments: Store: Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 92f\n" + "mov x21, x14\n" + "mov x20, x27\n" + "st1 { v23.h }[4], [x21], x16\n" + "mov x19, x24\n" + "st1 { v26.h }[4], [x20], x16\n" + "st1 { v29.h }[4], [x19], x16\n" + "st1 { v24.h }[4], [x21], x16\n" + "st1 { v27.h }[4], [x20], x16\n" + "st1 { v30.h }[4], [x19], x16\n" + "st1 { v25.h }[4], [x21]\n" + "st1 { v28.h }[4], [x20]\n" + "st1 { v31.h }[4], [x19]\n" + "b 92f\n" + "90:" // Tile loop: Oddments: Store: Bit 2: Unset + "tbz %x[n_channels], #1, 91f\n" + "mov x21, x14\n" + "mov x20, x27\n" + "st1 { v23.s }[0], [x21], x16\n" + "mov x19, x24\n" + "st1 { v26.s }[0], [x20], x16\n" + "add x14, x14, #0x4\n" + "st1 { v29.s }[0], [x19], x16\n" + "add x27, x27, #0x4\n" + "add x24, x24, #0x4\n" + "st1 { v24.s }[0], [x21], x16\n" + "st1 { v27.s }[0], [x20], x16\n" + "st1 { v30.s }[0], [x19], x16\n" + "st1 { v25.s }[0], [x21]\n" + "st1 { v28.s }[0], [x20]\n" + "st1 { v31.s }[0], [x19]\n" + "tbz %x[n_channels], #0, 92f\n" + "mov x21, x14\n" + "mov x20, x27\n" + "mov x19, x24\n" + "st1 { v23.h }[2], [x21], x16\n" + "st1 { v26.h }[2], [x20], x16\n" + "st1 { v29.h }[2], [x19], x16\n" + "st1 { v24.h }[2], [x21], x16\n" + "st1 { v27.h }[2], [x20], x16\n" + "st1 { v30.h }[2], [x19], x16\n" + "st1 { v25.h }[2], [x21]\n" + "st1 { v28.h }[2], [x20]\n" + "st1 { v31.h }[2], [x19]\n" + "b 92f\n" + "91:" // Tile loop: Oddments: Store: Bit 2: Unset: Bit 1: Unset + "mov x21, x14\n" + "mov x20, x27\n" + "st1 { v23.h }[0], [x21], x16\n" "mov x19, x24\n" - "st1 { v30.h }[0], [x21], x14\n" - "st1 { v28.h }[0], [x20], x14\n" - "st1 { v29.h }[0], [x21]\n" - "st1 { v27.h }[0], [x20], x14\n" - "st1 { v26.h }[0], [x20]\n" - "st1 { v25.h }[0], [x19], x14\n" - "st1 { v24.h }[0], [x19], x14\n" - "st1 { v23.h }[0], [x19]\n" - "48:" // Tile loop: Oddments: Store: Bit 1: End + "st1 { v26.h }[0], [x20], x16\n" + "st1 { v29.h }[0], [x19], x16\n" + "st1 { v24.h }[0], [x21], x16\n" + "st1 { v27.h }[0], [x20], x16\n" + "st1 { v30.h }[0], [x19], x16\n" + "st1 { v25.h }[0], [x21]\n" + "st1 { v28.h }[0], [x20]\n" + "st1 { v31.h }[0], [x19]\n" + "92:" // Tile loop: Oddments: Store: Bit 2: End - "49:" // Tile loop: End - "ldr x7, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "add x21, x7, #0x1\n" - "ldr x8, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" - "add x8, x8, #0x1\n" + "93:" // Tile loop: End + "ldr x22, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x23, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "add x22, x22, #0x1\n" + "add x20, x23, #0x1\n" "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" - "cmp x8, x19\n" - "csel x8, x8, XZR, LT\n" - "csel x7, x7, x21, LT\n" - "cmp x7, x20\n" + "cmp x22, x19\n" + "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" + "csel x23, x23, x20, LT\n" + "csel x22, x22, XZR, LT\n" + "cmp x23, x19\n" "blt 1b\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v16", "v17", "v18", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" + : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v16", "v17", "v18", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" ); } diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp index ed47c308c4..fc988913be 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp @@ -87,818 +87,1203 @@ void a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst_indirect_impl( activation_min, activation_max); __asm__ __volatile__( - "ldr x17, [%x[params_struct], %[offsetof_args_outptrs]]\n" - "add x16, %x[params_struct], %[offsetof_Args_inptrs]\n" - "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" + "mov x17, #0x10\n" // cntb _, ALL, #1 + "lsr x16, %x[n_channels], #0x3\n" + "ldr x15, [%x[params_struct], %[offsetof_args_outptrs]]\n" + "ldr x14, [%x[params_struct], %[offsetof_args_params]]\n" "add x20, %x[params_struct], %[offsetof_args_min]\n" "add x19, %x[params_struct], %[offsetof_args_max]\n" "ld1r { v18.8h }, [x20]\n" "ld1r { v17.8h }, [x19]\n" - "mov x14, #0x0\n" - "mov x13, #0x10\n" // cntb _, ALL, #1 - "sub x12, XZR, x13\n" - "lsr x11, %x[n_channels], #0x3\n" - "cbz x11, 3f\n" - "ldr q16, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "cmp x13, x11, LSL #4\n" - "ldr q1, [x15, #0x20]\n" - "ldr q2, [x15, #0x30]\n" - "ldr q3, [x15, #0x40]\n" - "ldr q4, [x15, #0x50]\n" - "ldr q5, [x15, #0x60]\n" - "ldr q6, [x15, #0x70]\n" - "ldr q7, [x15, #0x80]\n" - "ldr q8, [x15, #0x90]\n" - "add x15, x15, #0xa0\n" - "ldp x10, x9, [x16, #0x0]\n" - "ldp x28, x27, [x16, #0x10]\n" - "ldr x26, [x16, #0x20]\n" - "ldr q9, [x10, x14]\n" - "ldr q10, [x9, x14]\n" - "ldr q11, [x28, x14]\n" - "ldr q12, [x27, x14]\n" - "ldr q13, [x26, x14]\n" + "add x13, %x[params_struct], %[offsetof_Args_inptrs]\n" + "mov x12, #0x0\n" + "sub x11, XZR, x17\n" + "cbz x16, 3f\n" + "ldp x10, x9, [x13, #0x0]\n" + "ldp x28, x27, [x13, #0x10]\n" + "ldr x26, [x13, #0x20]\n" + "cmp x17, x16, LSL #4\n" + "ldr q16, [x14, #0x0]\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "ldr q2, [x14, #0x30]\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "ldr q9, [x10, x12]\n" + "add x14, x14, #0xa0\n" + "ldr q10, [x9, x12]\n" + "ldr q11, [x28, x12]\n" + "ldr q12, [x27, x12]\n" + "ldr q13, [x26, x12]\n" "bge 2f\n" "1:" // Channel loop - "mov v31.16b, v16.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "ldr x25, [x16, #0x28]\n" - "add x12, x12, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v7.8h, v9.8h\n" - "ldr x24, [x16, #0x30]\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "ldr x23, [x16, #0x38]\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v5.8h, v9.8h\n" - "ldr x10, [x16, #0x40]\n" + "mov v23.16b, v16.16b\n fmla v23.8h, v8.8h, v9.8h\n" + "mov v24.16b, v16.16b\n fmla v24.8h, v7.8h, v9.8h\n" + "ldr x25, [x13, #0x30]\n" + "ldr x24, [x13, #0x38]\n" + "mov v25.16b, v16.16b\n fmla v25.8h, v6.8h, v9.8h\n" + "fmla v23.8h, v0.8h, v10.8h\n" + "ldr x23, [x13, #0x28]\n" + "ldr x9, [x13, #0x48]\n" + "fmla v24.8h, v4.8h, v13.8h\n" + "mov v26.16b, v16.16b\n fmla v26.8h, v5.8h, v9.8h\n" + "ldr x10, [x13, #0x40]\n" + "ldr q10, [x9, x12]\n" "mov v27.16b, v16.16b\n fmla v27.8h, v4.8h, v9.8h\n" - "ldr x9, [x16, #0x48]\n" - "mov v26.16b, v16.16b\n fmla v26.8h, v3.8h, v9.8h\n" - "ldr x28, [x16, #0x50]\n" - "mov v25.16b, v16.16b\n fmla v25.8h, v2.8h, v9.8h\n" - "ldr x27, [x16, #0x58]\n" - "mov v24.16b, v16.16b\n fmla v24.8h, v1.8h, v9.8h\n" - "ldr x26, [x16, #0x60]\n" - "mov v23.16b, v16.16b\n fmla v23.8h, v0.8h, v9.8h\n" - "ldr x22, [x17, #0x0]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr q10, [x9, x14]\n" - "fmla v29.8h, v2.8h, v11.8h\n" - "ldr q11, [x24, x14]\n" - "fmla v25.8h, v6.8h, v12.8h\n" - "ldr q12, [x25, x14]\n" - "fmla v30.8h, v4.8h, v13.8h\n" - "ldr x25, [x16, #0x68]\n" - "fmla v31.8h, v5.8h, v13.8h\n" - "ldr x24, [x16, #0x70]\n" - "fmla v29.8h, v3.8h, v13.8h\n" - "ldr x9, [x16, #0x88]\n" - "fmla v28.8h, v2.8h, v13.8h\n" - "ldr x21, [x17, #0x8]\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v3.8h, v9.8h\n" + "ldr x28, [x13, #0x50]\n" + "ldr x27, [x13, #0x58]\n" + "fmla v25.8h, v2.8h, v11.8h\n" + "ldr q11, [x25, x12]\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v2.8h, v9.8h\n" + "ldr x26, [x13, #0x60]\n" + "fmla v23.8h, v5.8h, v13.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "ldr x25, [x13, #0x70]\n" + "ldr x9, [x13, #0x88]\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "fmla v25.8h, v3.8h, v13.8h\n" + "ldr x22, [x15, #0x0]\n" + "add x11, x11, #0x10\n" + "fmla v26.8h, v2.8h, v13.8h\n" "fmla v27.8h, v1.8h, v13.8h\n" - "ldr x20, [x17, #0x10]\n" - "fmla v26.8h, v0.8h, v13.8h\n" - "ldr q13, [x23, x14]\n" - "fmla v23.8h, v8.8h, v12.8h\n" - "ldr q12, [x10, x14]\n" - "fmla v31.8h, v7.8h, v11.8h\n" - "ldr x23, [x16, #0x78]\n" - "fmla v30.8h, v6.8h, v11.8h\n" - "ldr x10, [x16, #0x80]\n" - "fmla v28.8h, v4.8h, v11.8h\n" - "ldr x19, [x17, #0x18]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "fmla v28.8h, v0.8h, v13.8h\n" + "ldr q13, [x24, x12]\n" + "fmla v29.8h, v6.8h, v12.8h\n" + "ldr q12, [x23, x12]\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "fmla v23.8h, v7.8h, v11.8h\n" + "ldr x23, [x13, #0x68]\n" + "ldr x24, [x13, #0x78]\n" + "fmla v24.8h, v0.8h, v13.8h\n" + "fmla v31.8h, v8.8h, v12.8h\n" + "ldr q12, [x10, x12]\n" + "ldr x10, [x13, #0x80]\n" + "fmla v26.8h, v4.8h, v11.8h\n" "fmla v27.8h, v3.8h, v11.8h\n" - "ldr q16, [x15, #0x0]\n" - "fmla v25.8h, v1.8h, v11.8h\n" - "fmla v24.8h, v0.8h, v11.8h\n" - "ldr q11, [x28, x14]\n" - "fmla v31.8h, v1.8h, v13.8h\n" - "ldr x28, [x16, #0x90]\n" - "fmla v30.8h, v0.8h, v13.8h\n" - "ldr q13, [x27, x14]\n" - "fmla v29.8h, v1.8h, v12.8h\n" - "ldr x27, [x16, #0x98]\n" + "ldr x19, [x15, #0x18]\n" + "ldr q16, [x14, #0x0]\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "fmla v28.8h, v4.8h, v10.8h\n" + "fmla v29.8h, v1.8h, v11.8h\n" + "fmla v23.8h, v1.8h, v13.8h\n" + "ldr q11, [x28, x12]\n" + "ldr q13, [x27, x12]\n" + "fmla v24.8h, v2.8h, v12.8h\n" + "fmla v25.8h, v1.8h, v12.8h\n" + "ldr q12, [x26, x12]\n" + "ldr x28, [x13, #0x90]\n" "fmla v27.8h, v5.8h, v10.8h\n" - "fmla v26.8h, v4.8h, v10.8h\n" - "fmla v30.8h, v2.8h, v12.8h\n" - "ldr q12, [x26, x14]\n" - "fmla v29.8h, v7.8h, v10.8h\n" - "ldr x26, [x16, #0xa0]\n" - "fmla v24.8h, v2.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" - "fmla v30.8h, v8.8h, v10.8h\n" - "ldr q10, [x25, x14]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr x25, [x16, #0xa8]\n" - "fmla v28.8h, v0.8h, v11.8h\n" - "ldr q11, [x24, x14]\n" - "fmla v29.8h, v5.8h, v13.8h\n" - "ldr x24, [x16, #0xb0]\n" - "fmla v26.8h, v2.8h, v13.8h\n" - "ldr q13, [x23, x14]\n" - "fmla v25.8h, v3.8h, v12.8h\n" - "ldr x23, [x16, #0xb8]\n" - "fmla v28.8h, v6.8h, v12.8h\n" - "ldr q12, [x10, x14]\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "ldr x26, [x13, #0xa0]\n" + "ldr x27, [x13, #0x98]\n" + "fmla v26.8h, v0.8h, v11.8h\n" + "fmla v28.8h, v2.8h, v13.8h\n" + "fmla v24.8h, v8.8h, v10.8h\n" + "fmla v25.8h, v7.8h, v10.8h\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "ldr q10, [x23, x12]\n" + "ldr x23, [x13, #0xa8]\n" + "fmla v26.8h, v6.8h, v12.8h\n" "fmla v27.8h, v7.8h, v10.8h\n" - "ldr x10, [x16, #0xc0]\n" - "fmla v26.8h, v6.8h, v10.8h\n" - "fmla v25.8h, v5.8h, v10.8h\n" - "fmla v28.8h, v8.8h, v10.8h\n" - "fmla v24.8h, v4.8h, v10.8h\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "fmla v26.8h, v8.8h, v11.8h\n" - "fmla v25.8h, v7.8h, v13.8h\n" - "fmla v24.8h, v6.8h, v13.8h\n" - "ldr q13, [x28, x14]\n" - "fmla v23.8h, v5.8h, v11.8h\n" - "ldr q11, [x9, x14]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v28.8h, v1.8h, v12.8h\n" + "ldr q12, [x10, x12]\n" + "ldr x10, [x13, #0xc0]\n" + "fmla v28.8h, v6.8h, v10.8h\n" + "fmla v30.8h, v4.8h, v10.8h\n" + "fmla v23.8h, v3.8h, v11.8h\n" + "fmla v25.8h, v5.8h, v13.8h\n" + "ldr q11, [x25, x12]\n" + "ldr q13, [x24, x12]\n" + "fmla v29.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v3.8h, v10.8h\n" + "ldr x25, [x13, #0xb0]\n" + "ldr x24, [x13, #0xb8]\n" + "fmla v26.8h, v8.8h, v10.8h\n" + "fmla v28.8h, v8.8h, v11.8h\n" + "fmla v30.8h, v6.8h, v13.8h\n" + "fmla v24.8h, v3.8h, v12.8h\n" "fmla v27.8h, v0.8h, v12.8h\n" - "ldr q12, [x27, x14]\n" - "fmla v29.8h, v4.8h, v11.8h\n" - "fmla v30.8h, v5.8h, v11.8h\n" - "fmla v26.8h, v1.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "ldr q11, [x9, x12]\n" + "fmla v29.8h, v7.8h, v13.8h\n" + "ldr q13, [x28, x12]\n" + "fmla v23.8h, v4.8h, v12.8h\n" + "fmla v26.8h, v1.8h, v12.8h\n" + "fmla v24.8h, v5.8h, v11.8h\n" + "ldr q12, [x27, x12]\n" + "fmla v25.8h, v4.8h, v11.8h\n" "fmla v27.8h, v2.8h, v11.8h\n" - "ldr q11, [x26, x14]\n" - "fmla v24.8h, v8.8h, v13.8h\n" - "ldr x26, [x16, #0x20]\n" - "fmla v23.8h, v7.8h, v13.8h\n" - "ldr q13, [x25, x14]\n" - "fmla v28.8h, v7.8h, v12.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v30.8h, v8.8h, v13.8h\n" + "ldr q11, [x26, x12]\n" + "ldr x26, [x13, #0x20]\n" + "fmla v31.8h, v7.8h, v13.8h\n" + "ldr q13, [x23, x12]\n" + "fmla v23.8h, v2.8h, v11.8h\n" + "fmla v26.8h, v7.8h, v12.8h\n" "fmla v27.8h, v6.8h, v12.8h\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "fmla v24.8h, v3.8h, v12.8h\n" - "ldr q12, [x24, x14]\n" + "fmla v29.8h, v4.8h, v12.8h\n" + "fmla v30.8h, v3.8h, v12.8h\n" + "ldr q12, [x25, x12]\n" + "fmla v31.8h, v4.8h, v13.8h\n" + "fmla v24.8h, v1.8h, v11.8h\n" + "fmax v24.8h, v24.8h, v18.8h\n" + "ldr q1, [x14, #0x20]\n" + "fmla v25.8h, v0.8h, v11.8h\n" + "ldr q11, [x24, x12]\n" + "fmla v23.8h, v6.8h, v12.8h\n" + "fmax v23.8h, v23.8h, v18.8h\n" + "fmla v28.8h, v7.8h, v13.8h\n" + "fmla v30.8h, v5.8h, v13.8h\n" + "fmin v23.8h, v23.8h, v17.8h\n" + "str q23, [x22, x11]\n" + "fmla v29.8h, v0.8h, v12.8h\n" "fmla v31.8h, v2.8h, v11.8h\n" - "fmla v30.8h, v1.8h, v11.8h\n" - "ldr q1, [x15, #0x20]\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x23, x14]\n" + "ldr x22, [x15, #0x20]\n" + "fmin v24.8h, v24.8h, v17.8h\n" "fmla v27.8h, v8.8h, v13.8h\n" - "fmla v26.8h, v7.8h, v13.8h\n" - "fmla v24.8h, v5.8h, v13.8h\n" - "fmla v23.8h, v4.8h, v13.8h\n" - "ldr q13, [x10, x14]\n" - "add x14, x14, #0x10\n" - "fmla v31.8h, v6.8h, v12.8h\n" - "ldp x10, x9, [x16, #0x0]\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "ldp x28, x27, [x16, #0x10]\n" - "fmla v25.8h, v0.8h, v12.8h\n" - "ldr q0, [x15, #0x10]\n" - "fmla v29.8h, v8.8h, v11.8h\n" - "ldr q9, [x10, x13]\n" - "fmla v26.8h, v5.8h, v11.8h\n" - "ldr q10, [x9, x13]\n" - "fmla v23.8h, v2.8h, v11.8h\n" - "ldr q11, [x28, x13]\n" - "fmla v25.8h, v8.8h, v13.8h\n" - "ldr q12, [x27, x13]\n" - "fmla v24.8h, v7.8h, v13.8h\n" - "ldr q2, [x15, #0x30]\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "ldr q3, [x15, #0x40]\n" - "fmla v23.8h, v6.8h, v13.8h\n" - "ldr q13, [x26, x13]\n" - "add x13, x13, #0x10\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "ldr q4, [x15, #0x50]\n" - "cmp x13, x11, LSL #4\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "ldr q5, [x15, #0x60]\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "ldr q6, [x15, #0x70]\n" - "fmax v28.8h, v28.8h, v18.8h\n" - "str q31, [x22, x12]\n" - "fmax v27.8h, v27.8h, v18.8h\n" - "ldr x22, [x17, #0x20]\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "ldr q7, [x15, #0x80]\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "ldr q8, [x15, #0x90]\n" - "add x15, x15, #0xa0\n" - "fmin v28.8h, v28.8h, v17.8h\n" - "str q30, [x21, x12]\n" - "fmin v27.8h, v27.8h, v17.8h\n" - "str q29, [x20, x12]\n" + "fmla v26.8h, v3.8h, v12.8h\n" + "ldr q13, [x10, x12]\n" "fmax v26.8h, v26.8h, v18.8h\n" - "ldr x21, [x17, #0x28]\n" + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" "fmax v25.8h, v25.8h, v18.8h\n" - "str q28, [x19, x12]\n" - "fmax v24.8h, v24.8h, v18.8h\n" - "str q27, [x22, x12]\n" - "fmin v26.8h, v26.8h, v17.8h\n" - "ldr x20, [x17, #0x30]\n" + "ldp x10, x9, [x13, #0x0]\n" + "fmla v29.8h, v8.8h, v13.8h\n" + "fmla v30.8h, v7.8h, v13.8h\n" + "fmax v27.8h, v27.8h, v18.8h\n" + "ldp x28, x27, [x13, #0x10]\n" + "fmla v31.8h, v6.8h, v13.8h\n" "fmin v25.8h, v25.8h, v17.8h\n" - "ldr x19, [x17, #0x38]\n" - "fmin v24.8h, v24.8h, v17.8h\n" - "str q26, [x21, x12]\n" - "fmax v23.8h, v23.8h, v18.8h\n" - "str q25, [x20, x12]\n" - "ldr x22, [x17, #0x40]\n" - "fmin v23.8h, v23.8h, v17.8h\n" - "str q24, [x19, x12]\n" - "str q23, [x22, x12]\n" + "str q24, [x21, x11]\n" + "ldr x21, [x15, #0x28]\n" + "fmin v26.8h, v26.8h, v17.8h\n" + "fmin v27.8h, v27.8h, v17.8h\n" + "str q25, [x20, x11]\n" + "ldr x20, [x15, #0x30]\n" + "fmax v28.8h, v28.8h, v18.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "str q26, [x19, x11]\n" + "ldr x19, [x15, #0x38]\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" + "str q27, [x22, x11]\n" + "ldr x22, [x15, #0x40]\n" + "ldr q9, [x10, x17]\n" + "ldr q10, [x9, x17]\n" + "fmin v28.8h, v28.8h, v17.8h\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "ldr q11, [x28, x17]\n" + "ldr q12, [x27, x17]\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "ldr q13, [x26, x17]\n" + "add x17, x17, #0x10\n" + "cmp x17, x16, LSL #4\n" + "str q28, [x21, x11]\n" + "add x12, x12, #0x10\n" + "str q29, [x20, x11]\n" + "ldr q0, [x14, #0x10]\n" + "ldr q2, [x14, #0x30]\n" + "str q30, [x19, x11]\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "str q31, [x22, x11]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "add x14, x14, #0xa0\n" "blt 1b\n" "2:" // Channel tail - "mov v31.16b, v16.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "ldr x25, [x16, #0x28]\n" - "add x12, x12, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v7.8h, v9.8h\n" - "ldr x24, [x16, #0x30]\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "ldr x23, [x16, #0x38]\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v5.8h, v9.8h\n" - "ldr x10, [x16, #0x40]\n" + "mov v23.16b, v16.16b\n fmla v23.8h, v8.8h, v9.8h\n" + "mov v24.16b, v16.16b\n fmla v24.8h, v7.8h, v9.8h\n" + "ldr x25, [x13, #0x30]\n" + "ldr x24, [x13, #0x38]\n" + "mov v25.16b, v16.16b\n fmla v25.8h, v6.8h, v9.8h\n" + "fmla v23.8h, v0.8h, v10.8h\n" + "ldr x23, [x13, #0x28]\n" + "ldr x9, [x13, #0x48]\n" + "fmla v24.8h, v4.8h, v13.8h\n" + "mov v26.16b, v16.16b\n fmla v26.8h, v5.8h, v9.8h\n" + "ldr x10, [x13, #0x40]\n" + "ldr q10, [x9, x12]\n" "mov v27.16b, v16.16b\n fmla v27.8h, v4.8h, v9.8h\n" - "ldr x9, [x16, #0x48]\n" - "mov v26.16b, v16.16b\n fmla v26.8h, v3.8h, v9.8h\n" - "ldr x28, [x16, #0x50]\n" - "mov v25.16b, v16.16b\n fmla v25.8h, v2.8h, v9.8h\n" - "ldr x27, [x16, #0x58]\n" - "mov v24.16b, v16.16b\n fmla v24.8h, v1.8h, v9.8h\n" - "ldr x26, [x16, #0x60]\n" - "mov v23.16b, v16.16b\n fmla v23.8h, v0.8h, v9.8h\n" - "ldr x22, [x17, #0x0]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr q10, [x9, x14]\n" - "fmla v29.8h, v2.8h, v11.8h\n" - "ldr q11, [x24, x14]\n" - "fmla v25.8h, v6.8h, v12.8h\n" - "ldr q12, [x25, x14]\n" - "fmla v30.8h, v4.8h, v13.8h\n" - "ldr x25, [x16, #0x68]\n" - "fmla v31.8h, v5.8h, v13.8h\n" - "ldr x24, [x16, #0x70]\n" - "fmla v29.8h, v3.8h, v13.8h\n" - "ldr x9, [x16, #0x88]\n" - "fmla v28.8h, v2.8h, v13.8h\n" - "ldr x21, [x17, #0x8]\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v3.8h, v9.8h\n" + "ldr x28, [x13, #0x50]\n" + "ldr x27, [x13, #0x58]\n" + "fmla v25.8h, v2.8h, v11.8h\n" + "ldr q11, [x25, x12]\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v2.8h, v9.8h\n" + "ldr x26, [x13, #0x60]\n" + "fmla v23.8h, v5.8h, v13.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "ldr x25, [x13, #0x70]\n" + "ldr x9, [x13, #0x88]\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "fmla v25.8h, v3.8h, v13.8h\n" + "ldr x22, [x15, #0x0]\n" + "add x11, x11, #0x10\n" + "fmla v26.8h, v2.8h, v13.8h\n" "fmla v27.8h, v1.8h, v13.8h\n" - "ldr x20, [x17, #0x10]\n" - "fmla v26.8h, v0.8h, v13.8h\n" - "ldr q13, [x23, x14]\n" - "fmla v23.8h, v8.8h, v12.8h\n" - "ldr q12, [x10, x14]\n" - "fmla v31.8h, v7.8h, v11.8h\n" - "ldr x23, [x16, #0x78]\n" - "fmla v30.8h, v6.8h, v11.8h\n" - "ldr x10, [x16, #0x80]\n" - "fmla v28.8h, v4.8h, v11.8h\n" - "ldr x19, [x17, #0x18]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "fmla v28.8h, v0.8h, v13.8h\n" + "ldr q13, [x24, x12]\n" + "fmla v29.8h, v6.8h, v12.8h\n" + "ldr q12, [x23, x12]\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "fmla v23.8h, v7.8h, v11.8h\n" + "ldr x23, [x13, #0x68]\n" + "ldr x24, [x13, #0x78]\n" + "fmla v24.8h, v0.8h, v13.8h\n" + "fmla v31.8h, v8.8h, v12.8h\n" + "ldr q12, [x10, x12]\n" + "ldr x10, [x13, #0x80]\n" + "fmla v26.8h, v4.8h, v11.8h\n" "fmla v27.8h, v3.8h, v11.8h\n" - "fmla v25.8h, v1.8h, v11.8h\n" - "fmla v24.8h, v0.8h, v11.8h\n" - "ldr q11, [x28, x14]\n" - "fmla v31.8h, v1.8h, v13.8h\n" - "ldr x28, [x16, #0x90]\n" - "fmla v30.8h, v0.8h, v13.8h\n" - "ldr q13, [x27, x14]\n" - "fmla v29.8h, v1.8h, v12.8h\n" - "ldr x27, [x16, #0x98]\n" + "ldr x19, [x15, #0x18]\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "fmla v28.8h, v4.8h, v10.8h\n" + "fmla v29.8h, v1.8h, v11.8h\n" + "fmla v23.8h, v1.8h, v13.8h\n" + "ldr q11, [x28, x12]\n" + "ldr q13, [x27, x12]\n" + "fmla v24.8h, v2.8h, v12.8h\n" + "fmla v25.8h, v1.8h, v12.8h\n" + "ldr q12, [x26, x12]\n" + "ldr x28, [x13, #0x90]\n" "fmla v27.8h, v5.8h, v10.8h\n" - "fmla v26.8h, v4.8h, v10.8h\n" - "fmla v30.8h, v2.8h, v12.8h\n" - "ldr q12, [x26, x14]\n" - "fmla v29.8h, v7.8h, v10.8h\n" - "ldr x26, [x16, #0xa0]\n" - "fmla v24.8h, v2.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" - "fmla v30.8h, v8.8h, v10.8h\n" - "ldr q10, [x25, x14]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr x25, [x16, #0xa8]\n" - "fmla v28.8h, v0.8h, v11.8h\n" - "ldr q11, [x24, x14]\n" - "fmla v29.8h, v5.8h, v13.8h\n" - "ldr x24, [x16, #0xb0]\n" - "fmla v26.8h, v2.8h, v13.8h\n" - "ldr q13, [x23, x14]\n" - "fmla v25.8h, v3.8h, v12.8h\n" - "ldr x23, [x16, #0xb8]\n" - "fmla v28.8h, v6.8h, v12.8h\n" - "ldr q12, [x10, x14]\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "ldr x26, [x13, #0xa0]\n" + "ldr x27, [x13, #0x98]\n" + "fmla v26.8h, v0.8h, v11.8h\n" + "fmla v28.8h, v2.8h, v13.8h\n" + "fmla v24.8h, v8.8h, v10.8h\n" + "fmla v25.8h, v7.8h, v10.8h\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "ldr q10, [x23, x12]\n" + "ldr x23, [x13, #0xa8]\n" + "fmla v26.8h, v6.8h, v12.8h\n" "fmla v27.8h, v7.8h, v10.8h\n" - "ldr x10, [x16, #0xc0]\n" - "fmla v26.8h, v6.8h, v10.8h\n" - "fmla v25.8h, v5.8h, v10.8h\n" - "fmla v28.8h, v8.8h, v10.8h\n" - "fmla v24.8h, v4.8h, v10.8h\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "fmla v26.8h, v8.8h, v11.8h\n" - "fmla v25.8h, v7.8h, v13.8h\n" - "fmla v24.8h, v6.8h, v13.8h\n" - "ldr q13, [x28, x14]\n" - "fmla v23.8h, v5.8h, v11.8h\n" - "ldr q11, [x9, x14]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v28.8h, v1.8h, v12.8h\n" + "ldr q12, [x10, x12]\n" + "ldr x10, [x13, #0xc0]\n" + "fmla v28.8h, v6.8h, v10.8h\n" + "fmla v30.8h, v4.8h, v10.8h\n" + "fmla v23.8h, v3.8h, v11.8h\n" + "fmla v25.8h, v5.8h, v13.8h\n" + "ldr q11, [x25, x12]\n" + "ldr q13, [x24, x12]\n" + "fmla v29.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v3.8h, v10.8h\n" + "ldr x25, [x13, #0xb0]\n" + "ldr x24, [x13, #0xb8]\n" + "fmla v26.8h, v8.8h, v10.8h\n" + "fmla v28.8h, v8.8h, v11.8h\n" + "fmla v30.8h, v6.8h, v13.8h\n" + "fmla v24.8h, v3.8h, v12.8h\n" "fmla v27.8h, v0.8h, v12.8h\n" - "ldr q12, [x27, x14]\n" - "fmla v29.8h, v4.8h, v11.8h\n" - "fmla v30.8h, v5.8h, v11.8h\n" - "fmla v26.8h, v1.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "ldr q11, [x9, x12]\n" + "fmla v29.8h, v7.8h, v13.8h\n" + "ldr q13, [x28, x12]\n" + "fmla v23.8h, v4.8h, v12.8h\n" + "fmla v26.8h, v1.8h, v12.8h\n" + "fmla v24.8h, v5.8h, v11.8h\n" + "ldr q12, [x27, x12]\n" + "fmla v25.8h, v4.8h, v11.8h\n" "fmla v27.8h, v2.8h, v11.8h\n" - "ldr q11, [x26, x14]\n" - "fmla v24.8h, v8.8h, v13.8h\n" - "fmla v23.8h, v7.8h, v13.8h\n" - "ldr q13, [x25, x14]\n" - "fmla v28.8h, v7.8h, v12.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v30.8h, v8.8h, v13.8h\n" + "ldr q11, [x26, x12]\n" + "fmla v31.8h, v7.8h, v13.8h\n" + "ldr q13, [x23, x12]\n" + "fmla v23.8h, v2.8h, v11.8h\n" + "fmla v26.8h, v7.8h, v12.8h\n" "fmla v27.8h, v6.8h, v12.8h\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "fmla v24.8h, v3.8h, v12.8h\n" - "ldr q12, [x24, x14]\n" + "fmla v29.8h, v4.8h, v12.8h\n" + "fmla v30.8h, v3.8h, v12.8h\n" + "ldr q12, [x25, x12]\n" + "fmla v31.8h, v4.8h, v13.8h\n" + "fmla v24.8h, v1.8h, v11.8h\n" + "fmax v24.8h, v24.8h, v18.8h\n" + "fmla v25.8h, v0.8h, v11.8h\n" + "ldr q11, [x24, x12]\n" + "fmla v23.8h, v6.8h, v12.8h\n" + "fmax v23.8h, v23.8h, v18.8h\n" + "fmla v28.8h, v7.8h, v13.8h\n" + "fmla v30.8h, v5.8h, v13.8h\n" + "fmin v23.8h, v23.8h, v17.8h\n" + "str q23, [x22, x11]\n" + "fmla v29.8h, v0.8h, v12.8h\n" "fmla v31.8h, v2.8h, v11.8h\n" - "fmla v30.8h, v1.8h, v11.8h\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x23, x14]\n" + "ldr x22, [x15, #0x20]\n" + "fmin v24.8h, v24.8h, v17.8h\n" "fmla v27.8h, v8.8h, v13.8h\n" - "fmla v26.8h, v7.8h, v13.8h\n" - "fmla v24.8h, v5.8h, v13.8h\n" - "fmla v23.8h, v4.8h, v13.8h\n" - "ldr q13, [x10, x14]\n" - "add x14, x14, #0x10\n" - "fmla v31.8h, v6.8h, v12.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "fmla v25.8h, v0.8h, v12.8h\n" - "fmla v29.8h, v8.8h, v11.8h\n" - "fmla v26.8h, v5.8h, v11.8h\n" - "fmla v23.8h, v2.8h, v11.8h\n" - "fmla v25.8h, v8.8h, v13.8h\n" - "fmla v24.8h, v7.8h, v13.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmla v23.8h, v6.8h, v13.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "str q31, [x22, x12]\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "ldr x22, [x17, #0x20]\n" - "fmax v28.8h, v28.8h, v18.8h\n" - "str q30, [x21, x12]\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "fmax v27.8h, v27.8h, v18.8h\n" - "ldr x21, [x17, #0x28]\n" - "fmin v28.8h, v28.8h, v17.8h\n" - "str q29, [x20, x12]\n" - "fmin v27.8h, v27.8h, v17.8h\n" + "fmla v26.8h, v3.8h, v12.8h\n" + "ldr q13, [x10, x12]\n" "fmax v26.8h, v26.8h, v18.8h\n" - "str q28, [x19, x12]\n" + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" "fmax v25.8h, v25.8h, v18.8h\n" - "ldr x20, [x17, #0x30]\n" - "fmax v24.8h, v24.8h, v18.8h\n" - "str q27, [x22, x12]\n" - "fmin v26.8h, v26.8h, v17.8h\n" - "ldr x19, [x17, #0x38]\n" + "str q24, [x21, x11]\n" + "fmla v29.8h, v8.8h, v13.8h\n" + "fmla v30.8h, v7.8h, v13.8h\n" + "fmax v27.8h, v27.8h, v18.8h\n" + "ldr x21, [x15, #0x28]\n" + "fmla v31.8h, v6.8h, v13.8h\n" "fmin v25.8h, v25.8h, v17.8h\n" - "ldr x22, [x17, #0x40]\n" - "fmin v24.8h, v24.8h, v17.8h\n" - "str q26, [x21, x12]\n" - "fmax v23.8h, v23.8h, v18.8h\n" - "str q25, [x20, x12]\n" - "str q24, [x19, x12]\n" - "fmin v23.8h, v23.8h, v17.8h\n" - "str q23, [x22, x12]\n" + "str q25, [x20, x11]\n" + "ldr x20, [x15, #0x30]\n" + "fmin v26.8h, v26.8h, v17.8h\n" + "fmin v27.8h, v27.8h, v17.8h\n" + "str q26, [x19, x11]\n" + "ldr x19, [x15, #0x38]\n" + "fmax v28.8h, v28.8h, v18.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "str q27, [x22, x11]\n" + "ldr x22, [x15, #0x40]\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" + "add x12, x12, #0x10\n" + "fmin v28.8h, v28.8h, v17.8h\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "str q28, [x21, x11]\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "str q29, [x20, x11]\n" + "str q30, [x19, x11]\n" + "str q31, [x22, x11]\n" "3:" // Oddments - "tst %x[n_channels], #0x1\n" - "beq 48f\n" - "ldr q16, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "mov x12, x14\n" - "ldr q1, [x15, #0x20]\n" - "ldr q2, [x15, #0x30]\n" - "ldr q3, [x15, #0x40]\n" - "ldr q4, [x15, #0x50]\n" - "ldr q5, [x15, #0x60]\n" - "ldr q6, [x15, #0x70]\n" - "ldr q7, [x15, #0x80]\n" - "ldr q8, [x15, #0x90]\n" - "ldr x10, [x16, #0x0]\n" - "add x10, x10, x14\n" - "ldr x9, [x16, #0x8]\n" - "ldr x28, [x16, #0x10]\n" - "add x9, x9, x14\n" - "ldr x27, [x16, #0x18]\n" - "ldr x26, [x16, #0x20]\n" - "add x28, x28, x14\n" - "add x27, x27, x14\n" - "add x26, x26, x14\n" + "tst %x[n_channels], #0x7\n" + "beq 92f\n" + "ldr x10, [x13, #0x0]\n" + "ldr x9, [x13, #0x8]\n" + "ldr x28, [x13, #0x10]\n" + "ldr x27, [x13, #0x18]\n" + "mov x11, x12\n" + "add x10, x10, x12\n" + "ldr x26, [x13, #0x20]\n" + "ldr q16, [x14, #0x0]\n" + "add x9, x9, x12\n" + "add x28, x28, x12\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "add x27, x27, x12\n" + "add x26, x26, x12\n" + "ldr q2, [x14, #0x30]\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "tbz %x[n_channels], #2, 5f\n" + "ld1 { v9.d }[0], [x10], #0x8\n" + "ld1 { v10.d }[0], [x9], #0x8\n" + "ld1 { v11.d }[0], [x28], #0x8\n" + "ld1 { v12.d }[0], [x27], #0x8\n" + "ld1 { v13.d }[0], [x26], #0x8\n" "tbz %x[n_channels], #1, 4f\n" + "ld1 { v9.s }[2], [x10], #0x4\n" + "ld1 { v10.s }[2], [x9], #0x4\n" + "ld1 { v11.s }[2], [x28], #0x4\n" + "ld1 { v12.s }[2], [x27], #0x4\n" + "ld1 { v13.s }[2], [x26], #0x4\n" + "tbz %x[n_channels], #0, 7f\n" + "ld1 { v9.h }[6], [x10], #0x2\n" + "ld1 { v10.h }[6], [x9], #0x2\n" + "ld1 { v11.h }[6], [x28], #0x2\n" + "ld1 { v12.h }[6], [x27], #0x2\n" + "ld1 { v13.h }[6], [x26], #0x2\n" + "b 7f\n" + "4:" // Oddments: Load inputs (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 7f\n" + "ld1 { v9.h }[4], [x10], #0x2\n" + "ld1 { v10.h }[4], [x9], #0x2\n" + "ld1 { v11.h }[4], [x28], #0x2\n" + "ld1 { v12.h }[4], [x27], #0x2\n" + "ld1 { v13.h }[4], [x26], #0x2\n" + "b 7f\n" + "5:" // Oddments: Load inputs (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 6f\n" "ld1 { v9.s }[0], [x10], #0x4\n" "ld1 { v10.s }[0], [x9], #0x4\n" "ld1 { v11.s }[0], [x28], #0x4\n" "ld1 { v12.s }[0], [x27], #0x4\n" "ld1 { v13.s }[0], [x26], #0x4\n" - "tbz %x[n_channels], #0, 5f\n" + "tbz %x[n_channels], #0, 7f\n" "ld1 { v9.h }[2], [x10], #0x2\n" "ld1 { v10.h }[2], [x9], #0x2\n" "ld1 { v11.h }[2], [x28], #0x2\n" "ld1 { v12.h }[2], [x27], #0x2\n" "ld1 { v13.h }[2], [x26], #0x2\n" - "b 5f\n" - "4:" // Oddments: Load inputs (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 1: Unset + "b 7f\n" + "6:" // Oddments: Load inputs (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v9.h }[0], [x10], #0x2\n" "ld1 { v10.h }[0], [x9], #0x2\n" "ld1 { v11.h }[0], [x28], #0x2\n" "ld1 { v12.h }[0], [x27], #0x2\n" "ld1 { v13.h }[0], [x26], #0x2\n" - "5:" // Oddments: Load inputs (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 1: End - "mov v31.16b, v16.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "ldr x25, [x16, #0x28]\n" - "add x25, x25, x14\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v7.8h, v9.8h\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v5.8h, v9.8h\n" + "7:" // Oddments: Load inputs (2, 2), (0, 0), (0, 4), (4, 0), (1, 2): Bit 2: End + "mov v23.16b, v16.16b\n fmla v23.8h, v8.8h, v9.8h\n" + "mov v25.16b, v16.16b\n fmla v25.8h, v6.8h, v9.8h\n" + "ldr x23, [x13, #0x28]\n" + "add x23, x23, x12\n" + "mov v24.16b, v16.16b\n fmla v24.8h, v7.8h, v9.8h\n" + "mov v26.16b, v16.16b\n fmla v26.8h, v5.8h, v9.8h\n" "mov v27.16b, v16.16b\n fmla v27.8h, v4.8h, v9.8h\n" - "mov v26.16b, v16.16b\n fmla v26.8h, v3.8h, v9.8h\n" - "mov v25.16b, v16.16b\n fmla v25.8h, v2.8h, v9.8h\n" - "mov v24.16b, v16.16b\n fmla v24.8h, v1.8h, v9.8h\n" - "mov v23.16b, v16.16b\n fmla v23.8h, v0.8h, v9.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "fmla v29.8h, v2.8h, v11.8h\n" - "fmla v25.8h, v6.8h, v12.8h\n" - "fmla v30.8h, v4.8h, v13.8h\n" - "fmla v31.8h, v5.8h, v13.8h\n" - "fmla v29.8h, v3.8h, v13.8h\n" - "fmla v28.8h, v2.8h, v13.8h\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v3.8h, v9.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v2.8h, v9.8h\n" + "fmla v23.8h, v0.8h, v10.8h\n" + "fmla v25.8h, v2.8h, v11.8h\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v1.8h, v9.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "fmla v29.8h, v6.8h, v12.8h\n" + "fmla v23.8h, v5.8h, v13.8h\n" + "fmla v24.8h, v4.8h, v13.8h\n" + "fmla v25.8h, v3.8h, v13.8h\n" + "fmla v26.8h, v2.8h, v13.8h\n" "fmla v27.8h, v1.8h, v13.8h\n" - "fmla v26.8h, v0.8h, v13.8h\n" - "tbz %x[n_channels], #1, 6f\n" - "ld1 { v12.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 7f\n" - "ld1 { v12.h }[2], [x25], #0x2\n" - "b 7f\n" - "6:" // Oddments: Load input (4, 4): Bit 1: Unset - "ld1 { v12.h }[0], [x25], #0x2\n" - "7:" // Oddments: Load input (4, 4): Bit 1: End - "fmla v23.8h, v8.8h, v12.8h\n" - "ldr x24, [x16, #0x30]\n" - "add x24, x24, x14\n" + "fmla v28.8h, v0.8h, v13.8h\n" + "tbz %x[n_channels], #2, 9f\n" + "ld1 { v12.d }[0], [x23], #0x8\n" "tbz %x[n_channels], #1, 8f\n" - "ld1 { v11.s }[0], [x24], #0x4\n" - "tbz %x[n_channels], #0, 9f\n" - "ld1 { v11.h }[2], [x24], #0x2\n" - "b 9f\n" - "8:" // Oddments: Load input (2, 1): Bit 1: Unset - "ld1 { v11.h }[0], [x24], #0x2\n" - "9:" // Oddments: Load input (2, 1): Bit 1: End - "fmla v31.8h, v7.8h, v11.8h\n" - "ldr x23, [x16, #0x38]\n" - "fmla v30.8h, v6.8h, v11.8h\n" - "add x23, x23, x14\n" - "fmla v28.8h, v4.8h, v11.8h\n" - "fmla v27.8h, v3.8h, v11.8h\n" - "fmla v25.8h, v1.8h, v11.8h\n" - "fmla v24.8h, v0.8h, v11.8h\n" + "ld1 { v12.s }[2], [x23], #0x4\n" + "tbz %x[n_channels], #0, 11f\n" + "ld1 { v12.h }[6], [x23], #0x2\n" + "b 11f\n" + "8:" // Oddments: Load input (4, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 11f\n" + "ld1 { v12.h }[4], [x23], #0x2\n" + "b 11f\n" + "9:" // Oddments: Load input (4, 4): Bit 2: Unset "tbz %x[n_channels], #1, 10f\n" - "ld1 { v13.s }[0], [x23], #0x4\n" + "ld1 { v12.s }[0], [x23], #0x4\n" "tbz %x[n_channels], #0, 11f\n" - "ld1 { v13.h }[2], [x23], #0x2\n" + "ld1 { v12.h }[2], [x23], #0x2\n" "b 11f\n" - "10:" // Oddments: Load input (0, 1): Bit 1: Unset - "ld1 { v13.h }[0], [x23], #0x2\n" - "11:" // Oddments: Load input (0, 1): Bit 1: End - "fmla v31.8h, v1.8h, v13.8h\n" - "ldr x10, [x16, #0x40]\n" - "fmla v30.8h, v0.8h, v13.8h\n" - "add x10, x10, x14\n" + "10:" // Oddments: Load input (4, 4): Bit 2: Unset: Bit 1: Unset + "ld1 { v12.h }[0], [x23], #0x2\n" + "11:" // Oddments: Load input (4, 4): Bit 2: End + "ldr x25, [x13, #0x30]\n" + "fmla v31.8h, v8.8h, v12.8h\n" + "add x25, x25, x12\n" + "tbz %x[n_channels], #2, 13f\n" + "ld1 { v11.d }[0], [x25], #0x8\n" "tbz %x[n_channels], #1, 12f\n" + "ld1 { v11.s }[2], [x25], #0x4\n" + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v11.h }[6], [x25], #0x2\n" + "b 15f\n" + "12:" // Oddments: Load input (2, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v11.h }[4], [x25], #0x2\n" + "b 15f\n" + "13:" // Oddments: Load input (2, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 14f\n" + "ld1 { v11.s }[0], [x25], #0x4\n" + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v11.h }[2], [x25], #0x2\n" + "b 15f\n" + "14:" // Oddments: Load input (2, 1): Bit 2: Unset: Bit 1: Unset + "ld1 { v11.h }[0], [x25], #0x2\n" + "15:" // Oddments: Load input (2, 1): Bit 2: End + "ldr x24, [x13, #0x38]\n" + "fmla v23.8h, v7.8h, v11.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "add x24, x24, x12\n" + "fmla v26.8h, v4.8h, v11.8h\n" + "fmla v27.8h, v3.8h, v11.8h\n" + "fmla v29.8h, v1.8h, v11.8h\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "tbz %x[n_channels], #2, 17f\n" + "ld1 { v13.d }[0], [x24], #0x8\n" + "tbz %x[n_channels], #1, 16f\n" + "ld1 { v13.s }[2], [x24], #0x4\n" + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v13.h }[6], [x24], #0x2\n" + "b 19f\n" + "16:" // Oddments: Load input (0, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v13.h }[4], [x24], #0x2\n" + "b 19f\n" + "17:" // Oddments: Load input (0, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 18f\n" + "ld1 { v13.s }[0], [x24], #0x4\n" + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v13.h }[2], [x24], #0x2\n" + "b 19f\n" + "18:" // Oddments: Load input (0, 1): Bit 2: Unset: Bit 1: Unset + "ld1 { v13.h }[0], [x24], #0x2\n" + "19:" // Oddments: Load input (0, 1): Bit 2: End + "ldr x10, [x13, #0x40]\n" + "fmla v23.8h, v1.8h, v13.8h\n" + "fmla v24.8h, v0.8h, v13.8h\n" + "add x10, x10, x12\n" + "tbz %x[n_channels], #2, 21f\n" + "ld1 { v12.d }[0], [x10], #0x8\n" + "tbz %x[n_channels], #1, 20f\n" + "ld1 { v12.s }[2], [x10], #0x4\n" + "tbz %x[n_channels], #0, 23f\n" + "ld1 { v12.h }[6], [x10], #0x2\n" + "b 23f\n" + "20:" // Oddments: Load input (0, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 23f\n" + "ld1 { v12.h }[4], [x10], #0x2\n" + "b 23f\n" + "21:" // Oddments: Load input (0, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 22f\n" "ld1 { v12.s }[0], [x10], #0x4\n" - "tbz %x[n_channels], #0, 13f\n" + "tbz %x[n_channels], #0, 23f\n" "ld1 { v12.h }[2], [x10], #0x2\n" - "b 13f\n" - "12:" // Oddments: Load input (0, 3): Bit 1: Unset + "b 23f\n" + "22:" // Oddments: Load input (0, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x10], #0x2\n" - "13:" // Oddments: Load input (0, 3): Bit 1: End - "fmla v30.8h, v2.8h, v12.8h\n" - "ldr x9, [x16, #0x48]\n" - "fmla v29.8h, v1.8h, v12.8h\n" - "add x9, x9, x14\n" - "tbz %x[n_channels], #1, 14f\n" + "23:" // Oddments: Load input (0, 3): Bit 2: End + "ldr x9, [x13, #0x48]\n" + "fmla v24.8h, v2.8h, v12.8h\n" + "fmla v25.8h, v1.8h, v12.8h\n" + "add x9, x9, x12\n" + "tbz %x[n_channels], #2, 25f\n" + "ld1 { v10.d }[0], [x9], #0x8\n" + "tbz %x[n_channels], #1, 24f\n" + "ld1 { v10.s }[2], [x9], #0x4\n" + "tbz %x[n_channels], #0, 27f\n" + "ld1 { v10.h }[6], [x9], #0x2\n" + "b 27f\n" + "24:" // Oddments: Load input (2, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 27f\n" + "ld1 { v10.h }[4], [x9], #0x2\n" + "b 27f\n" + "25:" // Oddments: Load input (2, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 26f\n" "ld1 { v10.s }[0], [x9], #0x4\n" - "tbz %x[n_channels], #0, 15f\n" + "tbz %x[n_channels], #0, 27f\n" "ld1 { v10.h }[2], [x9], #0x2\n" - "b 15f\n" - "14:" // Oddments: Load input (2, 3): Bit 1: Unset + "b 27f\n" + "26:" // Oddments: Load input (2, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v10.h }[0], [x9], #0x2\n" - "15:" // Oddments: Load input (2, 3): Bit 1: End - "fmla v30.8h, v8.8h, v10.8h\n" - "ldr x28, [x16, #0x50]\n" - "fmla v29.8h, v7.8h, v10.8h\n" - "add x28, x28, x14\n" + "27:" // Oddments: Load input (2, 3): Bit 2: End + "ldr x28, [x13, #0x50]\n" + "fmla v24.8h, v8.8h, v10.8h\n" + "fmla v25.8h, v7.8h, v10.8h\n" + "add x28, x28, x12\n" "fmla v27.8h, v5.8h, v10.8h\n" - "fmla v26.8h, v4.8h, v10.8h\n" - "fmla v24.8h, v2.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" - "tbz %x[n_channels], #1, 16f\n" + "fmla v28.8h, v4.8h, v10.8h\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "tbz %x[n_channels], #2, 29f\n" + "ld1 { v11.d }[0], [x28], #0x8\n" + "tbz %x[n_channels], #1, 28f\n" + "ld1 { v11.s }[2], [x28], #0x4\n" + "tbz %x[n_channels], #0, 31f\n" + "ld1 { v11.h }[6], [x28], #0x2\n" + "b 31f\n" + "28:" // Oddments: Load input (1, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 31f\n" + "ld1 { v11.h }[4], [x28], #0x2\n" + "b 31f\n" + "29:" // Oddments: Load input (1, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 30f\n" "ld1 { v11.s }[0], [x28], #0x4\n" - "tbz %x[n_channels], #0, 17f\n" + "tbz %x[n_channels], #0, 31f\n" "ld1 { v11.h }[2], [x28], #0x2\n" - "b 17f\n" - "16:" // Oddments: Load input (1, 0): Bit 1: Unset + "b 31f\n" + "30:" // Oddments: Load input (1, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x28], #0x2\n" - "17:" // Oddments: Load input (1, 0): Bit 1: End - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr x27, [x16, #0x58]\n" - "fmla v28.8h, v0.8h, v11.8h\n" - "add x27, x27, x14\n" - "tbz %x[n_channels], #1, 18f\n" + "31:" // Oddments: Load input (1, 0): Bit 2: End + "ldr x27, [x13, #0x58]\n" + "fmla v23.8h, v3.8h, v11.8h\n" + "fmla v26.8h, v0.8h, v11.8h\n" + "add x27, x27, x12\n" + "tbz %x[n_channels], #2, 33f\n" + "ld1 { v13.d }[0], [x27], #0x8\n" + "tbz %x[n_channels], #1, 32f\n" + "ld1 { v13.s }[2], [x27], #0x4\n" + "tbz %x[n_channels], #0, 35f\n" + "ld1 { v13.h }[6], [x27], #0x2\n" + "b 35f\n" + "32:" // Oddments: Load input (1, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 35f\n" + "ld1 { v13.h }[4], [x27], #0x2\n" + "b 35f\n" + "33:" // Oddments: Load input (1, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 34f\n" "ld1 { v13.s }[0], [x27], #0x4\n" - "tbz %x[n_channels], #0, 19f\n" + "tbz %x[n_channels], #0, 35f\n" "ld1 { v13.h }[2], [x27], #0x2\n" - "b 19f\n" - "18:" // Oddments: Load input (1, 4): Bit 1: Unset + "b 35f\n" + "34:" // Oddments: Load input (1, 4): Bit 2: Unset: Bit 1: Unset "ld1 { v13.h }[0], [x27], #0x2\n" - "19:" // Oddments: Load input (1, 4): Bit 1: End - "fmla v29.8h, v5.8h, v13.8h\n" - "ldr x26, [x16, #0x60]\n" - "fmla v26.8h, v2.8h, v13.8h\n" - "add x26, x26, x14\n" - "tbz %x[n_channels], #1, 20f\n" + "35:" // Oddments: Load input (1, 4): Bit 2: End + "ldr x26, [x13, #0x60]\n" + "fmla v25.8h, v5.8h, v13.8h\n" + "fmla v28.8h, v2.8h, v13.8h\n" + "add x26, x26, x12\n" + "tbz %x[n_channels], #2, 37f\n" + "ld1 { v12.d }[0], [x26], #0x8\n" + "tbz %x[n_channels], #1, 36f\n" + "ld1 { v12.s }[2], [x26], #0x4\n" + "tbz %x[n_channels], #0, 39f\n" + "ld1 { v12.h }[6], [x26], #0x2\n" + "b 39f\n" + "36:" // Oddments: Load input (3, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 39f\n" + "ld1 { v12.h }[4], [x26], #0x2\n" + "b 39f\n" + "37:" // Oddments: Load input (3, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 38f\n" "ld1 { v12.s }[0], [x26], #0x4\n" - "tbz %x[n_channels], #0, 21f\n" + "tbz %x[n_channels], #0, 39f\n" "ld1 { v12.h }[2], [x26], #0x2\n" - "b 21f\n" - "20:" // Oddments: Load input (3, 0): Bit 1: Unset + "b 39f\n" + "38:" // Oddments: Load input (3, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x26], #0x2\n" - "21:" // Oddments: Load input (3, 0): Bit 1: End - "fmla v28.8h, v6.8h, v12.8h\n" - "ldr x25, [x16, #0x68]\n" - "fmla v25.8h, v3.8h, v12.8h\n" - "add x25, x25, x14\n" - "tbz %x[n_channels], #1, 22f\n" - "ld1 { v10.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 23f\n" - "ld1 { v10.h }[2], [x25], #0x2\n" - "b 23f\n" - "22:" // Oddments: Load input (3, 2): Bit 1: Unset - "ld1 { v10.h }[0], [x25], #0x2\n" - "23:" // Oddments: Load input (3, 2): Bit 1: End - "fmla v28.8h, v8.8h, v10.8h\n" - "ldr x24, [x16, #0x70]\n" + "39:" // Oddments: Load input (3, 0): Bit 2: End + "ldr x23, [x13, #0x68]\n" + "fmla v26.8h, v6.8h, v12.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "add x23, x23, x12\n" + "tbz %x[n_channels], #2, 41f\n" + "ld1 { v10.d }[0], [x23], #0x8\n" + "tbz %x[n_channels], #1, 40f\n" + "ld1 { v10.s }[2], [x23], #0x4\n" + "tbz %x[n_channels], #0, 43f\n" + "ld1 { v10.h }[6], [x23], #0x2\n" + "b 43f\n" + "40:" // Oddments: Load input (3, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 43f\n" + "ld1 { v10.h }[4], [x23], #0x2\n" + "b 43f\n" + "41:" // Oddments: Load input (3, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 42f\n" + "ld1 { v10.s }[0], [x23], #0x4\n" + "tbz %x[n_channels], #0, 43f\n" + "ld1 { v10.h }[2], [x23], #0x2\n" + "b 43f\n" + "42:" // Oddments: Load input (3, 2): Bit 2: Unset: Bit 1: Unset + "ld1 { v10.h }[0], [x23], #0x2\n" + "43:" // Oddments: Load input (3, 2): Bit 2: End + "ldr x25, [x13, #0x70]\n" + "fmla v26.8h, v8.8h, v10.8h\n" "fmla v27.8h, v7.8h, v10.8h\n" - "add x24, x24, x14\n" - "fmla v26.8h, v6.8h, v10.8h\n" - "fmla v25.8h, v5.8h, v10.8h\n" - "fmla v24.8h, v4.8h, v10.8h\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "tbz %x[n_channels], #1, 24f\n" - "ld1 { v11.s }[0], [x24], #0x4\n" - "tbz %x[n_channels], #0, 25f\n" - "ld1 { v11.h }[2], [x24], #0x2\n" - "b 25f\n" - "24:" // Oddments: Load input (3, 4): Bit 1: Unset - "ld1 { v11.h }[0], [x24], #0x2\n" - "25:" // Oddments: Load input (3, 4): Bit 1: End - "fmla v26.8h, v8.8h, v11.8h\n" - "ldr x23, [x16, #0x78]\n" - "fmla v23.8h, v5.8h, v11.8h\n" - "add x23, x23, x14\n" - "tbz %x[n_channels], #1, 26f\n" - "ld1 { v13.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 27f\n" - "ld1 { v13.h }[2], [x23], #0x2\n" - "b 27f\n" - "26:" // Oddments: Load input (4, 1): Bit 1: Unset - "ld1 { v13.h }[0], [x23], #0x2\n" - "27:" // Oddments: Load input (4, 1): Bit 1: End - "fmla v25.8h, v7.8h, v13.8h\n" - "ldr x10, [x16, #0x80]\n" - "fmla v24.8h, v6.8h, v13.8h\n" - "add x10, x10, x14\n" - "tbz %x[n_channels], #1, 28f\n" + "add x25, x25, x12\n" + "fmla v28.8h, v6.8h, v10.8h\n" + "fmla v29.8h, v5.8h, v10.8h\n" + "fmla v30.8h, v4.8h, v10.8h\n" + "fmla v31.8h, v3.8h, v10.8h\n" + "tbz %x[n_channels], #2, 45f\n" + "ld1 { v11.d }[0], [x25], #0x8\n" + "tbz %x[n_channels], #1, 44f\n" + "ld1 { v11.s }[2], [x25], #0x4\n" + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v11.h }[6], [x25], #0x2\n" + "b 47f\n" + "44:" // Oddments: Load input (3, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v11.h }[4], [x25], #0x2\n" + "b 47f\n" + "45:" // Oddments: Load input (3, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 46f\n" + "ld1 { v11.s }[0], [x25], #0x4\n" + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v11.h }[2], [x25], #0x2\n" + "b 47f\n" + "46:" // Oddments: Load input (3, 4): Bit 2: Unset: Bit 1: Unset + "ld1 { v11.h }[0], [x25], #0x2\n" + "47:" // Oddments: Load input (3, 4): Bit 2: End + "ldr x24, [x13, #0x78]\n" + "fmla v28.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "add x24, x24, x12\n" + "tbz %x[n_channels], #2, 49f\n" + "ld1 { v13.d }[0], [x24], #0x8\n" + "tbz %x[n_channels], #1, 48f\n" + "ld1 { v13.s }[2], [x24], #0x4\n" + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v13.h }[6], [x24], #0x2\n" + "b 51f\n" + "48:" // Oddments: Load input (4, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v13.h }[4], [x24], #0x2\n" + "b 51f\n" + "49:" // Oddments: Load input (4, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 50f\n" + "ld1 { v13.s }[0], [x24], #0x4\n" + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v13.h }[2], [x24], #0x2\n" + "b 51f\n" + "50:" // Oddments: Load input (4, 1): Bit 2: Unset: Bit 1: Unset + "ld1 { v13.h }[0], [x24], #0x2\n" + "51:" // Oddments: Load input (4, 1): Bit 2: End + "ldr x10, [x13, #0x80]\n" + "fmla v29.8h, v7.8h, v13.8h\n" + "fmla v30.8h, v6.8h, v13.8h\n" + "add x10, x10, x12\n" + "tbz %x[n_channels], #2, 53f\n" + "ld1 { v12.d }[0], [x10], #0x8\n" + "tbz %x[n_channels], #1, 52f\n" + "ld1 { v12.s }[2], [x10], #0x4\n" + "tbz %x[n_channels], #0, 55f\n" + "ld1 { v12.h }[6], [x10], #0x2\n" + "b 55f\n" + "52:" // Oddments: Load input (1, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 55f\n" + "ld1 { v12.h }[4], [x10], #0x2\n" + "b 55f\n" + "53:" // Oddments: Load input (1, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 54f\n" "ld1 { v12.s }[0], [x10], #0x4\n" - "tbz %x[n_channels], #0, 29f\n" + "tbz %x[n_channels], #0, 55f\n" "ld1 { v12.h }[2], [x10], #0x2\n" - "b 29f\n" - "28:" // Oddments: Load input (1, 1): Bit 1: Unset + "b 55f\n" + "54:" // Oddments: Load input (1, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x10], #0x2\n" - "29:" // Oddments: Load input (1, 1): Bit 1: End - "fmla v31.8h, v4.8h, v12.8h\n" - "ldr x9, [x16, #0x88]\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "add x9, x9, x14\n" - "fmla v28.8h, v1.8h, v12.8h\n" + "55:" // Oddments: Load input (1, 1): Bit 2: End + "ldr x9, [x13, #0x88]\n" + "fmla v23.8h, v4.8h, v12.8h\n" + "fmla v24.8h, v3.8h, v12.8h\n" + "add x9, x9, x12\n" + "fmla v26.8h, v1.8h, v12.8h\n" "fmla v27.8h, v0.8h, v12.8h\n" - "tbz %x[n_channels], #1, 30f\n" + "tbz %x[n_channels], #2, 57f\n" + "ld1 { v11.d }[0], [x9], #0x8\n" + "tbz %x[n_channels], #1, 56f\n" + "ld1 { v11.s }[2], [x9], #0x4\n" + "tbz %x[n_channels], #0, 59f\n" + "ld1 { v11.h }[6], [x9], #0x2\n" + "b 59f\n" + "56:" // Oddments: Load input (1, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 59f\n" + "ld1 { v11.h }[4], [x9], #0x2\n" + "b 59f\n" + "57:" // Oddments: Load input (1, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 58f\n" "ld1 { v11.s }[0], [x9], #0x4\n" - "tbz %x[n_channels], #0, 31f\n" + "tbz %x[n_channels], #0, 59f\n" "ld1 { v11.h }[2], [x9], #0x2\n" - "b 31f\n" - "30:" // Oddments: Load input (1, 3): Bit 1: Unset + "b 59f\n" + "58:" // Oddments: Load input (1, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x9], #0x2\n" - "31:" // Oddments: Load input (1, 3): Bit 1: End - "fmla v30.8h, v5.8h, v11.8h\n" - "ldr x28, [x16, #0x90]\n" - "fmla v29.8h, v4.8h, v11.8h\n" - "add x28, x28, x14\n" + "59:" // Oddments: Load input (1, 3): Bit 2: End + "ldr x28, [x13, #0x90]\n" + "fmla v24.8h, v5.8h, v11.8h\n" + "fmla v25.8h, v4.8h, v11.8h\n" + "add x28, x28, x12\n" "fmla v27.8h, v2.8h, v11.8h\n" - "fmla v26.8h, v1.8h, v11.8h\n" - "tbz %x[n_channels], #1, 32f\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "tbz %x[n_channels], #2, 61f\n" + "ld1 { v13.d }[0], [x28], #0x8\n" + "tbz %x[n_channels], #1, 60f\n" + "ld1 { v13.s }[2], [x28], #0x4\n" + "tbz %x[n_channels], #0, 63f\n" + "ld1 { v13.h }[6], [x28], #0x2\n" + "b 63f\n" + "60:" // Oddments: Load input (4, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 63f\n" + "ld1 { v13.h }[4], [x28], #0x2\n" + "b 63f\n" + "61:" // Oddments: Load input (4, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 62f\n" "ld1 { v13.s }[0], [x28], #0x4\n" - "tbz %x[n_channels], #0, 33f\n" + "tbz %x[n_channels], #0, 63f\n" "ld1 { v13.h }[2], [x28], #0x2\n" - "b 33f\n" - "32:" // Oddments: Load input (4, 3): Bit 1: Unset + "b 63f\n" + "62:" // Oddments: Load input (4, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v13.h }[0], [x28], #0x2\n" - "33:" // Oddments: Load input (4, 3): Bit 1: End - "fmla v24.8h, v8.8h, v13.8h\n" - "ldr x27, [x16, #0x98]\n" - "fmla v23.8h, v7.8h, v13.8h\n" - "add x27, x27, x14\n" - "tbz %x[n_channels], #1, 34f\n" + "63:" // Oddments: Load input (4, 3): Bit 2: End + "ldr x27, [x13, #0x98]\n" + "fmla v30.8h, v8.8h, v13.8h\n" + "fmla v31.8h, v7.8h, v13.8h\n" + "add x27, x27, x12\n" + "tbz %x[n_channels], #2, 65f\n" + "ld1 { v12.d }[0], [x27], #0x8\n" + "tbz %x[n_channels], #1, 64f\n" + "ld1 { v12.s }[2], [x27], #0x4\n" + "tbz %x[n_channels], #0, 67f\n" + "ld1 { v12.h }[6], [x27], #0x2\n" + "b 67f\n" + "64:" // Oddments: Load input (3, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 67f\n" + "ld1 { v12.h }[4], [x27], #0x2\n" + "b 67f\n" + "65:" // Oddments: Load input (3, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 66f\n" "ld1 { v12.s }[0], [x27], #0x4\n" - "tbz %x[n_channels], #0, 35f\n" + "tbz %x[n_channels], #0, 67f\n" "ld1 { v12.h }[2], [x27], #0x2\n" - "b 35f\n" - "34:" // Oddments: Load input (3, 1): Bit 1: Unset + "b 67f\n" + "66:" // Oddments: Load input (3, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x27], #0x2\n" - "35:" // Oddments: Load input (3, 1): Bit 1: End - "fmla v28.8h, v7.8h, v12.8h\n" - "ldr x26, [x16, #0xa0]\n" + "67:" // Oddments: Load input (3, 1): Bit 2: End + "ldr x26, [x13, #0xa0]\n" + "fmla v26.8h, v7.8h, v12.8h\n" "fmla v27.8h, v6.8h, v12.8h\n" - "add x26, x26, x14\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "fmla v24.8h, v3.8h, v12.8h\n" - "tbz %x[n_channels], #1, 36f\n" + "add x26, x26, x12\n" + "fmla v29.8h, v4.8h, v12.8h\n" + "fmla v30.8h, v3.8h, v12.8h\n" + "tbz %x[n_channels], #2, 69f\n" + "ld1 { v11.d }[0], [x26], #0x8\n" + "tbz %x[n_channels], #1, 68f\n" + "ld1 { v11.s }[2], [x26], #0x4\n" + "tbz %x[n_channels], #0, 71f\n" + "ld1 { v11.h }[6], [x26], #0x2\n" + "b 71f\n" + "68:" // Oddments: Load input (0, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 71f\n" + "ld1 { v11.h }[4], [x26], #0x2\n" + "b 71f\n" + "69:" // Oddments: Load input (0, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 70f\n" "ld1 { v11.s }[0], [x26], #0x4\n" - "tbz %x[n_channels], #0, 37f\n" + "tbz %x[n_channels], #0, 71f\n" "ld1 { v11.h }[2], [x26], #0x2\n" - "b 37f\n" - "36:" // Oddments: Load input (0, 2): Bit 1: Unset + "b 71f\n" + "70:" // Oddments: Load input (0, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x26], #0x2\n" - "37:" // Oddments: Load input (0, 2): Bit 1: End - "fmla v31.8h, v2.8h, v11.8h\n" - "ldr x25, [x16, #0xa8]\n" - "fmla v30.8h, v1.8h, v11.8h\n" - "add x25, x25, x14\n" - "fmla v29.8h, v0.8h, v11.8h\n" - "tbz %x[n_channels], #1, 38f\n" - "ld1 { v13.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 39f\n" - "ld1 { v13.h }[2], [x25], #0x2\n" - "b 39f\n" - "38:" // Oddments: Load input (3, 3): Bit 1: Unset - "ld1 { v13.h }[0], [x25], #0x2\n" - "39:" // Oddments: Load input (3, 3): Bit 1: End - "fmla v27.8h, v8.8h, v13.8h\n" - "ldr x24, [x16, #0xb0]\n" - "fmla v26.8h, v7.8h, v13.8h\n" - "add x24, x24, x14\n" - "fmla v24.8h, v5.8h, v13.8h\n" - "fmla v23.8h, v4.8h, v13.8h\n" - "tbz %x[n_channels], #1, 40f\n" - "ld1 { v12.s }[0], [x24], #0x4\n" - "tbz %x[n_channels], #0, 41f\n" - "ld1 { v12.h }[2], [x24], #0x2\n" - "b 41f\n" - "40:" // Oddments: Load input (2, 0): Bit 1: Unset - "ld1 { v12.h }[0], [x24], #0x2\n" - "41:" // Oddments: Load input (2, 0): Bit 1: End - "fmla v31.8h, v6.8h, v12.8h\n" - "ldr x23, [x16, #0xb8]\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "add x23, x23, x14\n" - "fmla v25.8h, v0.8h, v12.8h\n" - "tbz %x[n_channels], #1, 42f\n" - "ld1 { v11.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 43f\n" - "ld1 { v11.h }[2], [x23], #0x2\n" - "b 43f\n" - "42:" // Oddments: Load input (2, 4): Bit 1: Unset - "ld1 { v11.h }[0], [x23], #0x2\n" - "43:" // Oddments: Load input (2, 4): Bit 1: End - "fmla v29.8h, v8.8h, v11.8h\n" - "ldr x10, [x16, #0xc0]\n" - "fmla v26.8h, v5.8h, v11.8h\n" - "add x10, x10, x14\n" + "71:" // Oddments: Load input (0, 2): Bit 2: End + "ldr x23, [x13, #0xa8]\n" "fmla v23.8h, v2.8h, v11.8h\n" - "tbz %x[n_channels], #1, 44f\n" + "fmla v24.8h, v1.8h, v11.8h\n" + "add x23, x23, x12\n" + "fmla v25.8h, v0.8h, v11.8h\n" + "tbz %x[n_channels], #2, 73f\n" + "ld1 { v13.d }[0], [x23], #0x8\n" + "tbz %x[n_channels], #1, 72f\n" + "ld1 { v13.s }[2], [x23], #0x4\n" + "tbz %x[n_channels], #0, 75f\n" + "ld1 { v13.h }[6], [x23], #0x2\n" + "b 75f\n" + "72:" // Oddments: Load input (3, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 75f\n" + "ld1 { v13.h }[4], [x23], #0x2\n" + "b 75f\n" + "73:" // Oddments: Load input (3, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 74f\n" + "ld1 { v13.s }[0], [x23], #0x4\n" + "tbz %x[n_channels], #0, 75f\n" + "ld1 { v13.h }[2], [x23], #0x2\n" + "b 75f\n" + "74:" // Oddments: Load input (3, 3): Bit 2: Unset: Bit 1: Unset + "ld1 { v13.h }[0], [x23], #0x2\n" + "75:" // Oddments: Load input (3, 3): Bit 2: End + "ldr x25, [x13, #0xb0]\n" + "fmla v27.8h, v8.8h, v13.8h\n" + "fmla v28.8h, v7.8h, v13.8h\n" + "add x25, x25, x12\n" + "fmla v30.8h, v5.8h, v13.8h\n" + "fmla v31.8h, v4.8h, v13.8h\n" + "tbz %x[n_channels], #2, 77f\n" + "ld1 { v12.d }[0], [x25], #0x8\n" + "tbz %x[n_channels], #1, 76f\n" + "ld1 { v12.s }[2], [x25], #0x4\n" + "tbz %x[n_channels], #0, 79f\n" + "ld1 { v12.h }[6], [x25], #0x2\n" + "b 79f\n" + "76:" // Oddments: Load input (2, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 79f\n" + "ld1 { v12.h }[4], [x25], #0x2\n" + "b 79f\n" + "77:" // Oddments: Load input (2, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 78f\n" + "ld1 { v12.s }[0], [x25], #0x4\n" + "tbz %x[n_channels], #0, 79f\n" + "ld1 { v12.h }[2], [x25], #0x2\n" + "b 79f\n" + "78:" // Oddments: Load input (2, 0): Bit 2: Unset: Bit 1: Unset + "ld1 { v12.h }[0], [x25], #0x2\n" + "79:" // Oddments: Load input (2, 0): Bit 2: End + "ldr x24, [x13, #0xb8]\n" + "fmla v23.8h, v6.8h, v12.8h\n" + "fmla v26.8h, v3.8h, v12.8h\n" + "add x24, x24, x12\n" + "fmla v29.8h, v0.8h, v12.8h\n" + "tbz %x[n_channels], #2, 81f\n" + "ld1 { v11.d }[0], [x24], #0x8\n" + "tbz %x[n_channels], #1, 80f\n" + "ld1 { v11.s }[2], [x24], #0x4\n" + "tbz %x[n_channels], #0, 83f\n" + "ld1 { v11.h }[6], [x24], #0x2\n" + "b 83f\n" + "80:" // Oddments: Load input (2, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 83f\n" + "ld1 { v11.h }[4], [x24], #0x2\n" + "b 83f\n" + "81:" // Oddments: Load input (2, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 82f\n" + "ld1 { v11.s }[0], [x24], #0x4\n" + "tbz %x[n_channels], #0, 83f\n" + "ld1 { v11.h }[2], [x24], #0x2\n" + "b 83f\n" + "82:" // Oddments: Load input (2, 4): Bit 2: Unset: Bit 1: Unset + "ld1 { v11.h }[0], [x24], #0x2\n" + "83:" // Oddments: Load input (2, 4): Bit 2: End + "ldr x10, [x13, #0xc0]\n" + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" + "add x10, x10, x12\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "tbz %x[n_channels], #2, 85f\n" + "ld1 { v13.d }[0], [x10], #0x8\n" + "tbz %x[n_channels], #1, 84f\n" + "ld1 { v13.s }[2], [x10], #0x4\n" + "tbz %x[n_channels], #0, 87f\n" + "ld1 { v13.h }[6], [x10], #0x2\n" + "b 87f\n" + "84:" // Oddments: Load input (4, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 87f\n" + "ld1 { v13.h }[4], [x10], #0x2\n" + "b 87f\n" + "85:" // Oddments: Load input (4, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 86f\n" "ld1 { v13.s }[0], [x10], #0x4\n" - "tbz %x[n_channels], #0, 45f\n" + "tbz %x[n_channels], #0, 87f\n" "ld1 { v13.h }[2], [x10], #0x2\n" - "b 45f\n" - "44:" // Oddments: Load input (4, 2): Bit 1: Unset + "b 87f\n" + "86:" // Oddments: Load input (4, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v13.h }[0], [x10], #0x2\n" - "45:" // Oddments: Load input (4, 2): Bit 1: End - "fmla v25.8h, v8.8h, v13.8h\n" - "fmla v24.8h, v7.8h, v13.8h\n" - "fmla v23.8h, v6.8h, v13.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "fmax v28.8h, v28.8h, v18.8h\n" - "fmax v27.8h, v27.8h, v18.8h\n" - "fmax v26.8h, v26.8h, v18.8h\n" - "fmin v28.8h, v28.8h, v17.8h\n" - "fmin v27.8h, v27.8h, v17.8h\n" - "fmin v26.8h, v26.8h, v17.8h\n" - "fmax v25.8h, v25.8h, v18.8h\n" - "fmax v24.8h, v24.8h, v18.8h\n" + "87:" // Oddments: Load input (4, 2): Bit 2: End + "fmla v29.8h, v8.8h, v13.8h\n" + "fmla v30.8h, v7.8h, v13.8h\n" "fmax v23.8h, v23.8h, v18.8h\n" - "fmin v25.8h, v25.8h, v17.8h\n" - "fmin v24.8h, v24.8h, v17.8h\n" + "fmla v31.8h, v6.8h, v13.8h\n" + "fmax v24.8h, v24.8h, v18.8h\n" + "fmax v25.8h, v25.8h, v18.8h\n" + "fmax v26.8h, v26.8h, v18.8h\n" + "fmax v27.8h, v27.8h, v18.8h\n" + "fmax v28.8h, v28.8h, v18.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" "fmin v23.8h, v23.8h, v17.8h\n" - "tbz %x[n_channels], #1, 46f\n" - "ldr x22, [x17, #0x0]\n" - "ldr x21, [x17, #0x8]\n" - "add x22, x22, x12\n" - "ldr x20, [x17, #0x10]\n" - "ldr x19, [x17, #0x18]\n" - "add x21, x21, x12\n" - "st1 { v31.s }[0], [x22]\n" - "add x20, x20, x12\n" - "st1 { v30.s }[0], [x21]\n" - "ldr x22, [x17, #0x20]\n" - "add x19, x19, x12\n" - "st1 { v29.s }[0], [x20]\n" - "add x22, x22, x12\n" - "st1 { v28.s }[0], [x19]\n" - "ldr x21, [x17, #0x28]\n" - "add x21, x21, x12\n" - "st1 { v27.s }[0], [x22]\n" - "ldr x20, [x17, #0x30]\n" - "add x20, x20, x12\n" - "st1 { v26.s }[0], [x21]\n" - "ldr x19, [x17, #0x38]\n" - "add x19, x19, x12\n" - "st1 { v25.s }[0], [x20]\n" - "ldr x22, [x17, #0x40]\n" - "add x22, x22, x12\n" - "st1 { v24.s }[0], [x19]\n" - "add x12, x12, #0x4\n" + "fmin v24.8h, v24.8h, v17.8h\n" + "fmin v25.8h, v25.8h, v17.8h\n" + "fmin v26.8h, v26.8h, v17.8h\n" + "fmin v27.8h, v27.8h, v17.8h\n" + "fmin v28.8h, v28.8h, v17.8h\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "tbz %x[n_channels], #2, 89f\n" + "ldr x22, [x15, #0x0]\n" + "add x22, x22, x11\n" + "st1 { v23.d }[0], [x22]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "ldr x22, [x15, #0x20]\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "add x22, x22, x11\n" + "st1 { v24.d }[0], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "st1 { v25.d }[0], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "st1 { v26.d }[0], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v27.d }[0], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "add x11, x11, #0x8\n" + "st1 { v28.d }[0], [x21]\n" + "st1 { v29.d }[0], [x20]\n" + "st1 { v30.d }[0], [x19]\n" + "st1 { v31.d }[0], [x22]\n" + "tbz %x[n_channels], #1, 88f\n" + "ldr x22, [x15, #0x0]\n" + "add x22, x22, x11\n" + "st1 { v23.s }[2], [x22]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "add x21, x21, x11\n" + "ldr x19, [x15, #0x18]\n" + "ldr x22, [x15, #0x20]\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "add x22, x22, x11\n" + "st1 { v24.s }[2], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x21, x21, x11\n" + "st1 { v25.s }[2], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v26.s }[2], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v27.s }[2], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "add x11, x11, #0x4\n" + "st1 { v28.s }[2], [x21]\n" + "st1 { v29.s }[2], [x20]\n" + "st1 { v30.s }[2], [x19]\n" + "st1 { v31.s }[2], [x22]\n" + "tbz %x[n_channels], #0, 91f\n" + "ldr x22, [x15, #0x0]\n" + "add x22, x22, x11\n" + "st1 { v23.h }[6], [x22]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "add x21, x21, x11\n" + "ldr x19, [x15, #0x18]\n" + "ldr x22, [x15, #0x20]\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "add x22, x22, x11\n" + "st1 { v24.h }[6], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x21, x21, x11\n" + "st1 { v25.h }[6], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v26.h }[6], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v27.h }[6], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v28.h }[6], [x21]\n" + "st1 { v29.h }[6], [x20]\n" + "st1 { v30.h }[6], [x19]\n" + "st1 { v31.h }[6], [x22]\n" + "b 91f\n" + "88:" // Oddments: Store: Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 91f\n" + "ldr x22, [x15, #0x0]\n" + "add x22, x22, x11\n" + "st1 { v23.h }[4], [x22]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "ldr x19, [x15, #0x18]\n" + "ldr x22, [x15, #0x20]\n" + "add x19, x19, x11\n" + "add x22, x22, x11\n" + "st1 { v24.h }[4], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x21, x21, x11\n" + "st1 { v25.h }[4], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v26.h }[4], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v27.h }[4], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v28.h }[4], [x21]\n" + "st1 { v29.h }[4], [x20]\n" + "st1 { v30.h }[4], [x19]\n" + "st1 { v31.h }[4], [x22]\n" + "b 91f\n" + "89:" // Oddments: Store: Bit 2: Unset + "tbz %x[n_channels], #1, 90f\n" + "ldr x22, [x15, #0x0]\n" + "add x22, x22, x11\n" "st1 { v23.s }[0], [x22]\n" - "tbz %x[n_channels], #0, 47f\n" - "ldr x22, [x17, #0x0]\n" - "ldr x21, [x17, #0x8]\n" - "add x22, x22, x12\n" - "ldr x20, [x17, #0x10]\n" - "ldr x19, [x17, #0x18]\n" - "add x21, x21, x12\n" - "st1 { v31.h }[2], [x22]\n" - "add x20, x20, x12\n" - "st1 { v30.h }[2], [x21]\n" - "ldr x22, [x17, #0x20]\n" - "add x19, x19, x12\n" - "st1 { v29.h }[2], [x20]\n" - "add x22, x22, x12\n" - "st1 { v28.h }[2], [x19]\n" - "ldr x21, [x17, #0x28]\n" - "add x21, x21, x12\n" - "st1 { v27.h }[2], [x22]\n" - "ldr x20, [x17, #0x30]\n" - "add x20, x20, x12\n" - "st1 { v26.h }[2], [x21]\n" - "ldr x19, [x17, #0x38]\n" - "add x19, x19, x12\n" - "st1 { v25.h }[2], [x20]\n" - "ldr x22, [x17, #0x40]\n" - "add x22, x22, x12\n" - "st1 { v24.h }[2], [x19]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "ldr x19, [x15, #0x18]\n" + "ldr x22, [x15, #0x20]\n" + "add x19, x19, x11\n" + "add x22, x22, x11\n" + "st1 { v24.s }[0], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x21, x21, x11\n" + "st1 { v25.s }[0], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v26.s }[0], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v27.s }[0], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "add x11, x11, #0x4\n" + "st1 { v28.s }[0], [x21]\n" + "st1 { v29.s }[0], [x20]\n" + "st1 { v30.s }[0], [x19]\n" + "st1 { v31.s }[0], [x22]\n" + "tbz %x[n_channels], #0, 91f\n" + "ldr x22, [x15, #0x0]\n" + "add x22, x22, x11\n" "st1 { v23.h }[2], [x22]\n" - "b 47f\n" - "46:" // Oddments: Store: Bit 1: Unset - "ldr x22, [x17, #0x0]\n" - "add x22, x22, x12\n" - "ldr x21, [x17, #0x8]\n" - "ldr x20, [x17, #0x10]\n" - "add x21, x21, x12\n" - "st1 { v31.h }[0], [x22]\n" - "ldr x19, [x17, #0x18]\n" - "add x20, x20, x12\n" - "st1 { v30.h }[0], [x21]\n" - "add x19, x19, x12\n" - "st1 { v29.h }[0], [x20]\n" - "ldr x22, [x17, #0x20]\n" - "add x22, x22, x12\n" - "st1 { v28.h }[0], [x19]\n" - "ldr x21, [x17, #0x28]\n" - "add x21, x21, x12\n" - "st1 { v27.h }[0], [x22]\n" - "ldr x20, [x17, #0x30]\n" - "add x20, x20, x12\n" - "st1 { v26.h }[0], [x21]\n" - "ldr x19, [x17, #0x38]\n" - "add x19, x19, x12\n" - "st1 { v25.h }[0], [x20]\n" - "ldr x22, [x17, #0x40]\n" - "add x22, x22, x12\n" - "st1 { v24.h }[0], [x19]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "add x21, x21, x11\n" + "ldr x19, [x15, #0x18]\n" + "ldr x22, [x15, #0x20]\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "add x22, x22, x11\n" + "st1 { v24.h }[2], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x21, x21, x11\n" + "st1 { v25.h }[2], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v26.h }[2], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v27.h }[2], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v28.h }[2], [x21]\n" + "st1 { v29.h }[2], [x20]\n" + "st1 { v30.h }[2], [x19]\n" + "st1 { v31.h }[2], [x22]\n" + "b 91f\n" + "90:" // Oddments: Store: Bit 2: Unset: Bit 1: Unset + "ldr x22, [x15, #0x0]\n" + "add x22, x22, x11\n" "st1 { v23.h }[0], [x22]\n" - "47:" // Oddments: Store: Bit 1: End + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "ldr x22, [x15, #0x20]\n" + "add x19, x19, x11\n" + "add x22, x22, x11\n" + "st1 { v24.h }[0], [x21]\n" + "st1 { v25.h }[0], [x20]\n" + "ldr x21, [x15, #0x28]\n" + "ldr x20, [x15, #0x30]\n" + "add x21, x21, x11\n" + "st1 { v26.h }[0], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v27.h }[0], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v28.h }[0], [x21]\n" + "st1 { v29.h }[0], [x20]\n" + "st1 { v30.h }[0], [x19]\n" + "st1 { v31.h }[0], [x22]\n" + "91:" // Oddments: Store: Bit 2: End - "48:" // End + "92:" // End : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v16", "v17", "v18", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" - ); + : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v16", "v17", "v18", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" ); } } // namespace depthwise diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp index bf18469199..c403576cf1 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp @@ -87,1143 +87,1647 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( ); __asm__ __volatile__( - "mov x4, #0x0\n" "mov x26, #0x0\n" + "mov x25, #0x0\n" "1:" // Tile loop - "str x4, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "mov x25, #0x4\n" - "str x26, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "str x26, [%x[params_struct], %[offsetof_args_tile_i]]\n" "mov x24, #0x4\n" - "ldr x5, [%x[params_struct], %[offsetof_args_params]]\n" - "add x23, %x[params_struct], %[offsetof_args_min]\n" - "ldr x22, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" - "add x21, %x[params_struct], %[offsetof_args_max]\n" - "ldr x6, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" - "mov x7, #0x0\n" + "mov x22, #0x4\n" + "str x25, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x23, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" + "ldr x21, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" + "mul x20, x26, x23\n" // offset = tile_i * ld_input_row + "ldr x5, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" + "ldr x6, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" + "mul x19, x26, x21\n" // offset = tile_i * ld_output_row + "mov x7, #0x10\n" // cntb _, ALL, #1 + "madd x20, x25, x5, x20\n" // offset += tile_j * ld_input_col "ldr x8, [%x[params_struct], %[offsetof_args_inptr]]\n" - "mul x19, x4, x22\n" // offset = tile_i * ld_input_row - "ldr x20, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" - "madd x19, x26, x6, x19\n" // offset += tile_j * ld_input_col - "ldr x17, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" - "mul x19, x19, x25\n" // offset *= kernel_stride * output_size - "ldr x16, [%x[params_struct], %[offsetof_args_outptr]]\n" - "add x8, x8, x19, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) - "ld1r { v15.8h }, [x23]\n" - "add x15, x8, x22, LSL #1\n" - "ld1r { v14.8h }, [x21]\n" - "add x14, x15, x22, LSL #1\n" + "lsl x5, x5, #0x1\n" + "ldr x17, [%x[params_struct], %[offsetof_args_outptr]]\n" + "madd x19, x25, x6, x19\n" // offset += tile_j * ld_output_col "lsl x6, x6, #0x1\n" - "add x13, x14, x22, LSL #1\n" - "add x12, x13, x22, LSL #1\n" - "add x11, x12, x22, LSL #1\n" - "add x10, x6, x6\n" - "add x9, x10, x6\n" - "add x28, x9, x6\n" - "add x27, x28, x6\n" - "mul x19, x4, x20\n" // offset = tile_i * ld_output_row - "madd x19, x26, x17, x19\n" // offset += tile_j * ld_output_col - "mul x19, x19, x24\n" // offset *= output_tile_size - "add x16, x16, x19, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) - "add x26, x16, x20, LSL #1\n" - "add x25, x26, x20, LSL #1\n" - "add x24, x25, x20, LSL #1\n" - "lsl x17, x17, #0x1\n" - "add x23, x17, x17\n" - "add x22, x23, x17\n" - "mov x21, #0x10\n" // cntb _, ALL, #1 - "sub x20, XZR, x21\n" - "lsr x19, %x[n_channels], #0x3\n" - "cbz x19, 4f\n" - "ldr q13, [x5, #0x0]\n" - "ldr q0, [x5, #0x10]\n" - "cmp x21, x19, LSL #4\n" - "ldr q1, [x5, #0x20]\n" - "ldr q2, [x5, #0x30]\n" - "ldr q3, [x5, #0x40]\n" - "ldr q4, [x5, #0x50]\n" - "ldr q5, [x5, #0x60]\n" - "ldr q6, [x5, #0x70]\n" - "ldr q7, [x5, #0x80]\n" - "ldr q8, [x5, #0x90]\n" - "add x5, x5, #0xa0\n" - "ldr q9, [x14, x10]\n" + "add x16, x5, x5\n" + "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" + "mul x20, x20, x24\n" // offset *= kernel_stride * output_size + "add x8, x8, x20, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) + "add x14, x8, x23, LSL #1\n" + "mul x19, x19, x22\n" // offset *= output_tile_size + "add x13, x14, x23, LSL #1\n" + "add x17, x17, x19, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) + "lsr x12, %x[n_channels], #0x3\n" + "add x11, x13, x23, LSL #1\n" + "add x10, x16, x5\n" + "add x9, x17, x21, LSL #1\n" + "add x28, x11, x23, LSL #1\n" + "add x27, x10, x5\n" + "add x26, x9, x21, LSL #1\n" + "add x22, x6, x6\n" + "add x20, %x[params_struct], %[offsetof_args_min]\n" + "add x19, %x[params_struct], %[offsetof_args_max]\n" + "ld1r { v15.8h }, [x20]\n" + "ld1r { v14.8h }, [x19]\n" + "add x25, x28, x23, LSL #1\n" + "add x24, x27, x5\n" + "add x23, x26, x21, LSL #1\n" + "add x21, x22, x6\n" + "mov x20, #0x0\n" + "sub x19, XZR, x7\n" + "cbz x12, 4f\n" + "ldr q13, [x15, #0x0]\n" + "cmp x7, x12, LSL #4\n" + "ldr q0, [x15, #0x10]\n" + "ldr q1, [x15, #0x20]\n" + "ldr q2, [x15, #0x30]\n" + "ldr q3, [x15, #0x40]\n" + "ldr q4, [x15, #0x50]\n" + "ldr q5, [x15, #0x60]\n" + "ldr q6, [x15, #0x70]\n" + "ldr q7, [x15, #0x80]\n" + "ldr q8, [x15, #0x90]\n" + "ldr q9, [x13, x16]\n" + "add x15, x15, #0xa0\n" "ld1 { v10.8h }, [x8]\n" - "ldr q11, [x8, x27]\n" - "ldr q12, [x14, x9]\n" + "ldr q11, [x8, x24]\n" + "ldr q12, [x13, x10]\n" "bge 3f\n" "2:" // Tile loop: Channel loop - "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "add x20, x20, #0x10\n" - "mov v30.16b, v13.16b\n fmla v30.8h, v7.8h, v9.8h\n" + "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" + "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v9.8h\n" "add x7, x7, #0x10\n" - "mov v29.16b, v13.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "add x21, x21, #0x10\n" - "mov v27.16b, v13.16b\n fmla v27.8h, v5.8h, v9.8h\n" - "cmp x21, x19, LSL #4\n" - "mov v26.16b, v13.16b\n fmla v26.8h, v4.8h, v9.8h\n" - "mov v25.16b, v13.16b\n fmla v25.8h, v3.8h, v9.8h\n" - "mov v23.16b, v13.16b\n fmla v23.8h, v2.8h, v9.8h\n" - "mov v22.16b, v13.16b\n fmla v22.8h, v1.8h, v9.8h\n" - "mov v21.16b, v13.16b\n fmla v21.8h, v0.8h, v9.8h\n" - "ldr q9, [x13, x10]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ld1 { v10.8h }, [x11]\n" - "mov v28.16b, v13.16b\n fmla v28.8h, v2.8h, v11.8h\n" - "ldr q11, [x11, x27]\n" - "fmla v30.8h, v8.8h, v12.8h\n" - "fmla v29.8h, v7.8h, v12.8h\n" - "fmla v26.8h, v5.8h, v12.8h\n" - "fmla v28.8h, v6.8h, v12.8h\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "mov v24.16b, v13.16b\n fmla v24.8h, v3.8h, v12.8h\n" - "fmla v22.8h, v2.8h, v12.8h\n" - "fmla v21.8h, v1.8h, v12.8h\n" - "mov v20.16b, v13.16b\n fmla v20.8h, v0.8h, v12.8h\n" - "ldr q12, [x8, x6]\n" - "mov v19.16b, v13.16b\n fmla v19.8h, v6.8h, v10.8h\n" - "ldr q10, [x13, x9]\n" - "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v11.8h\n" - "ldr q11, [x8, x28]\n" - "fmla v27.8h, v8.8h, v9.8h\n" - "fmla v26.8h, v7.8h, v9.8h\n" - "fmla v25.8h, v6.8h, v9.8h\n" - "fmla v23.8h, v5.8h, v9.8h\n" - "fmla v22.8h, v4.8h, v9.8h\n" - "fmla v21.8h, v3.8h, v9.8h\n" - "fmla v19.8h, v2.8h, v9.8h\n" - "mov v18.16b, v13.16b\n fmla v18.8h, v1.8h, v9.8h\n" - "mov v17.16b, v13.16b\n fmla v17.8h, v0.8h, v9.8h\n" - "ld1 { v9.8h }, [x15]\n" - "fmla v31.8h, v1.8h, v12.8h\n" - "ldr q13, [x5, #0x0]\n" - "fmla v30.8h, v0.8h, v12.8h\n" - "ldr q12, [x15, x27]\n" - "fmla v29.8h, v2.8h, v11.8h\n" - "fmla v28.8h, v1.8h, v11.8h\n" - "ld1 { v11.8h }, [x12]\n" - "fmla v26.8h, v8.8h, v10.8h\n" - "fmla v25.8h, v7.8h, v10.8h\n" - "fmla v24.8h, v6.8h, v10.8h\n" - "fmla v22.8h, v5.8h, v10.8h\n" - "fmla v21.8h, v4.8h, v10.8h\n" - "fmla v20.8h, v3.8h, v10.8h\n" - "fmla v18.8h, v2.8h, v10.8h\n" - "fmla v17.8h, v1.8h, v10.8h\n" + "cmp x7, x12, LSL #4\n" + "mov v22.16b, v13.16b\n fmla v22.8h, v3.8h, v9.8h\n" + "mov v25.16b, v13.16b\n fmla v25.8h, v1.8h, v9.8h\n" + "add x19, x19, #0x10\n" + "add x20, x20, #0x10\n" + "mov v26.16b, v13.16b\n fmla v26.8h, v0.8h, v9.8h\n" + "fmla v21.8h, v5.8h, v12.8h\n" + "mov v17.16b, v13.16b\n fmla v17.8h, v7.8h, v9.8h\n" + "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" + "mov v20.16b, v13.16b\n fmla v20.8h, v5.8h, v9.8h\n" + "mov v24.16b, v13.16b\n fmla v24.8h, v2.8h, v9.8h\n" + "ldr q9, [x11, x16]\n" "fmla v16.8h, v0.8h, v10.8h\n" - "ldr q10, [x15, x10]\n" - "fmla v31.8h, v3.8h, v9.8h\n" - "fmla v27.8h, v0.8h, v9.8h\n" - "fmla v28.8h, v5.8h, v12.8h\n" - "fmla v24.8h, v2.8h, v12.8h\n" - "ldr q12, [x15, x9]\n" - "fmla v23.8h, v6.8h, v11.8h\n" - "fmla v19.8h, v3.8h, v11.8h\n" - "ldr q11, [x12, x27]\n" - "fmla v31.8h, v5.8h, v10.8h\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v3.8h, v10.8h\n" - "fmla v27.8h, v2.8h, v10.8h\n" - "fmla v26.8h, v1.8h, v10.8h\n" - "fmla v25.8h, v0.8h, v10.8h\n" - "ldr q10, [x14, x6]\n" - "fmla v20.8h, v8.8h, v11.8h\n" - "fmla v16.8h, v5.8h, v11.8h\n" - "ldr q11, [x11, x6]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "fmla v26.8h, v2.8h, v12.8h\n" - "fmla v25.8h, v1.8h, v12.8h\n" - "fmla v24.8h, v0.8h, v12.8h\n" - "ldr q12, [x14, x28]\n" - "fmla v19.8h, v7.8h, v11.8h\n" - "fmla v18.8h, v6.8h, v11.8h\n" - "ldr q11, [x11, x28]\n" - "fmla v31.8h, v7.8h, v10.8h\n" - "fmla v30.8h, v6.8h, v10.8h\n" - "fmla v27.8h, v4.8h, v10.8h\n" - "fmla v26.8h, v3.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" + "mov v19.16b, v13.16b\n fmla v19.8h, v2.8h, v11.8h\n" + "ld1 { v10.8h }, [x25]\n" + "ldr q11, [x25, x24]\n" + "fmla v22.8h, v4.8h, v12.8h\n" + "fmla v25.8h, v2.8h, v12.8h\n" + "fmla v26.8h, v1.8h, v12.8h\n" + "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" + "ldr q10, [x11, x10]\n" + "fmla v21.8h, v7.8h, v9.8h\n" + "fmla v17.8h, v8.8h, v12.8h\n" + "fmla v18.8h, v7.8h, v12.8h\n" + "fmla v19.8h, v6.8h, v12.8h\n" + "mov v23.16b, v13.16b\n fmla v23.8h, v3.8h, v12.8h\n" + "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" + "ldr q12, [x8, x5]\n" + "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" + "fmla v22.8h, v6.8h, v9.8h\n" + "ldr q11, [x8, x27]\n" + "fmla v25.8h, v4.8h, v9.8h\n" + "fmla v26.8h, v3.8h, v9.8h\n" + "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" + "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" + "ldr q13, [x15, #0x0]\n" + "fmla v20.8h, v8.8h, v9.8h\n" + "fmla v24.8h, v5.8h, v9.8h\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v21.8h, v8.8h, v10.8h\n" + "ld1 { v9.8h }, [x14]\n" + "fmla v16.8h, v1.8h, v12.8h\n" + "fmla v17.8h, v0.8h, v12.8h\n" + "ldr q12, [x14, x24]\n" + "fmla v18.8h, v2.8h, v11.8h\n" + "fmla v19.8h, v1.8h, v11.8h\n" + "ld1 { v11.8h }, [x28]\n" + "fmla v22.8h, v7.8h, v10.8h\n" + "fmla v23.8h, v6.8h, v10.8h\n" + "fmla v25.8h, v5.8h, v10.8h\n" + "fmla v26.8h, v4.8h, v10.8h\n" + "fmla v27.8h, v3.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v10.8h\n" + "fmla v30.8h, v1.8h, v10.8h\n" + "fmla v31.8h, v0.8h, v10.8h\n" + "ldr q10, [x14, x16]\n" + "fmla v20.8h, v0.8h, v9.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v21.8h, v1.8h, v10.8h\n" + "ldr q11, [x28, x24]\n" + "fmla v16.8h, v3.8h, v9.8h\n" + "fmla v19.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v2.8h, v12.8h\n" + "fmla v17.8h, v4.8h, v10.8h\n" + "ldr q12, [x14, x10]\n" + "fmla v18.8h, v3.8h, v10.8h\n" "fmla v22.8h, v0.8h, v10.8h\n" - "ldr q10, [x8, x10]\n" - "fmla v17.8h, v8.8h, v11.8h\n" - "fmla v16.8h, v7.8h, v11.8h\n" - "ldr q11, [x13, x6]\n" - "fmla v29.8h, v8.8h, v12.8h\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "fmla v25.8h, v5.8h, v12.8h\n" - "fmla v24.8h, v4.8h, v12.8h\n" + "fmla v27.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "ldr q11, [x25, x5]\n" + "fmla v20.8h, v2.8h, v10.8h\n" "fmla v21.8h, v2.8h, v12.8h\n" - "fmla v20.8h, v1.8h, v12.8h\n" - "ldr q12, [x8, x9]\n" + "fmla v16.8h, v5.8h, v10.8h\n" + "fmla v17.8h, v5.8h, v12.8h\n" + "ldr q10, [x13, x5]\n" + "fmla v18.8h, v4.8h, v12.8h\n" + "fmla v19.8h, v3.8h, v12.8h\n" + "fmla v22.8h, v1.8h, v12.8h\n" + "fmla v23.8h, v0.8h, v12.8h\n" + "ldr q12, [x13, x27]\n" + "fmla v28.8h, v7.8h, v11.8h\n" + "fmla v29.8h, v6.8h, v11.8h\n" + "ldr q11, [x25, x27]\n" + "fmla v20.8h, v4.8h, v10.8h\n" + "fmla v21.8h, v3.8h, v10.8h\n" + "fmla v24.8h, v1.8h, v10.8h\n" + "fmla v25.8h, v0.8h, v10.8h\n" + "fmla v16.8h, v7.8h, v10.8h\n" + "fmla v17.8h, v6.8h, v10.8h\n" + "ldr q10, [x8, x16]\n" + "fmla v30.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v7.8h, v11.8h\n" + "ldr q11, [x11, x5]\n" + "fmla v18.8h, v8.8h, v12.8h\n" + "fmla v19.8h, v7.8h, v12.8h\n" + "fmla v22.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v4.8h, v12.8h\n" + "fmla v26.8h, v2.8h, v12.8h\n" + "fmla v27.8h, v1.8h, v12.8h\n" + "ldr q12, [x8, x10]\n" "add x8, x8, #0x10\n" - "fmla v31.8h, v2.8h, v10.8h\n" - "fmla v30.8h, v1.8h, v10.8h\n" - "fmla v29.8h, v0.8h, v10.8h\n" - "ld1 { v10.8h }, [x14]\n" - "fmla v27.8h, v7.8h, v11.8h\n" - "fmla v26.8h, v6.8h, v11.8h\n" - "fmla v23.8h, v4.8h, v11.8h\n" - "fmla v22.8h, v3.8h, v11.8h\n" - "fmla v19.8h, v1.8h, v11.8h\n" - "fmla v18.8h, v0.8h, v11.8h\n" - "ldr q11, [x13, x28]\n" - "fmla v30.8h, v2.8h, v12.8h\n" - "fmla v29.8h, v1.8h, v12.8h\n" - "fmla v28.8h, v0.8h, v12.8h\n" - "ldr q12, [x14, x27]\n" - "add x14, x14, #0x10\n" - "fmla v31.8h, v6.8h, v10.8h\n" - "ldr q9, [x14, x10]\n" - "fmla v27.8h, v3.8h, v10.8h\n" - "fmla v23.8h, v0.8h, v10.8h\n" + "fmla v20.8h, v7.8h, v11.8h\n" + "fmla v21.8h, v6.8h, v11.8h\n" + "fmla v24.8h, v4.8h, v11.8h\n" + "fmla v25.8h, v3.8h, v11.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v0.8h, v11.8h\n" + "ldr q11, [x11, x27]\n" + "fmla v16.8h, v2.8h, v10.8h\n" + "fmla v17.8h, v1.8h, v10.8h\n" + "fmla v18.8h, v0.8h, v10.8h\n" "ld1 { v10.8h }, [x13]\n" - "fmla v25.8h, v8.8h, v11.8h\n" - "fmla v24.8h, v7.8h, v11.8h\n" - "fmla v21.8h, v5.8h, v11.8h\n" - "fmla v20.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v2.8h, v11.8h\n" - "fmla v16.8h, v1.8h, v11.8h\n" - "ldr q11, [x12, x10]\n" - "fmla v28.8h, v8.8h, v12.8h\n" - "fmla v24.8h, v5.8h, v12.8h\n" - "fmla v20.8h, v2.8h, v12.8h\n" - "ldr q12, [x13, x27]\n" + "fmla v30.8h, v2.8h, v11.8h\n" + "fmla v19.8h, v0.8h, v12.8h\n" + "fmla v20.8h, v3.8h, v10.8h\n" + "fmla v24.8h, v0.8h, v10.8h\n" + "fmla v22.8h, v8.8h, v11.8h\n" + "fmla v23.8h, v7.8h, v11.8h\n" + "fmla v26.8h, v5.8h, v11.8h\n" + "fmla v27.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v1.8h, v11.8h\n" + "ldr q11, [x28, x16]\n" + "fmla v17.8h, v2.8h, v12.8h\n" + "fmla v18.8h, v1.8h, v12.8h\n" + "ldr q12, [x13, x24]\n" "add x13, x13, #0x10\n" - "fmla v27.8h, v6.8h, v10.8h\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "fmla v19.8h, v0.8h, v10.8h\n" - "ldr q10, [x11, x10]\n" - "fmla v22.8h, v7.8h, v11.8h\n" - "fmla v21.8h, v6.8h, v11.8h\n" - "fmla v23.8h, v8.8h, v11.8h\n" - "fmla v19.8h, v5.8h, v11.8h\n" - "fmla v18.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v3.8h, v11.8h\n" - "ldr q11, [x12, x9]\n" - "fmla v24.8h, v8.8h, v12.8h\n" - "fmla v20.8h, v5.8h, v12.8h\n" - "fmla v16.8h, v2.8h, v12.8h\n" - "ldr q12, [x11, x9]\n" + "fmla v16.8h, v6.8h, v10.8h\n" + "ld1 { v10.8h }, [x11]\n" + "fmla v29.8h, v4.8h, v11.8h\n" + "ldr q9, [x13, x16]\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v19.8h, v8.8h, v12.8h\n" + "fmla v23.8h, v5.8h, v12.8h\n" + "fmla v27.8h, v2.8h, v12.8h\n" + "ldr q12, [x11, x24]\n" "add x11, x11, #0x10\n" - "fmla v19.8h, v8.8h, v10.8h\n" - "fmla v18.8h, v7.8h, v10.8h\n" - "fmla v17.8h, v6.8h, v10.8h\n" - "ldr q10, [x15, x6]\n" - "fmla v22.8h, v8.8h, v11.8h\n" - "fmla v21.8h, v7.8h, v11.8h\n" - "fmla v20.8h, v6.8h, v11.8h\n" - "fmla v18.8h, v5.8h, v11.8h\n" - "fmla v17.8h, v4.8h, v11.8h\n" - "fmla v16.8h, v3.8h, v11.8h\n" - "ldr q11, [x15, x28]\n" - "add x15, x15, #0x10\n" - "fmla v18.8h, v8.8h, v12.8h\n" - "fmla v31.8h, v4.8h, v10.8h\n" - "fmla v17.8h, v7.8h, v12.8h\n" - "fmla v16.8h, v6.8h, v12.8h\n" - "ldr q12, [x12, x6]\n" - "fmla v30.8h, v3.8h, v10.8h\n" - "fmla v27.8h, v1.8h, v10.8h\n" - "fmla v26.8h, v0.8h, v10.8h\n" - "ldr q10, [x12, x28]\n" - "add x12, x12, #0x10\n" + "fmla v20.8h, v6.8h, v10.8h\n" + "fmla v24.8h, v3.8h, v10.8h\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "ldr q10, [x25, x16]\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "fmla v30.8h, v6.8h, v10.8h\n" + "fmla v24.8h, v8.8h, v11.8h\n" + "fmla v25.8h, v7.8h, v11.8h\n" + "fmla v26.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" + "ldr q11, [x28, x10]\n" + "fmla v27.8h, v5.8h, v12.8h\n" "fmla v29.8h, v5.8h, v11.8h\n" - "ldr q0, [x5, #0x10]\n" - "fmla v28.8h, v4.8h, v11.8h\n" - "fmla v25.8h, v2.8h, v11.8h\n" - "ldr q2, [x5, #0x30]\n" - "fmla v24.8h, v1.8h, v11.8h\n" - "ldr q11, [x8, x27]\n" - "fmla v23.8h, v7.8h, v12.8h\n" - "ldr q1, [x5, #0x20]\n" - "fmla v22.8h, v6.8h, v12.8h\n" - "ldr q6, [x5, #0x70]\n" - "fmla v19.8h, v4.8h, v12.8h\n" - "fmla v18.8h, v3.8h, v12.8h\n" - "ldr q12, [x14, x9]\n" - "fmla v21.8h, v8.8h, v10.8h\n" - "ldr q3, [x5, #0x40]\n" - "fmla v20.8h, v7.8h, v10.8h\n" - "ldr q7, [x5, #0x80]\n" - "fmla v17.8h, v5.8h, v10.8h\n" - "ldr q5, [x5, #0x60]\n" + "fmla v30.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v11.8h\n" + "fmla v23.8h, v8.8h, v12.8h\n" + "ldr q12, [x25, x10]\n" + "fmla v28.8h, v8.8h, v10.8h\n" + "ldr q10, [x14, x5]\n" + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v26.8h, v7.8h, v11.8h\n" + "add x25, x25, #0x10\n" + "fmla v27.8h, v6.8h, v11.8h\n" + "fmla v29.8h, v8.8h, v12.8h\n" + "ldr q11, [x14, x27]\n" + "add x14, x14, #0x10\n" + "fmla v30.8h, v7.8h, v12.8h\n" + "fmla v31.8h, v6.8h, v12.8h\n" + "ldr q12, [x28, x5]\n" "fmla v16.8h, v4.8h, v10.8h\n" + "fmla v17.8h, v3.8h, v10.8h\n" + "fmax v16.8h, v16.8h, v15.8h\n" + "fmla v20.8h, v1.8h, v10.8h\n" + "fmla v21.8h, v0.8h, v10.8h\n" + "ldr q10, [x28, x27]\n" + "fmax v17.8h, v17.8h, v15.8h\n" + "fmla v18.8h, v5.8h, v11.8h\n" + "fmla v19.8h, v4.8h, v11.8h\n" + "fmax v18.8h, v18.8h, v15.8h\n" + "add x28, x28, #0x10\n" + "fmla v22.8h, v2.8h, v11.8h\n" + "fmla v23.8h, v1.8h, v11.8h\n" + "fmax v19.8h, v19.8h, v15.8h\n" + "ldr q11, [x8, x24]\n" + "fmla v24.8h, v7.8h, v12.8h\n" + "fmla v25.8h, v6.8h, v12.8h\n" + "fmax v20.8h, v20.8h, v15.8h\n" + "ldr q0, [x15, #0x10]\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "fmax v21.8h, v21.8h, v15.8h\n" + "ldr q12, [x13, x10]\n" + "fmla v26.8h, v8.8h, v10.8h\n" + "fmla v27.8h, v7.8h, v10.8h\n" + "fmax v22.8h, v22.8h, v15.8h\n" + "ldr q1, [x15, #0x20]\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "fmax v23.8h, v23.8h, v15.8h\n" "ld1 { v10.8h }, [x8]\n" - "fmax v31.8h, v31.8h, v15.8h\n" - "ldr q4, [x5, #0x50]\n" - "fmax v30.8h, v30.8h, v15.8h\n" - "ldr q8, [x5, #0x90]\n" - "add x5, x5, #0xa0\n" - "fmin v31.8h, v31.8h, v14.8h\n" - "st1 { v31.8h }, [x16]\n" - "fmin v30.8h, v30.8h, v14.8h\n" - "fmax v29.8h, v29.8h, v15.8h\n" - "str q30, [x16, x17]\n" - "fmin v29.8h, v29.8h, v14.8h\n" - "fmax v28.8h, v28.8h, v15.8h\n" - "str q29, [x16, x23]\n" - "fmin v28.8h, v28.8h, v14.8h\n" - "fmax v27.8h, v27.8h, v15.8h\n" - "str q28, [x16, x22]\n" - "fmin v27.8h, v27.8h, v14.8h\n" - "add x16, x16, #0x10\n" - "fmax v26.8h, v26.8h, v15.8h\n" - "st1 { v27.8h }, [x26]\n" - "fmax v25.8h, v25.8h, v15.8h\n" "fmax v24.8h, v24.8h, v15.8h\n" - "fmin v26.8h, v26.8h, v14.8h\n" - "str q26, [x26, x17]\n" - "fmin v25.8h, v25.8h, v14.8h\n" + "fmax v25.8h, v25.8h, v15.8h\n" + "ldr q2, [x15, #0x30]\n" + "ldr q3, [x15, #0x40]\n" + "fmax v26.8h, v26.8h, v15.8h\n" + "fmax v27.8h, v27.8h, v15.8h\n" + "ldr q4, [x15, #0x50]\n" + "ldr q5, [x15, #0x60]\n" + "fmax v28.8h, v28.8h, v15.8h\n" + "fmax v29.8h, v29.8h, v15.8h\n" + "ldr q6, [x15, #0x70]\n" + "ldr q7, [x15, #0x80]\n" + "fmax v30.8h, v30.8h, v15.8h\n" + "fmax v31.8h, v31.8h, v15.8h\n" + "ldr q8, [x15, #0x90]\n" + "add x15, x15, #0xa0\n" + "fmin v16.8h, v16.8h, v14.8h\n" + "fmin v17.8h, v17.8h, v14.8h\n" + "st1 { v16.8h }, [x17]\n" + "fmin v18.8h, v18.8h, v14.8h\n" + "fmin v19.8h, v19.8h, v14.8h\n" + "str q17, [x17, x6]\n" + "fmin v20.8h, v20.8h, v14.8h\n" + "fmin v21.8h, v21.8h, v14.8h\n" + "str q18, [x17, x22]\n" + "fmin v22.8h, v22.8h, v14.8h\n" + "fmin v23.8h, v23.8h, v14.8h\n" + "str q19, [x17, x21]\n" + "add x17, x17, #0x10\n" "fmin v24.8h, v24.8h, v14.8h\n" - "str q25, [x26, x23]\n" - "fmax v23.8h, v23.8h, v15.8h\n" - "fmax v22.8h, v22.8h, v15.8h\n" - "str q24, [x26, x22]\n" + "fmin v25.8h, v25.8h, v14.8h\n" + "st1 { v20.8h }, [x9]\n" + "fmin v26.8h, v26.8h, v14.8h\n" + "fmin v27.8h, v27.8h, v14.8h\n" + "str q21, [x9, x6]\n" + "fmin v28.8h, v28.8h, v14.8h\n" + "fmin v29.8h, v29.8h, v14.8h\n" + "str q22, [x9, x22]\n" + "fmin v30.8h, v30.8h, v14.8h\n" + "fmin v31.8h, v31.8h, v14.8h\n" + "str q23, [x9, x21]\n" + "add x9, x9, #0x10\n" + "st1 { v24.8h }, [x26]\n" + "str q25, [x26, x6]\n" + "str q26, [x26, x22]\n" + "str q27, [x26, x21]\n" "add x26, x26, #0x10\n" - "fmax v21.8h, v21.8h, v15.8h\n" - "fmax v20.8h, v20.8h, v15.8h\n" - "fmin v23.8h, v23.8h, v14.8h\n" - "st1 { v23.8h }, [x25]\n" - "fmin v22.8h, v22.8h, v14.8h\n" - "fmin v21.8h, v21.8h, v14.8h\n" - "str q22, [x25, x17]\n" - "fmin v20.8h, v20.8h, v14.8h\n" - "fmax v19.8h, v19.8h, v15.8h\n" - "str q21, [x25, x23]\n" - "fmax v18.8h, v18.8h, v15.8h\n" - "str q20, [x25, x22]\n" - "fmin v19.8h, v19.8h, v14.8h\n" - "add x25, x25, #0x10\n" - "fmin v18.8h, v18.8h, v14.8h\n" - "st1 { v19.8h }, [x24]\n" - "fmax v17.8h, v17.8h, v15.8h\n" - "fmax v16.8h, v16.8h, v15.8h\n" - "str q18, [x24, x17]\n" - "fmin v17.8h, v17.8h, v14.8h\n" - "str q17, [x24, x23]\n" - "fmin v16.8h, v16.8h, v14.8h\n" - "str q16, [x24, x22]\n" - "add x24, x24, #0x10\n" + "st1 { v28.8h }, [x23]\n" + "str q29, [x23, x6]\n" + "str q30, [x23, x22]\n" + "str q31, [x23, x21]\n" + "add x23, x23, #0x10\n" "blt 2b\n" "3:" // Tile loop: Channel tail - "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "mov v30.16b, v13.16b\n fmla v30.8h, v7.8h, v9.8h\n" - "mov v29.16b, v13.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "mov v27.16b, v13.16b\n fmla v27.8h, v5.8h, v9.8h\n" - "mov v26.16b, v13.16b\n fmla v26.8h, v4.8h, v9.8h\n" - "mov v25.16b, v13.16b\n fmla v25.8h, v3.8h, v9.8h\n" - "mov v23.16b, v13.16b\n fmla v23.8h, v2.8h, v9.8h\n" - "mov v22.16b, v13.16b\n fmla v22.8h, v1.8h, v9.8h\n" - "mov v21.16b, v13.16b\n fmla v21.8h, v0.8h, v9.8h\n" - "ldr q9, [x13, x10]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ld1 { v10.8h }, [x11]\n" - "mov v28.16b, v13.16b\n fmla v28.8h, v2.8h, v11.8h\n" - "ldr q11, [x11, x27]\n" - "fmla v30.8h, v8.8h, v12.8h\n" - "fmla v29.8h, v7.8h, v12.8h\n" - "fmla v26.8h, v5.8h, v12.8h\n" - "fmla v28.8h, v6.8h, v12.8h\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "mov v24.16b, v13.16b\n fmla v24.8h, v3.8h, v12.8h\n" - "fmla v22.8h, v2.8h, v12.8h\n" - "fmla v21.8h, v1.8h, v12.8h\n" - "mov v20.16b, v13.16b\n fmla v20.8h, v0.8h, v12.8h\n" - "ldr q12, [x8, x6]\n" - "mov v19.16b, v13.16b\n fmla v19.8h, v6.8h, v10.8h\n" - "ldr q10, [x13, x9]\n" - "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v11.8h\n" - "ldr q11, [x8, x28]\n" - "fmla v27.8h, v8.8h, v9.8h\n" - "fmla v26.8h, v7.8h, v9.8h\n" - "fmla v25.8h, v6.8h, v9.8h\n" - "fmla v23.8h, v5.8h, v9.8h\n" - "fmla v22.8h, v4.8h, v9.8h\n" - "fmla v21.8h, v3.8h, v9.8h\n" - "fmla v19.8h, v2.8h, v9.8h\n" - "mov v18.16b, v13.16b\n fmla v18.8h, v1.8h, v9.8h\n" - "mov v17.16b, v13.16b\n fmla v17.8h, v0.8h, v9.8h\n" - "ld1 { v9.8h }, [x15]\n" - "fmla v31.8h, v1.8h, v12.8h\n" - "fmla v30.8h, v0.8h, v12.8h\n" - "ldr q12, [x15, x27]\n" - "fmla v29.8h, v2.8h, v11.8h\n" - "fmla v28.8h, v1.8h, v11.8h\n" - "ld1 { v11.8h }, [x12]\n" - "fmla v26.8h, v8.8h, v10.8h\n" - "fmla v25.8h, v7.8h, v10.8h\n" - "fmla v24.8h, v6.8h, v10.8h\n" - "fmla v22.8h, v5.8h, v10.8h\n" - "fmla v21.8h, v4.8h, v10.8h\n" - "fmla v20.8h, v3.8h, v10.8h\n" - "fmla v18.8h, v2.8h, v10.8h\n" - "fmla v17.8h, v1.8h, v10.8h\n" + "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" + "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v9.8h\n" + "mov v22.16b, v13.16b\n fmla v22.8h, v3.8h, v9.8h\n" + "mov v25.16b, v13.16b\n fmla v25.8h, v1.8h, v9.8h\n" + "mov v26.16b, v13.16b\n fmla v26.8h, v0.8h, v9.8h\n" + "fmla v21.8h, v5.8h, v12.8h\n" + "mov v17.16b, v13.16b\n fmla v17.8h, v7.8h, v9.8h\n" + "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" + "mov v20.16b, v13.16b\n fmla v20.8h, v5.8h, v9.8h\n" + "mov v24.16b, v13.16b\n fmla v24.8h, v2.8h, v9.8h\n" + "ldr q9, [x11, x16]\n" "fmla v16.8h, v0.8h, v10.8h\n" - "ldr q10, [x15, x10]\n" - "fmla v31.8h, v3.8h, v9.8h\n" - "fmla v27.8h, v0.8h, v9.8h\n" - "fmla v28.8h, v5.8h, v12.8h\n" - "fmla v24.8h, v2.8h, v12.8h\n" - "ldr q12, [x15, x9]\n" - "fmla v23.8h, v6.8h, v11.8h\n" - "fmla v19.8h, v3.8h, v11.8h\n" - "ldr q11, [x12, x27]\n" - "fmla v31.8h, v5.8h, v10.8h\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v3.8h, v10.8h\n" - "fmla v27.8h, v2.8h, v10.8h\n" - "fmla v26.8h, v1.8h, v10.8h\n" - "fmla v25.8h, v0.8h, v10.8h\n" - "ldr q10, [x14, x6]\n" - "fmla v20.8h, v8.8h, v11.8h\n" - "fmla v16.8h, v5.8h, v11.8h\n" - "ldr q11, [x11, x6]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "fmla v26.8h, v2.8h, v12.8h\n" - "fmla v25.8h, v1.8h, v12.8h\n" - "fmla v24.8h, v0.8h, v12.8h\n" - "ldr q12, [x14, x28]\n" - "fmla v19.8h, v7.8h, v11.8h\n" - "fmla v18.8h, v6.8h, v11.8h\n" - "ldr q11, [x11, x28]\n" - "fmla v31.8h, v7.8h, v10.8h\n" - "fmla v30.8h, v6.8h, v10.8h\n" - "fmla v27.8h, v4.8h, v10.8h\n" - "fmla v26.8h, v3.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" + "mov v19.16b, v13.16b\n fmla v19.8h, v2.8h, v11.8h\n" + "ld1 { v10.8h }, [x25]\n" + "ldr q11, [x25, x24]\n" + "fmla v22.8h, v4.8h, v12.8h\n" + "fmla v25.8h, v2.8h, v12.8h\n" + "fmla v26.8h, v1.8h, v12.8h\n" + "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" + "ldr q10, [x11, x10]\n" + "fmla v21.8h, v7.8h, v9.8h\n" + "fmla v17.8h, v8.8h, v12.8h\n" + "fmla v18.8h, v7.8h, v12.8h\n" + "fmla v19.8h, v6.8h, v12.8h\n" + "mov v23.16b, v13.16b\n fmla v23.8h, v3.8h, v12.8h\n" + "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" + "ldr q12, [x8, x5]\n" + "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" + "fmla v22.8h, v6.8h, v9.8h\n" + "ldr q11, [x8, x27]\n" + "fmla v25.8h, v4.8h, v9.8h\n" + "fmla v26.8h, v3.8h, v9.8h\n" + "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" + "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" + "fmla v20.8h, v8.8h, v9.8h\n" + "fmla v24.8h, v5.8h, v9.8h\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v21.8h, v8.8h, v10.8h\n" + "ld1 { v9.8h }, [x14]\n" + "fmla v16.8h, v1.8h, v12.8h\n" + "fmla v17.8h, v0.8h, v12.8h\n" + "ldr q12, [x14, x24]\n" + "fmla v18.8h, v2.8h, v11.8h\n" + "fmla v19.8h, v1.8h, v11.8h\n" + "ld1 { v11.8h }, [x28]\n" + "fmla v22.8h, v7.8h, v10.8h\n" + "fmla v23.8h, v6.8h, v10.8h\n" + "fmla v25.8h, v5.8h, v10.8h\n" + "fmla v26.8h, v4.8h, v10.8h\n" + "fmla v27.8h, v3.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v10.8h\n" + "fmla v30.8h, v1.8h, v10.8h\n" + "fmla v31.8h, v0.8h, v10.8h\n" + "ldr q10, [x14, x16]\n" + "fmla v20.8h, v0.8h, v9.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v21.8h, v1.8h, v10.8h\n" + "ldr q11, [x28, x24]\n" + "fmla v16.8h, v3.8h, v9.8h\n" + "fmla v19.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v2.8h, v12.8h\n" + "fmla v17.8h, v4.8h, v10.8h\n" + "ldr q12, [x14, x10]\n" + "fmla v18.8h, v3.8h, v10.8h\n" "fmla v22.8h, v0.8h, v10.8h\n" - "ldr q10, [x8, x10]\n" - "fmla v17.8h, v8.8h, v11.8h\n" - "fmla v16.8h, v7.8h, v11.8h\n" - "ldr q11, [x13, x6]\n" - "fmla v29.8h, v8.8h, v12.8h\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "fmla v25.8h, v5.8h, v12.8h\n" - "fmla v24.8h, v4.8h, v12.8h\n" + "fmla v27.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "ldr q11, [x25, x5]\n" + "fmla v20.8h, v2.8h, v10.8h\n" "fmla v21.8h, v2.8h, v12.8h\n" - "fmla v20.8h, v1.8h, v12.8h\n" - "ldr q12, [x8, x9]\n" + "fmla v16.8h, v5.8h, v10.8h\n" + "fmla v17.8h, v5.8h, v12.8h\n" + "ldr q10, [x13, x5]\n" + "fmla v18.8h, v4.8h, v12.8h\n" + "fmla v19.8h, v3.8h, v12.8h\n" + "fmla v22.8h, v1.8h, v12.8h\n" + "fmla v23.8h, v0.8h, v12.8h\n" + "ldr q12, [x13, x27]\n" + "fmla v28.8h, v7.8h, v11.8h\n" + "fmla v29.8h, v6.8h, v11.8h\n" + "ldr q11, [x25, x27]\n" + "fmla v20.8h, v4.8h, v10.8h\n" + "fmla v21.8h, v3.8h, v10.8h\n" + "fmla v24.8h, v1.8h, v10.8h\n" + "fmla v25.8h, v0.8h, v10.8h\n" + "fmla v16.8h, v7.8h, v10.8h\n" + "fmla v17.8h, v6.8h, v10.8h\n" + "ldr q10, [x8, x16]\n" + "fmla v30.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v7.8h, v11.8h\n" + "ldr q11, [x11, x5]\n" + "fmla v18.8h, v8.8h, v12.8h\n" + "fmla v19.8h, v7.8h, v12.8h\n" + "fmla v22.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v4.8h, v12.8h\n" + "fmla v26.8h, v2.8h, v12.8h\n" + "fmla v27.8h, v1.8h, v12.8h\n" + "ldr q12, [x8, x10]\n" "add x8, x8, #0x10\n" - "fmla v31.8h, v2.8h, v10.8h\n" - "fmla v30.8h, v1.8h, v10.8h\n" - "fmla v29.8h, v0.8h, v10.8h\n" - "ld1 { v10.8h }, [x14]\n" - "fmla v27.8h, v7.8h, v11.8h\n" - "fmla v26.8h, v6.8h, v11.8h\n" - "fmla v23.8h, v4.8h, v11.8h\n" - "fmla v22.8h, v3.8h, v11.8h\n" - "fmla v19.8h, v1.8h, v11.8h\n" - "fmla v18.8h, v0.8h, v11.8h\n" - "ldr q11, [x13, x28]\n" - "fmla v30.8h, v2.8h, v12.8h\n" - "fmla v29.8h, v1.8h, v12.8h\n" - "fmla v28.8h, v0.8h, v12.8h\n" - "ldr q12, [x14, x27]\n" - "add x14, x14, #0x10\n" - "fmla v31.8h, v6.8h, v10.8h\n" - "fmla v27.8h, v3.8h, v10.8h\n" - "fmla v23.8h, v0.8h, v10.8h\n" + "fmla v20.8h, v7.8h, v11.8h\n" + "fmla v21.8h, v6.8h, v11.8h\n" + "fmla v24.8h, v4.8h, v11.8h\n" + "fmla v25.8h, v3.8h, v11.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v0.8h, v11.8h\n" + "ldr q11, [x11, x27]\n" + "fmla v16.8h, v2.8h, v10.8h\n" + "fmla v17.8h, v1.8h, v10.8h\n" + "fmla v18.8h, v0.8h, v10.8h\n" "ld1 { v10.8h }, [x13]\n" - "fmla v25.8h, v8.8h, v11.8h\n" - "fmla v24.8h, v7.8h, v11.8h\n" - "fmla v21.8h, v5.8h, v11.8h\n" - "fmla v20.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v2.8h, v11.8h\n" - "fmla v16.8h, v1.8h, v11.8h\n" - "ldr q11, [x12, x10]\n" - "fmla v28.8h, v8.8h, v12.8h\n" - "fmla v24.8h, v5.8h, v12.8h\n" - "fmla v20.8h, v2.8h, v12.8h\n" - "ldr q12, [x13, x27]\n" + "fmla v30.8h, v2.8h, v11.8h\n" + "fmla v19.8h, v0.8h, v12.8h\n" + "fmla v20.8h, v3.8h, v10.8h\n" + "fmla v24.8h, v0.8h, v10.8h\n" + "fmla v22.8h, v8.8h, v11.8h\n" + "fmla v23.8h, v7.8h, v11.8h\n" + "fmla v26.8h, v5.8h, v11.8h\n" + "fmla v27.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v1.8h, v11.8h\n" + "ldr q11, [x28, x16]\n" + "fmla v17.8h, v2.8h, v12.8h\n" + "fmla v18.8h, v1.8h, v12.8h\n" + "ldr q12, [x13, x24]\n" "add x13, x13, #0x10\n" - "fmla v27.8h, v6.8h, v10.8h\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "fmla v19.8h, v0.8h, v10.8h\n" - "ldr q10, [x11, x10]\n" - "fmla v22.8h, v7.8h, v11.8h\n" - "fmla v21.8h, v6.8h, v11.8h\n" - "fmla v23.8h, v8.8h, v11.8h\n" - "fmla v19.8h, v5.8h, v11.8h\n" - "fmla v18.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v3.8h, v11.8h\n" - "ldr q11, [x12, x9]\n" - "fmla v24.8h, v8.8h, v12.8h\n" - "fmla v20.8h, v5.8h, v12.8h\n" - "fmla v16.8h, v2.8h, v12.8h\n" - "ldr q12, [x11, x9]\n" + "fmla v16.8h, v6.8h, v10.8h\n" + "ld1 { v10.8h }, [x11]\n" + "fmla v29.8h, v4.8h, v11.8h\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v19.8h, v8.8h, v12.8h\n" + "fmla v23.8h, v5.8h, v12.8h\n" + "fmla v27.8h, v2.8h, v12.8h\n" + "ldr q12, [x11, x24]\n" "add x11, x11, #0x10\n" - "fmla v19.8h, v8.8h, v10.8h\n" - "fmla v18.8h, v7.8h, v10.8h\n" - "fmla v17.8h, v6.8h, v10.8h\n" - "ldr q10, [x15, x6]\n" - "fmla v22.8h, v8.8h, v11.8h\n" - "fmla v21.8h, v7.8h, v11.8h\n" - "fmla v20.8h, v6.8h, v11.8h\n" - "fmla v18.8h, v5.8h, v11.8h\n" - "fmla v17.8h, v4.8h, v11.8h\n" - "fmla v16.8h, v3.8h, v11.8h\n" - "ldr q11, [x15, x28]\n" - "add x15, x15, #0x10\n" - "fmla v18.8h, v8.8h, v12.8h\n" - "fmla v31.8h, v4.8h, v10.8h\n" - "fmla v17.8h, v7.8h, v12.8h\n" - "fmla v16.8h, v6.8h, v12.8h\n" - "ldr q12, [x12, x6]\n" - "fmla v30.8h, v3.8h, v10.8h\n" - "fmla v27.8h, v1.8h, v10.8h\n" - "fmla v26.8h, v0.8h, v10.8h\n" - "ldr q10, [x12, x28]\n" - "add x12, x12, #0x10\n" + "fmla v20.8h, v6.8h, v10.8h\n" + "fmla v24.8h, v3.8h, v10.8h\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "ldr q10, [x25, x16]\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "fmla v30.8h, v6.8h, v10.8h\n" + "fmla v24.8h, v8.8h, v11.8h\n" + "fmla v25.8h, v7.8h, v11.8h\n" + "fmla v26.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" + "ldr q11, [x28, x10]\n" + "fmla v27.8h, v5.8h, v12.8h\n" "fmla v29.8h, v5.8h, v11.8h\n" - "fmla v28.8h, v4.8h, v11.8h\n" - "fmla v25.8h, v2.8h, v11.8h\n" - "fmla v24.8h, v1.8h, v11.8h\n" - "fmla v23.8h, v7.8h, v12.8h\n" - "fmla v22.8h, v6.8h, v12.8h\n" - "fmla v19.8h, v4.8h, v12.8h\n" - "fmla v18.8h, v3.8h, v12.8h\n" - "fmla v21.8h, v8.8h, v10.8h\n" - "fmla v20.8h, v7.8h, v10.8h\n" - "fmla v17.8h, v5.8h, v10.8h\n" + "fmla v30.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v11.8h\n" + "fmla v23.8h, v8.8h, v12.8h\n" + "ldr q12, [x25, x10]\n" + "fmla v28.8h, v8.8h, v10.8h\n" + "ldr q10, [x14, x5]\n" + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v26.8h, v7.8h, v11.8h\n" + "add x25, x25, #0x10\n" + "fmla v27.8h, v6.8h, v11.8h\n" + "fmla v29.8h, v8.8h, v12.8h\n" + "ldr q11, [x14, x27]\n" + "add x14, x14, #0x10\n" + "fmla v30.8h, v7.8h, v12.8h\n" + "fmla v31.8h, v6.8h, v12.8h\n" + "ldr q12, [x28, x5]\n" "fmla v16.8h, v4.8h, v10.8h\n" - "fmax v31.8h, v31.8h, v15.8h\n" - "fmax v30.8h, v30.8h, v15.8h\n" - "fmax v29.8h, v29.8h, v15.8h\n" - "fmin v31.8h, v31.8h, v14.8h\n" - "st1 { v31.8h }, [x16]\n" - "fmin v30.8h, v30.8h, v14.8h\n" - "fmin v29.8h, v29.8h, v14.8h\n" - "str q30, [x16, x17]\n" - "fmax v28.8h, v28.8h, v15.8h\n" - "fmax v27.8h, v27.8h, v15.8h\n" - "str q29, [x16, x23]\n" - "fmax v26.8h, v26.8h, v15.8h\n" - "fmax v25.8h, v25.8h, v15.8h\n" - "fmin v28.8h, v28.8h, v14.8h\n" - "str q28, [x16, x22]\n" - "fmin v27.8h, v27.8h, v14.8h\n" - "add x16, x16, #0x10\n" - "fmin v26.8h, v26.8h, v14.8h\n" - "st1 { v27.8h }, [x26]\n" - "fmin v25.8h, v25.8h, v14.8h\n" - "fmax v24.8h, v24.8h, v15.8h\n" - "str q26, [x26, x17]\n" - "fmax v23.8h, v23.8h, v15.8h\n" - "str q25, [x26, x23]\n" - "fmin v24.8h, v24.8h, v14.8h\n" + "fmla v17.8h, v3.8h, v10.8h\n" + "fmax v16.8h, v16.8h, v15.8h\n" + "fmla v20.8h, v1.8h, v10.8h\n" + "fmla v21.8h, v0.8h, v10.8h\n" + "ldr q10, [x28, x27]\n" + "fmax v17.8h, v17.8h, v15.8h\n" + "fmla v18.8h, v5.8h, v11.8h\n" + "fmla v19.8h, v4.8h, v11.8h\n" + "fmax v18.8h, v18.8h, v15.8h\n" + "add x28, x28, #0x10\n" + "fmla v22.8h, v2.8h, v11.8h\n" + "fmla v23.8h, v1.8h, v11.8h\n" + "fmax v19.8h, v19.8h, v15.8h\n" + "fmla v24.8h, v7.8h, v12.8h\n" + "fmla v25.8h, v6.8h, v12.8h\n" + "fmax v20.8h, v20.8h, v15.8h\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "fmax v21.8h, v21.8h, v15.8h\n" + "fmla v26.8h, v8.8h, v10.8h\n" + "fmla v27.8h, v7.8h, v10.8h\n" "fmax v22.8h, v22.8h, v15.8h\n" - "str q24, [x26, x22]\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "fmax v23.8h, v23.8h, v15.8h\n" + "fmax v24.8h, v24.8h, v15.8h\n" + "fmax v25.8h, v25.8h, v15.8h\n" + "fmax v26.8h, v26.8h, v15.8h\n" + "fmax v27.8h, v27.8h, v15.8h\n" + "fmax v28.8h, v28.8h, v15.8h\n" + "fmax v29.8h, v29.8h, v15.8h\n" + "fmax v30.8h, v30.8h, v15.8h\n" + "fmax v31.8h, v31.8h, v15.8h\n" + "fmin v16.8h, v16.8h, v14.8h\n" + "fmin v17.8h, v17.8h, v14.8h\n" + "st1 { v16.8h }, [x17]\n" + "fmin v18.8h, v18.8h, v14.8h\n" + "fmin v19.8h, v19.8h, v14.8h\n" + "str q17, [x17, x6]\n" + "fmin v20.8h, v20.8h, v14.8h\n" + "fmin v21.8h, v21.8h, v14.8h\n" + "str q18, [x17, x22]\n" + "fmin v22.8h, v22.8h, v14.8h\n" "fmin v23.8h, v23.8h, v14.8h\n" + "str q19, [x17, x21]\n" + "add x17, x17, #0x10\n" + "fmin v24.8h, v24.8h, v14.8h\n" + "fmin v25.8h, v25.8h, v14.8h\n" + "st1 { v20.8h }, [x9]\n" + "fmin v26.8h, v26.8h, v14.8h\n" + "fmin v27.8h, v27.8h, v14.8h\n" + "str q21, [x9, x6]\n" + "fmin v28.8h, v28.8h, v14.8h\n" + "fmin v29.8h, v29.8h, v14.8h\n" + "str q22, [x9, x22]\n" + "fmin v30.8h, v30.8h, v14.8h\n" + "fmin v31.8h, v31.8h, v14.8h\n" + "str q23, [x9, x21]\n" + "add x9, x9, #0x10\n" + "st1 { v24.8h }, [x26]\n" + "str q25, [x26, x6]\n" + "str q26, [x26, x22]\n" + "str q27, [x26, x21]\n" "add x26, x26, #0x10\n" - "fmin v22.8h, v22.8h, v14.8h\n" - "st1 { v23.8h }, [x25]\n" - "fmax v21.8h, v21.8h, v15.8h\n" - "fmax v20.8h, v20.8h, v15.8h\n" - "str q22, [x25, x17]\n" - "fmax v19.8h, v19.8h, v15.8h\n" - "fmax v18.8h, v18.8h, v15.8h\n" - "fmin v21.8h, v21.8h, v14.8h\n" - "str q21, [x25, x23]\n" - "fmin v20.8h, v20.8h, v14.8h\n" - "fmin v19.8h, v19.8h, v14.8h\n" - "str q20, [x25, x22]\n" - "fmin v18.8h, v18.8h, v14.8h\n" - "add x25, x25, #0x10\n" - "fmax v17.8h, v17.8h, v15.8h\n" - "st1 { v19.8h }, [x24]\n" - "fmax v16.8h, v16.8h, v15.8h\n" - "str q18, [x24, x17]\n" - "fmin v17.8h, v17.8h, v14.8h\n" - "str q17, [x24, x23]\n" - "fmin v16.8h, v16.8h, v14.8h\n" - "str q16, [x24, x22]\n" - "add x24, x24, #0x10\n" + "st1 { v28.8h }, [x23]\n" + "str q29, [x23, x6]\n" + "str q30, [x23, x22]\n" + "str q31, [x23, x21]\n" + "add x23, x23, #0x10\n" "4:" // Tile loop: Oddments - "tst %x[n_channels], #0x1\n" - "beq 73f\n" - "ldr q13, [x5, #0x0]\n" - "ldr q0, [x5, #0x10]\n" - "add x22, x14, x10\n" - "ldr q1, [x5, #0x20]\n" + "tst %x[n_channels], #0x7\n" + "beq 141f\n" + "ldr q13, [x15, #0x0]\n" + "ldr q0, [x15, #0x10]\n" + "ldr q1, [x15, #0x20]\n" + "ldr q2, [x15, #0x30]\n" + "add x22, x13, x16\n" "add x21, x8, XZR\n" - "ldr q2, [x5, #0x30]\n" - "add x20, x8, x27\n" - "ldr q3, [x5, #0x40]\n" - "add x19, x14, x9\n" - "ldr q4, [x5, #0x50]\n" - "ldr q5, [x5, #0x60]\n" - "ldr q6, [x5, #0x70]\n" - "ldr q7, [x5, #0x80]\n" - "ldr q8, [x5, #0x90]\n" + "ldr q3, [x15, #0x40]\n" + "ldr q4, [x15, #0x50]\n" + "add x20, x8, x24\n" + "add x19, x13, x10\n" + "ldr q5, [x15, #0x60]\n" + "ldr q6, [x15, #0x70]\n" + "ldr q7, [x15, #0x80]\n" + "ldr q8, [x15, #0x90]\n" + "tbz %x[n_channels], #2, 6f\n" + "ldr d9, [x22], #0x8\n" + "ldr d10, [x21], #0x8\n" + "ldr d11, [x20], #0x8\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 5f\n" + "ld1 { v9.s }[2], [x22], #0x4\n" + "ld1 { v10.s }[2], [x21], #0x4\n" + "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 8f\n" + "ld1 { v9.h }[6], [x22]\n" + "ld1 { v10.h }[6], [x21]\n" + "ld1 { v11.h }[6], [x20]\n" + "ld1 { v12.h }[6], [x19]\n" + "b 8f\n" + "5:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 8f\n" + "ld1 { v9.h }[4], [x22]\n" + "ld1 { v10.h }[4], [x21]\n" + "ld1 { v11.h }[4], [x20]\n" + "ld1 { v12.h }[4], [x19]\n" + "b 8f\n" + "6:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 7f\n" "ldr s9, [x22], #0x4\n" "ldr s10, [x21], #0x4\n" "ldr s11, [x20], #0x4\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 6f\n" + "tbz %x[n_channels], #0, 8f\n" "ld1 { v9.h }[2], [x22]\n" "ld1 { v10.h }[2], [x21]\n" "ld1 { v11.h }[2], [x20]\n" "ld1 { v12.h }[2], [x19]\n" - "b 6f\n" - "5:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 5), (2, 3): Bit 1: Unset + "b 8f\n" + "7:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Unset: Bit 1: Unset "ldr h9, [x22, #0x0]\n" "ldr h10, [x21, #0x0]\n" "ldr h11, [x20, #0x0]\n" "ldr h12, [x19, #0x0]\n" - "6:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 5), (2, 3): Bit 1: End - "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "add x19, x11, XZR\n" - "mov v30.16b, v13.16b\n fmla v30.8h, v7.8h, v9.8h\n" - "mov v29.16b, v13.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "mov v27.16b, v13.16b\n fmla v27.8h, v5.8h, v9.8h\n" - "mov v26.16b, v13.16b\n fmla v26.8h, v4.8h, v9.8h\n" - "mov v25.16b, v13.16b\n fmla v25.8h, v3.8h, v9.8h\n" - "mov v23.16b, v13.16b\n fmla v23.8h, v2.8h, v9.8h\n" - "mov v22.16b, v13.16b\n fmla v22.8h, v1.8h, v9.8h\n" - "mov v21.16b, v13.16b\n fmla v21.8h, v0.8h, v9.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "mov v28.16b, v13.16b\n fmla v28.8h, v2.8h, v11.8h\n" - "fmla v30.8h, v8.8h, v12.8h\n" - "fmla v29.8h, v7.8h, v12.8h\n" - "fmla v26.8h, v5.8h, v12.8h\n" - "fmla v28.8h, v6.8h, v12.8h\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "mov v24.16b, v13.16b\n fmla v24.8h, v3.8h, v12.8h\n" - "fmla v22.8h, v2.8h, v12.8h\n" - "fmla v21.8h, v1.8h, v12.8h\n" - "mov v20.16b, v13.16b\n fmla v20.8h, v0.8h, v12.8h\n" - "tbz %x[n_channels], #1, 7f\n" - "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 8f\n" - "ld1 { v10.h }[2], [x19]\n" - "b 8f\n" - "7:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 1: Unset - "ldr h10, [x19, #0x0]\n" - "8:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 1: End - "mov v19.16b, v13.16b\n fmla v19.8h, v6.8h, v10.8h\n" - "add x19, x11, x27\n" + "8:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: End + "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v9.8h\n" + "mov v17.16b, v13.16b\n fmla v17.8h, v7.8h, v9.8h\n" + "add x19, x25, XZR\n" + "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" + "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" + "mov v22.16b, v13.16b\n fmla v22.8h, v3.8h, v9.8h\n" + "mov v25.16b, v13.16b\n fmla v25.8h, v1.8h, v9.8h\n" + "mov v26.16b, v13.16b\n fmla v26.8h, v0.8h, v9.8h\n" + "mov v19.16b, v13.16b\n fmla v19.8h, v2.8h, v11.8h\n" + "mov v20.16b, v13.16b\n fmla v20.8h, v5.8h, v9.8h\n" + "mov v24.16b, v13.16b\n fmla v24.8h, v2.8h, v9.8h\n" + "fmla v16.8h, v0.8h, v10.8h\n" + "fmla v17.8h, v8.8h, v12.8h\n" + "fmla v18.8h, v7.8h, v12.8h\n" + "fmla v19.8h, v6.8h, v12.8h\n" + "fmla v21.8h, v5.8h, v12.8h\n" + "fmla v22.8h, v4.8h, v12.8h\n" + "mov v23.16b, v13.16b\n fmla v23.8h, v3.8h, v12.8h\n" + "fmla v25.8h, v2.8h, v12.8h\n" + "fmla v26.8h, v1.8h, v12.8h\n" + "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" + "tbz %x[n_channels], #2, 10f\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 9f\n" - "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 10f\n" - "ld1 { v11.h }[2], [x19]\n" - "b 10f\n" - "9:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 1: Unset - "ldr h11, [x19, #0x0]\n" - "10:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 1: End - "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v11.8h\n" - "add x19, x13, x10\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 12f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 12f\n" + "9:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 12f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 12f\n" + "10:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: Unset "tbz %x[n_channels], #1, 11f\n" - "ldr s9, [x19], #0x4\n" + "ldr s10, [x19], #0x4\n" "tbz %x[n_channels], #0, 12f\n" - "ld1 { v9.h }[2], [x19]\n" + "ld1 { v10.h }[2], [x19]\n" "b 12f\n" - "11:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: Unset - "ldr h9, [x19, #0x0]\n" - "12:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: End - "fmla v27.8h, v8.8h, v9.8h\n" - "add x19, x8, x6\n" - "fmla v26.8h, v7.8h, v9.8h\n" - "fmla v25.8h, v6.8h, v9.8h\n" - "fmla v23.8h, v5.8h, v9.8h\n" - "fmla v22.8h, v4.8h, v9.8h\n" - "fmla v21.8h, v3.8h, v9.8h\n" - "fmla v19.8h, v2.8h, v9.8h\n" - "mov v18.16b, v13.16b\n fmla v18.8h, v1.8h, v9.8h\n" - "mov v17.16b, v13.16b\n fmla v17.8h, v0.8h, v9.8h\n" + "11:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: Unset: Bit 1: Unset + "ldr h10, [x19, #0x0]\n" + "12:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: End + "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" + "add x19, x25, x24\n" + "tbz %x[n_channels], #2, 14f\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 13f\n" - "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 14f\n" - "ld1 { v12.h }[2], [x19]\n" - "b 14f\n" - "13:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 1: Unset - "ldr h12, [x19, #0x0]\n" - "14:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 1: End - "fmla v31.8h, v1.8h, v12.8h\n" - "add x19, x8, x28\n" - "fmla v30.8h, v0.8h, v12.8h\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 16f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 16f\n" + "13:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 16f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 16f\n" + "14:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: Unset "tbz %x[n_channels], #1, 15f\n" "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 16f\n" "ld1 { v11.h }[2], [x19]\n" "b 16f\n" - "15:" // Tile loop: Oddments: Load inputs: (0, 4): Bit 1: Unset + "15:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "16:" // Tile loop: Oddments: Load inputs: (0, 4): Bit 1: End - "fmla v29.8h, v2.8h, v11.8h\n" - "add x19, x13, x9\n" - "fmla v28.8h, v1.8h, v11.8h\n" + "16:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: End + "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" + "add x19, x11, x16\n" + "tbz %x[n_channels], #2, 18f\n" + "ldr d9, [x19], #0x8\n" "tbz %x[n_channels], #1, 17f\n" - "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 18f\n" - "ld1 { v10.h }[2], [x19]\n" - "b 18f\n" - "17:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: Unset - "ldr h10, [x19, #0x0]\n" - "18:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: End - "fmla v26.8h, v8.8h, v10.8h\n" - "add x19, x15, XZR\n" - "fmla v25.8h, v7.8h, v10.8h\n" - "fmla v24.8h, v6.8h, v10.8h\n" - "fmla v22.8h, v5.8h, v10.8h\n" - "fmla v21.8h, v4.8h, v10.8h\n" - "fmla v20.8h, v3.8h, v10.8h\n" - "fmla v18.8h, v2.8h, v10.8h\n" - "fmla v17.8h, v1.8h, v10.8h\n" - "fmla v16.8h, v0.8h, v10.8h\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 20f\n" + "ld1 { v9.h }[6], [x19]\n" + "b 20f\n" + "17:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 20f\n" + "ld1 { v9.h }[4], [x19]\n" + "b 20f\n" + "18:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset "tbz %x[n_channels], #1, 19f\n" "ldr s9, [x19], #0x4\n" "tbz %x[n_channels], #0, 20f\n" "ld1 { v9.h }[2], [x19]\n" "b 20f\n" - "19:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 1: Unset + "19:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset: Bit 1: Unset "ldr h9, [x19, #0x0]\n" - "20:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 1: End - "fmla v31.8h, v3.8h, v9.8h\n" - "add x19, x15, x27\n" - "fmla v27.8h, v0.8h, v9.8h\n" + "20:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: End + "fmla v20.8h, v8.8h, v9.8h\n" + "fmla v21.8h, v7.8h, v9.8h\n" + "add x19, x8, x5\n" + "fmla v22.8h, v6.8h, v9.8h\n" + "fmla v24.8h, v5.8h, v9.8h\n" + "fmla v25.8h, v4.8h, v9.8h\n" + "fmla v26.8h, v3.8h, v9.8h\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" + "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" + "tbz %x[n_channels], #2, 22f\n" + "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #1, 21f\n" - "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 22f\n" - "ld1 { v12.h }[2], [x19]\n" - "b 22f\n" - "21:" // Tile loop: Oddments: Load inputs: (1, 5): Bit 1: Unset - "ldr h12, [x19, #0x0]\n" - "22:" // Tile loop: Oddments: Load inputs: (1, 5): Bit 1: End - "fmla v28.8h, v5.8h, v12.8h\n" - "add x19, x12, XZR\n" - "fmla v24.8h, v2.8h, v12.8h\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 24f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 24f\n" + "21:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 24f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 24f\n" + "22:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Unset "tbz %x[n_channels], #1, 23f\n" - "ldr s11, [x19], #0x4\n" + "ldr s12, [x19], #0x4\n" "tbz %x[n_channels], #0, 24f\n" - "ld1 { v11.h }[2], [x19]\n" + "ld1 { v12.h }[2], [x19]\n" "b 24f\n" - "23:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 1: Unset - "ldr h11, [x19, #0x0]\n" - "24:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 1: End - "fmla v23.8h, v6.8h, v11.8h\n" - "add x19, x15, x10\n" - "fmla v19.8h, v3.8h, v11.8h\n" + "23:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: Unset: Bit 1: Unset + "ldr h12, [x19, #0x0]\n" + "24:" // Tile loop: Oddments: Load inputs: (0, 1): Bit 2: End + "fmla v16.8h, v1.8h, v12.8h\n" + "fmla v17.8h, v0.8h, v12.8h\n" + "add x19, x8, x27\n" + "tbz %x[n_channels], #2, 26f\n" + "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #1, 25f\n" - "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 26f\n" - "ld1 { v10.h }[2], [x19]\n" - "b 26f\n" - "25:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 1: Unset - "ldr h10, [x19, #0x0]\n" - "26:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 1: End - "fmla v31.8h, v5.8h, v10.8h\n" - "add x19, x12, x27\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v3.8h, v10.8h\n" - "fmla v27.8h, v2.8h, v10.8h\n" - "fmla v26.8h, v1.8h, v10.8h\n" - "fmla v25.8h, v0.8h, v10.8h\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 28f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 28f\n" + "25:" // Tile loop: Oddments: Load inputs: (0, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 28f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 28f\n" + "26:" // Tile loop: Oddments: Load inputs: (0, 4): Bit 2: Unset "tbz %x[n_channels], #1, 27f\n" "ldr s11, [x19], #0x4\n" "tbz %x[n_channels], #0, 28f\n" "ld1 { v11.h }[2], [x19]\n" "b 28f\n" - "27:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 1: Unset + "27:" // Tile loop: Oddments: Load inputs: (0, 4): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "28:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 1: End - "fmla v20.8h, v8.8h, v11.8h\n" - "add x19, x15, x9\n" - "fmla v16.8h, v5.8h, v11.8h\n" + "28:" // Tile loop: Oddments: Load inputs: (0, 4): Bit 2: End + "fmla v18.8h, v2.8h, v11.8h\n" + "fmla v19.8h, v1.8h, v11.8h\n" + "add x19, x11, x10\n" + "tbz %x[n_channels], #2, 30f\n" + "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #1, 29f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 32f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 32f\n" + "29:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 32f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 32f\n" + "30:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 31f\n" + "ldr s10, [x19], #0x4\n" + "tbz %x[n_channels], #0, 32f\n" + "ld1 { v10.h }[2], [x19]\n" + "b 32f\n" + "31:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset: Bit 1: Unset + "ldr h10, [x19, #0x0]\n" + "32:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: End + "fmla v21.8h, v8.8h, v10.8h\n" + "fmla v22.8h, v7.8h, v10.8h\n" + "add x19, x14, XZR\n" + "fmla v23.8h, v6.8h, v10.8h\n" + "fmla v25.8h, v5.8h, v10.8h\n" + "fmla v26.8h, v4.8h, v10.8h\n" + "fmla v27.8h, v3.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v10.8h\n" + "fmla v30.8h, v1.8h, v10.8h\n" + "fmla v31.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 34f\n" + "ldr d9, [x19], #0x8\n" + "tbz %x[n_channels], #1, 33f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 36f\n" + "ld1 { v9.h }[6], [x19]\n" + "b 36f\n" + "33:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 36f\n" + "ld1 { v9.h }[4], [x19]\n" + "b 36f\n" + "34:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 35f\n" + "ldr s9, [x19], #0x4\n" + "tbz %x[n_channels], #0, 36f\n" + "ld1 { v9.h }[2], [x19]\n" + "b 36f\n" + "35:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: Unset: Bit 1: Unset + "ldr h9, [x19, #0x0]\n" + "36:" // Tile loop: Oddments: Load inputs: (1, 0): Bit 2: End + "fmla v16.8h, v3.8h, v9.8h\n" + "fmla v20.8h, v0.8h, v9.8h\n" + "add x19, x14, x24\n" + "tbz %x[n_channels], #2, 38f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 37f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 40f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 40f\n" + "37:" // Tile loop: Oddments: Load inputs: (1, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 40f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 40f\n" + "38:" // Tile loop: Oddments: Load inputs: (1, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 39f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 30f\n" + "tbz %x[n_channels], #0, 40f\n" "ld1 { v12.h }[2], [x19]\n" - "b 30f\n" - "29:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: Unset + "b 40f\n" + "39:" // Tile loop: Oddments: Load inputs: (1, 5): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "30:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: End - "fmla v30.8h, v5.8h, v12.8h\n" - "add x19, x11, x6\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "fmla v26.8h, v2.8h, v12.8h\n" - "fmla v25.8h, v1.8h, v12.8h\n" - "fmla v24.8h, v0.8h, v12.8h\n" - "tbz %x[n_channels], #1, 31f\n" + "40:" // Tile loop: Oddments: Load inputs: (1, 5): Bit 2: End + "fmla v19.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v2.8h, v12.8h\n" + "add x19, x28, XZR\n" + "tbz %x[n_channels], #2, 42f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 41f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 44f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 44f\n" + "41:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 44f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 44f\n" + "42:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 43f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 32f\n" + "tbz %x[n_channels], #0, 44f\n" "ld1 { v11.h }[2], [x19]\n" - "b 32f\n" - "31:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 1: Unset + "b 44f\n" + "43:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "32:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 1: End - "fmla v19.8h, v7.8h, v11.8h\n" - "add x19, x14, x6\n" - "fmla v18.8h, v6.8h, v11.8h\n" - "tbz %x[n_channels], #1, 33f\n" + "44:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: End + "fmla v24.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "add x19, x14, x16\n" + "tbz %x[n_channels], #2, 46f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 45f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 48f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 48f\n" + "45:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 48f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 48f\n" + "46:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 47f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 34f\n" + "tbz %x[n_channels], #0, 48f\n" "ld1 { v10.h }[2], [x19]\n" - "b 34f\n" - "33:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 1: Unset + "b 48f\n" + "47:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "34:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 1: End - "fmla v31.8h, v7.8h, v10.8h\n" - "add x19, x11, x28\n" - "fmla v30.8h, v6.8h, v10.8h\n" - "fmla v27.8h, v4.8h, v10.8h\n" - "fmla v26.8h, v3.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" + "48:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: End + "fmla v16.8h, v5.8h, v10.8h\n" + "fmla v17.8h, v4.8h, v10.8h\n" + "add x19, x28, x24\n" + "fmla v18.8h, v3.8h, v10.8h\n" + "fmla v20.8h, v2.8h, v10.8h\n" + "fmla v21.8h, v1.8h, v10.8h\n" "fmla v22.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 35f\n" + "tbz %x[n_channels], #2, 50f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 49f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 52f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 52f\n" + "49:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 52f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 52f\n" + "50:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 51f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 36f\n" + "tbz %x[n_channels], #0, 52f\n" "ld1 { v11.h }[2], [x19]\n" - "b 36f\n" - "35:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 1: Unset + "b 52f\n" + "51:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "36:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 1: End - "fmla v17.8h, v8.8h, v11.8h\n" - "add x19, x14, x28\n" - "fmla v16.8h, v7.8h, v11.8h\n" - "tbz %x[n_channels], #1, 37f\n" + "52:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: End + "fmla v27.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "add x19, x14, x10\n" + "tbz %x[n_channels], #2, 54f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 53f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 56f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 56f\n" + "53:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 56f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 56f\n" + "54:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 55f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 38f\n" + "tbz %x[n_channels], #0, 56f\n" "ld1 { v12.h }[2], [x19]\n" - "b 38f\n" - "37:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 1: Unset + "b 56f\n" + "55:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "38:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 1: End - "fmla v29.8h, v8.8h, v12.8h\n" - "add x19, x8, x10\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "fmla v25.8h, v5.8h, v12.8h\n" - "fmla v24.8h, v4.8h, v12.8h\n" + "56:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: End + "fmla v17.8h, v5.8h, v12.8h\n" + "fmla v18.8h, v4.8h, v12.8h\n" + "add x19, x25, x5\n" + "fmla v19.8h, v3.8h, v12.8h\n" "fmla v21.8h, v2.8h, v12.8h\n" - "fmla v20.8h, v1.8h, v12.8h\n" - "tbz %x[n_channels], #1, 39f\n" + "fmla v22.8h, v1.8h, v12.8h\n" + "fmla v23.8h, v0.8h, v12.8h\n" + "tbz %x[n_channels], #2, 58f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 57f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 60f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 60f\n" + "57:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 60f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 60f\n" + "58:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 59f\n" + "ldr s11, [x19], #0x4\n" + "tbz %x[n_channels], #0, 60f\n" + "ld1 { v11.h }[2], [x19]\n" + "b 60f\n" + "59:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: Unset: Bit 1: Unset + "ldr h11, [x19, #0x0]\n" + "60:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: End + "fmla v28.8h, v7.8h, v11.8h\n" + "fmla v29.8h, v6.8h, v11.8h\n" + "add x19, x13, x5\n" + "tbz %x[n_channels], #2, 62f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 61f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 64f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 64f\n" + "61:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 64f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 64f\n" + "62:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 63f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 40f\n" + "tbz %x[n_channels], #0, 64f\n" "ld1 { v10.h }[2], [x19]\n" - "b 40f\n" - "39:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 1: Unset + "b 64f\n" + "63:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "40:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 1: End - "fmla v31.8h, v2.8h, v10.8h\n" - "add x19, x13, x6\n" - "fmla v30.8h, v1.8h, v10.8h\n" - "fmla v29.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 41f\n" + "64:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: End + "fmla v16.8h, v7.8h, v10.8h\n" + "fmla v17.8h, v6.8h, v10.8h\n" + "add x19, x25, x27\n" + "fmla v20.8h, v4.8h, v10.8h\n" + "fmla v21.8h, v3.8h, v10.8h\n" + "fmla v24.8h, v1.8h, v10.8h\n" + "fmla v25.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 66f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 65f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 68f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 68f\n" + "65:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 68f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 68f\n" + "66:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 67f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 42f\n" + "tbz %x[n_channels], #0, 68f\n" "ld1 { v11.h }[2], [x19]\n" - "b 42f\n" - "41:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: Unset + "b 68f\n" + "67:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "42:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: End - "fmla v27.8h, v7.8h, v11.8h\n" - "add x19, x8, x9\n" - "fmla v26.8h, v6.8h, v11.8h\n" - "fmla v23.8h, v4.8h, v11.8h\n" - "fmla v22.8h, v3.8h, v11.8h\n" - "fmla v19.8h, v1.8h, v11.8h\n" - "fmla v18.8h, v0.8h, v11.8h\n" - "tbz %x[n_channels], #1, 43f\n" + "68:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: End + "fmla v30.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v7.8h, v11.8h\n" + "add x19, x13, x27\n" + "tbz %x[n_channels], #2, 70f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 69f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 72f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 72f\n" + "69:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 72f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 72f\n" + "70:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 71f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 44f\n" + "tbz %x[n_channels], #0, 72f\n" "ld1 { v12.h }[2], [x19]\n" - "b 44f\n" - "43:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 1: Unset + "b 72f\n" + "71:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "44:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 1: End - "fmla v30.8h, v2.8h, v12.8h\n" - "add x19, x14, XZR\n" - "fmla v29.8h, v1.8h, v12.8h\n" - "fmla v28.8h, v0.8h, v12.8h\n" - "tbz %x[n_channels], #1, 45f\n" + "72:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: End + "fmla v18.8h, v8.8h, v12.8h\n" + "fmla v19.8h, v7.8h, v12.8h\n" + "add x19, x8, x16\n" + "fmla v22.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v4.8h, v12.8h\n" + "fmla v26.8h, v2.8h, v12.8h\n" + "fmla v27.8h, v1.8h, v12.8h\n" + "tbz %x[n_channels], #2, 74f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 73f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 76f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 76f\n" + "73:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 76f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 76f\n" + "74:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 75f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 46f\n" + "tbz %x[n_channels], #0, 76f\n" "ld1 { v10.h }[2], [x19]\n" - "b 46f\n" - "45:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 1: Unset + "b 76f\n" + "75:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "46:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 1: End - "fmla v31.8h, v6.8h, v10.8h\n" - "add x19, x13, x28\n" - "fmla v27.8h, v3.8h, v10.8h\n" - "fmla v23.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 47f\n" + "76:" // Tile loop: Oddments: Load inputs: (0, 2): Bit 2: End + "fmla v16.8h, v2.8h, v10.8h\n" + "fmla v17.8h, v1.8h, v10.8h\n" + "add x19, x11, x5\n" + "fmla v18.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 78f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 77f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 80f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 80f\n" + "77:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 80f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 80f\n" + "78:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 79f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 48f\n" + "tbz %x[n_channels], #0, 80f\n" "ld1 { v11.h }[2], [x19]\n" - "b 48f\n" - "47:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 1: Unset + "b 80f\n" + "79:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "48:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 1: End - "fmla v25.8h, v8.8h, v11.8h\n" - "add x19, x14, x27\n" - "fmla v24.8h, v7.8h, v11.8h\n" - "fmla v21.8h, v5.8h, v11.8h\n" - "fmla v20.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v2.8h, v11.8h\n" - "fmla v16.8h, v1.8h, v11.8h\n" - "tbz %x[n_channels], #1, 49f\n" + "80:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: End + "fmla v20.8h, v7.8h, v11.8h\n" + "fmla v21.8h, v6.8h, v11.8h\n" + "add x19, x8, x10\n" + "fmla v24.8h, v4.8h, v11.8h\n" + "fmla v25.8h, v3.8h, v11.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v0.8h, v11.8h\n" + "tbz %x[n_channels], #2, 82f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 81f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 84f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 84f\n" + "81:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 84f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 84f\n" + "82:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 83f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 50f\n" + "tbz %x[n_channels], #0, 84f\n" "ld1 { v12.h }[2], [x19]\n" - "b 50f\n" - "49:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 1: Unset + "b 84f\n" + "83:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "50:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 1: End - "fmla v28.8h, v8.8h, v12.8h\n" + "84:" // Tile loop: Oddments: Load inputs: (0, 3): Bit 2: End + "fmla v17.8h, v2.8h, v12.8h\n" + "fmla v18.8h, v1.8h, v12.8h\n" "add x19, x13, XZR\n" - "fmla v24.8h, v5.8h, v12.8h\n" - "fmla v20.8h, v2.8h, v12.8h\n" - "tbz %x[n_channels], #1, 51f\n" + "fmla v19.8h, v0.8h, v12.8h\n" + "tbz %x[n_channels], #2, 86f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 85f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 88f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 88f\n" + "85:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 88f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 88f\n" + "86:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 87f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 52f\n" + "tbz %x[n_channels], #0, 88f\n" "ld1 { v10.h }[2], [x19]\n" - "b 52f\n" - "51:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: Unset + "b 88f\n" + "87:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "52:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: End - "fmla v27.8h, v6.8h, v10.8h\n" - "add x19, x12, x10\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "fmla v19.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 53f\n" + "88:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: End + "fmla v16.8h, v6.8h, v10.8h\n" + "fmla v20.8h, v3.8h, v10.8h\n" + "add x19, x11, x27\n" + "fmla v24.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 90f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 89f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 92f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 92f\n" + "89:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 92f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 92f\n" + "90:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 91f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 54f\n" + "tbz %x[n_channels], #0, 92f\n" "ld1 { v11.h }[2], [x19]\n" - "b 54f\n" - "53:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 1: Unset + "b 92f\n" + "91:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "54:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 1: End - "fmla v23.8h, v8.8h, v11.8h\n" - "add x19, x13, x27\n" - "fmla v22.8h, v7.8h, v11.8h\n" - "fmla v21.8h, v6.8h, v11.8h\n" - "fmla v19.8h, v5.8h, v11.8h\n" - "fmla v18.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v3.8h, v11.8h\n" - "tbz %x[n_channels], #1, 55f\n" + "92:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: End + "fmla v22.8h, v8.8h, v11.8h\n" + "fmla v23.8h, v7.8h, v11.8h\n" + "add x19, x13, x24\n" + "fmla v26.8h, v5.8h, v11.8h\n" + "fmla v27.8h, v4.8h, v11.8h\n" + "fmla v30.8h, v2.8h, v11.8h\n" + "fmla v31.8h, v1.8h, v11.8h\n" + "tbz %x[n_channels], #2, 94f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 93f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 96f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 96f\n" + "93:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 96f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 96f\n" + "94:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 95f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 56f\n" + "tbz %x[n_channels], #0, 96f\n" "ld1 { v12.h }[2], [x19]\n" - "b 56f\n" - "55:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 1: Unset + "b 96f\n" + "95:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "56:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 1: End - "fmla v24.8h, v8.8h, v12.8h\n" - "add x19, x11, x10\n" - "fmla v20.8h, v5.8h, v12.8h\n" - "fmla v16.8h, v2.8h, v12.8h\n" - "tbz %x[n_channels], #1, 57f\n" + "96:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: End + "fmla v19.8h, v8.8h, v12.8h\n" + "fmla v23.8h, v5.8h, v12.8h\n" + "add x19, x11, XZR\n" + "fmla v27.8h, v2.8h, v12.8h\n" + "tbz %x[n_channels], #2, 98f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 97f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 100f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 100f\n" + "97:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 100f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 100f\n" + "98:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 99f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 58f\n" + "tbz %x[n_channels], #0, 100f\n" "ld1 { v10.h }[2], [x19]\n" - "b 58f\n" - "57:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 1: Unset + "b 100f\n" + "99:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "58:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 1: End - "fmla v19.8h, v8.8h, v10.8h\n" - "add x19, x12, x9\n" - "fmla v18.8h, v7.8h, v10.8h\n" - "fmla v17.8h, v6.8h, v10.8h\n" - "tbz %x[n_channels], #1, 59f\n" + "100:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: End + "fmla v20.8h, v6.8h, v10.8h\n" + "fmla v24.8h, v3.8h, v10.8h\n" + "add x19, x28, x16\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 102f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 101f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 104f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 104f\n" + "101:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 104f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 104f\n" + "102:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 103f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 60f\n" + "tbz %x[n_channels], #0, 104f\n" "ld1 { v11.h }[2], [x19]\n" - "b 60f\n" - "59:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 1: Unset + "b 104f\n" + "103:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "60:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 1: End - "fmla v22.8h, v8.8h, v11.8h\n" - "add x19, x11, x9\n" - "fmla v21.8h, v7.8h, v11.8h\n" - "fmla v20.8h, v6.8h, v11.8h\n" - "fmla v18.8h, v5.8h, v11.8h\n" - "fmla v17.8h, v4.8h, v11.8h\n" - "fmla v16.8h, v3.8h, v11.8h\n" - "tbz %x[n_channels], #1, 61f\n" + "104:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: End + "fmla v24.8h, v8.8h, v11.8h\n" + "fmla v25.8h, v7.8h, v11.8h\n" + "add x19, x11, x24\n" + "fmla v26.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" + "fmla v29.8h, v4.8h, v11.8h\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "tbz %x[n_channels], #2, 106f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 105f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 108f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 108f\n" + "105:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 108f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 108f\n" + "106:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 107f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 62f\n" + "tbz %x[n_channels], #0, 108f\n" "ld1 { v12.h }[2], [x19]\n" - "b 62f\n" - "61:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 1: Unset + "b 108f\n" + "107:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "62:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 1: End - "fmla v18.8h, v8.8h, v12.8h\n" - "add x19, x15, x6\n" - "fmla v17.8h, v7.8h, v12.8h\n" - "fmla v16.8h, v6.8h, v12.8h\n" - "tbz %x[n_channels], #1, 63f\n" + "108:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: End + "fmla v23.8h, v8.8h, v12.8h\n" + "fmla v27.8h, v5.8h, v12.8h\n" + "add x19, x25, x16\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "tbz %x[n_channels], #2, 110f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 109f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 112f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 112f\n" + "109:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 112f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 112f\n" + "110:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 111f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 64f\n" + "tbz %x[n_channels], #0, 112f\n" "ld1 { v10.h }[2], [x19]\n" - "b 64f\n" - "63:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 1: Unset + "b 112f\n" + "111:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "64:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 1: End - "fmla v31.8h, v4.8h, v10.8h\n" - "add x19, x15, x28\n" - "fmla v30.8h, v3.8h, v10.8h\n" - "fmla v27.8h, v1.8h, v10.8h\n" - "fmla v26.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 65f\n" + "112:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: End + "fmla v28.8h, v8.8h, v10.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "add x19, x28, x10\n" + "fmla v30.8h, v6.8h, v10.8h\n" + "tbz %x[n_channels], #2, 114f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 113f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 116f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 116f\n" + "113:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 116f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 116f\n" + "114:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 115f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 66f\n" + "tbz %x[n_channels], #0, 116f\n" "ld1 { v11.h }[2], [x19]\n" - "b 66f\n" - "65:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 1: Unset + "b 116f\n" + "115:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "66:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 1: End + "116:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: End + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v26.8h, v7.8h, v11.8h\n" + "add x19, x25, x10\n" + "fmla v27.8h, v6.8h, v11.8h\n" "fmla v29.8h, v5.8h, v11.8h\n" - "add x19, x12, x6\n" - "fmla v28.8h, v4.8h, v11.8h\n" - "fmla v25.8h, v2.8h, v11.8h\n" - "fmla v24.8h, v1.8h, v11.8h\n" - "tbz %x[n_channels], #1, 67f\n" + "fmla v30.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v11.8h\n" + "tbz %x[n_channels], #2, 118f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 117f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 120f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 120f\n" + "117:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 120f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 120f\n" + "118:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 119f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 68f\n" + "tbz %x[n_channels], #0, 120f\n" "ld1 { v12.h }[2], [x19]\n" - "b 68f\n" - "67:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 1: Unset + "b 120f\n" + "119:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "68:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 1: End - "fmla v23.8h, v7.8h, v12.8h\n" - "add x19, x12, x28\n" - "fmla v22.8h, v6.8h, v12.8h\n" - "fmla v19.8h, v4.8h, v12.8h\n" - "fmla v18.8h, v3.8h, v12.8h\n" - "tbz %x[n_channels], #1, 69f\n" + "120:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: End + "fmla v29.8h, v8.8h, v12.8h\n" + "fmla v30.8h, v7.8h, v12.8h\n" + "add x19, x14, x5\n" + "fmla v31.8h, v6.8h, v12.8h\n" + "tbz %x[n_channels], #2, 122f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 121f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 124f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 124f\n" + "121:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 124f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 124f\n" + "122:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 123f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 70f\n" + "tbz %x[n_channels], #0, 124f\n" "ld1 { v10.h }[2], [x19]\n" - "b 70f\n" - "69:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 1: Unset + "b 124f\n" + "123:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "70:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 1: End - "fmla v21.8h, v8.8h, v10.8h\n" - "fmla v20.8h, v7.8h, v10.8h\n" - "fmla v17.8h, v5.8h, v10.8h\n" + "124:" // Tile loop: Oddments: Load inputs: (1, 1): Bit 2: End "fmla v16.8h, v4.8h, v10.8h\n" - "fmax v31.8h, v31.8h, v15.8h\n" - "fmax v30.8h, v30.8h, v15.8h\n" - "fmax v29.8h, v29.8h, v15.8h\n" - "fmin v31.8h, v31.8h, v14.8h\n" - "fmin v30.8h, v30.8h, v14.8h\n" - "fmin v29.8h, v29.8h, v14.8h\n" - "fmax v28.8h, v28.8h, v15.8h\n" - "fmax v27.8h, v27.8h, v15.8h\n" - "fmax v26.8h, v26.8h, v15.8h\n" - "fmin v28.8h, v28.8h, v14.8h\n" - "fmin v27.8h, v27.8h, v14.8h\n" - "fmin v26.8h, v26.8h, v14.8h\n" - "fmax v25.8h, v25.8h, v15.8h\n" - "fmax v24.8h, v24.8h, v15.8h\n" - "fmax v23.8h, v23.8h, v15.8h\n" - "fmin v25.8h, v25.8h, v14.8h\n" - "fmin v24.8h, v24.8h, v14.8h\n" - "fmin v23.8h, v23.8h, v14.8h\n" - "fmax v22.8h, v22.8h, v15.8h\n" - "fmax v21.8h, v21.8h, v15.8h\n" - "fmax v20.8h, v20.8h, v15.8h\n" - "fmin v22.8h, v22.8h, v14.8h\n" - "fmin v21.8h, v21.8h, v14.8h\n" - "fmin v20.8h, v20.8h, v14.8h\n" - "fmax v19.8h, v19.8h, v15.8h\n" - "fmax v18.8h, v18.8h, v15.8h\n" - "fmax v17.8h, v17.8h, v15.8h\n" - "fmin v19.8h, v19.8h, v14.8h\n" - "fmin v18.8h, v18.8h, v14.8h\n" - "fmin v17.8h, v17.8h, v14.8h\n" + "fmla v17.8h, v3.8h, v10.8h\n" + "add x19, x14, x27\n" + "fmla v20.8h, v1.8h, v10.8h\n" + "fmla v21.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 126f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 125f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 128f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 128f\n" + "125:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 128f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 128f\n" + "126:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 127f\n" + "ldr s11, [x19], #0x4\n" + "tbz %x[n_channels], #0, 128f\n" + "ld1 { v11.h }[2], [x19]\n" + "b 128f\n" + "127:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Unset: Bit 1: Unset + "ldr h11, [x19, #0x0]\n" + "128:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: End + "fmla v18.8h, v5.8h, v11.8h\n" + "fmla v19.8h, v4.8h, v11.8h\n" + "add x19, x28, x5\n" + "fmla v22.8h, v2.8h, v11.8h\n" + "fmla v23.8h, v1.8h, v11.8h\n" + "tbz %x[n_channels], #2, 130f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 129f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 132f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 132f\n" + "129:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 132f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 132f\n" + "130:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 131f\n" + "ldr s12, [x19], #0x4\n" + "tbz %x[n_channels], #0, 132f\n" + "ld1 { v12.h }[2], [x19]\n" + "b 132f\n" + "131:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Unset: Bit 1: Unset + "ldr h12, [x19, #0x0]\n" + "132:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: End + "fmla v24.8h, v7.8h, v12.8h\n" + "fmla v25.8h, v6.8h, v12.8h\n" + "add x19, x28, x27\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "tbz %x[n_channels], #2, 134f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 133f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 136f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 136f\n" + "133:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 136f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 136f\n" + "134:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 135f\n" + "ldr s10, [x19], #0x4\n" + "tbz %x[n_channels], #0, 136f\n" + "ld1 { v10.h }[2], [x19]\n" + "b 136f\n" + "135:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Unset: Bit 1: Unset + "ldr h10, [x19, #0x0]\n" + "136:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: End + "fmla v26.8h, v8.8h, v10.8h\n" + "fmla v27.8h, v7.8h, v10.8h\n" "fmax v16.8h, v16.8h, v15.8h\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "fmax v17.8h, v17.8h, v15.8h\n" + "fmax v18.8h, v18.8h, v15.8h\n" + "fmax v19.8h, v19.8h, v15.8h\n" + "fmax v20.8h, v20.8h, v15.8h\n" + "fmax v21.8h, v21.8h, v15.8h\n" + "fmax v22.8h, v22.8h, v15.8h\n" + "fmax v23.8h, v23.8h, v15.8h\n" + "fmax v24.8h, v24.8h, v15.8h\n" + "fmax v25.8h, v25.8h, v15.8h\n" + "fmax v26.8h, v26.8h, v15.8h\n" + "fmax v27.8h, v27.8h, v15.8h\n" + "fmax v28.8h, v28.8h, v15.8h\n" + "fmax v29.8h, v29.8h, v15.8h\n" + "fmax v30.8h, v30.8h, v15.8h\n" + "fmax v31.8h, v31.8h, v15.8h\n" "fmin v16.8h, v16.8h, v14.8h\n" - "tbz %x[n_channels], #1, 71f\n" - "mov x19, x16\n" - "st1 { v31.s }[0], [x19], x17\n" - "add x16, x16, #0x4\n" - "st1 { v30.s }[0], [x19], x17\n" - "mov x21, x26\n" - "st1 { v29.s }[0], [x19], x17\n" - "st1 { v27.s }[0], [x21], x17\n" + "fmin v17.8h, v17.8h, v14.8h\n" + "fmin v18.8h, v18.8h, v14.8h\n" + "fmin v19.8h, v19.8h, v14.8h\n" + "fmin v20.8h, v20.8h, v14.8h\n" + "fmin v21.8h, v21.8h, v14.8h\n" + "fmin v22.8h, v22.8h, v14.8h\n" + "fmin v23.8h, v23.8h, v14.8h\n" + "fmin v24.8h, v24.8h, v14.8h\n" + "fmin v25.8h, v25.8h, v14.8h\n" + "fmin v26.8h, v26.8h, v14.8h\n" + "fmin v27.8h, v27.8h, v14.8h\n" + "fmin v28.8h, v28.8h, v14.8h\n" + "fmin v29.8h, v29.8h, v14.8h\n" + "fmin v30.8h, v30.8h, v14.8h\n" + "fmin v31.8h, v31.8h, v14.8h\n" + "tbz %x[n_channels], #2, 138f\n" + "mov x22, x17\n" + "mov x21, x9\n" + "mov x20, x26\n" + "st1 { v16.d }[0], [x22], x6\n" + "mov x19, x23\n" + "st1 { v20.d }[0], [x21], x6\n" + "add x17, x17, #0x8\n" + "st1 { v24.d }[0], [x20], x6\n" + "add x9, x9, #0x8\n" + "add x26, x26, #0x8\n" + "st1 { v28.d }[0], [x19], x6\n" + "add x23, x23, #0x8\n" + "st1 { v17.d }[0], [x22], x6\n" + "st1 { v21.d }[0], [x21], x6\n" + "st1 { v25.d }[0], [x20], x6\n" + "st1 { v29.d }[0], [x19], x6\n" + "st1 { v18.d }[0], [x22], x6\n" + "st1 { v22.d }[0], [x21], x6\n" + "st1 { v26.d }[0], [x20], x6\n" + "st1 { v30.d }[0], [x19], x6\n" + "st1 { v19.d }[0], [x22]\n" + "st1 { v23.d }[0], [x21]\n" + "st1 { v27.d }[0], [x20]\n" + "st1 { v31.d }[0], [x19]\n" + "tbz %x[n_channels], #1, 137f\n" + "mov x22, x17\n" + "mov x21, x9\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v16.s }[2], [x22], x6\n" + "st1 { v20.s }[2], [x21], x6\n" + "add x17, x17, #0x4\n" + "add x9, x9, #0x4\n" + "st1 { v24.s }[2], [x20], x6\n" "add x26, x26, #0x4\n" - "st1 { v28.s }[0], [x19]\n" - "mov x20, x25\n" - "st1 { v26.s }[0], [x21], x17\n" - "add x25, x25, #0x4\n" - "st1 { v25.s }[0], [x21], x17\n" - "mov x19, x24\n" - "st1 { v24.s }[0], [x21]\n" - "add x24, x24, #0x4\n" - "st1 { v23.s }[0], [x20], x17\n" - "st1 { v22.s }[0], [x20], x17\n" - "st1 { v21.s }[0], [x20], x17\n" - "st1 { v20.s }[0], [x20]\n" - "st1 { v19.s }[0], [x19], x17\n" - "st1 { v18.s }[0], [x19], x17\n" - "st1 { v17.s }[0], [x19], x17\n" - "st1 { v16.s }[0], [x19]\n" - "tbz %x[n_channels], #0, 72f\n" - "mov x22, x16\n" - "st1 { v31.h }[2], [x22], x17\n" - "mov x21, x26\n" - "st1 { v30.h }[2], [x22], x17\n" - "st1 { v27.h }[2], [x21], x17\n" - "mov x20, x25\n" - "st1 { v29.h }[2], [x22], x17\n" - "mov x19, x24\n" - "st1 { v28.h }[2], [x22]\n" - "st1 { v26.h }[2], [x21], x17\n" - "st1 { v25.h }[2], [x21], x17\n" - "st1 { v24.h }[2], [x21]\n" - "st1 { v23.h }[2], [x20], x17\n" - "st1 { v22.h }[2], [x20], x17\n" - "st1 { v21.h }[2], [x20], x17\n" - "st1 { v20.h }[2], [x20]\n" - "st1 { v19.h }[2], [x19], x17\n" - "st1 { v18.h }[2], [x19], x17\n" - "st1 { v17.h }[2], [x19], x17\n" - "st1 { v16.h }[2], [x19]\n" - "b 72f\n" - "71:" // Tile loop: Oddments: Store: Bit 1: Unset - "mov x22, x16\n" - "st1 { v31.h }[0], [x22], x17\n" - "mov x21, x26\n" - "mov x20, x25\n" - "st1 { v30.h }[0], [x22], x17\n" - "st1 { v27.h }[0], [x21], x17\n" - "mov x19, x24\n" - "st1 { v29.h }[0], [x22], x17\n" - "st1 { v28.h }[0], [x22]\n" - "st1 { v26.h }[0], [x21], x17\n" - "st1 { v25.h }[0], [x21], x17\n" - "st1 { v24.h }[0], [x21]\n" - "st1 { v23.h }[0], [x20], x17\n" - "st1 { v22.h }[0], [x20], x17\n" - "st1 { v21.h }[0], [x20], x17\n" - "st1 { v20.h }[0], [x20]\n" - "st1 { v19.h }[0], [x19], x17\n" - "st1 { v18.h }[0], [x19], x17\n" - "st1 { v17.h }[0], [x19], x17\n" - "st1 { v16.h }[0], [x19]\n" - "72:" // Tile loop: Oddments: Store: Bit 1: End + "add x23, x23, #0x4\n" + "st1 { v28.s }[2], [x19], x6\n" + "st1 { v17.s }[2], [x22], x6\n" + "st1 { v21.s }[2], [x21], x6\n" + "st1 { v25.s }[2], [x20], x6\n" + "st1 { v29.s }[2], [x19], x6\n" + "st1 { v18.s }[2], [x22], x6\n" + "st1 { v22.s }[2], [x21], x6\n" + "st1 { v26.s }[2], [x20], x6\n" + "st1 { v30.s }[2], [x19], x6\n" + "st1 { v19.s }[2], [x22]\n" + "st1 { v23.s }[2], [x21]\n" + "st1 { v27.s }[2], [x20]\n" + "st1 { v31.s }[2], [x19]\n" + "tbz %x[n_channels], #0, 140f\n" + "mov x22, x17\n" + "mov x21, x9\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v16.h }[6], [x22], x6\n" + "st1 { v20.h }[6], [x21], x6\n" + "st1 { v24.h }[6], [x20], x6\n" + "st1 { v28.h }[6], [x19], x6\n" + "st1 { v17.h }[6], [x22], x6\n" + "st1 { v21.h }[6], [x21], x6\n" + "st1 { v25.h }[6], [x20], x6\n" + "st1 { v29.h }[6], [x19], x6\n" + "st1 { v18.h }[6], [x22], x6\n" + "st1 { v22.h }[6], [x21], x6\n" + "st1 { v26.h }[6], [x20], x6\n" + "st1 { v30.h }[6], [x19], x6\n" + "st1 { v19.h }[6], [x22]\n" + "st1 { v23.h }[6], [x21]\n" + "st1 { v27.h }[6], [x20]\n" + "st1 { v31.h }[6], [x19]\n" + "b 140f\n" + "137:" // Tile loop: Oddments: Store: Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 140f\n" + "mov x22, x17\n" + "mov x21, x9\n" + "st1 { v16.h }[4], [x22], x6\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v20.h }[4], [x21], x6\n" + "st1 { v24.h }[4], [x20], x6\n" + "st1 { v28.h }[4], [x19], x6\n" + "st1 { v17.h }[4], [x22], x6\n" + "st1 { v21.h }[4], [x21], x6\n" + "st1 { v25.h }[4], [x20], x6\n" + "st1 { v29.h }[4], [x19], x6\n" + "st1 { v18.h }[4], [x22], x6\n" + "st1 { v22.h }[4], [x21], x6\n" + "st1 { v26.h }[4], [x20], x6\n" + "st1 { v30.h }[4], [x19], x6\n" + "st1 { v19.h }[4], [x22]\n" + "st1 { v23.h }[4], [x21]\n" + "st1 { v27.h }[4], [x20]\n" + "st1 { v31.h }[4], [x19]\n" + "b 140f\n" + "138:" // Tile loop: Oddments: Store: Bit 2: Unset + "tbz %x[n_channels], #1, 139f\n" + "mov x22, x17\n" + "mov x21, x9\n" + "st1 { v16.s }[0], [x22], x6\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v20.s }[0], [x21], x6\n" + "st1 { v24.s }[0], [x20], x6\n" + "add x17, x17, #0x4\n" + "add x9, x9, #0x4\n" + "st1 { v28.s }[0], [x19], x6\n" + "add x26, x26, #0x4\n" + "add x23, x23, #0x4\n" + "st1 { v17.s }[0], [x22], x6\n" + "st1 { v21.s }[0], [x21], x6\n" + "st1 { v25.s }[0], [x20], x6\n" + "st1 { v29.s }[0], [x19], x6\n" + "st1 { v18.s }[0], [x22], x6\n" + "st1 { v22.s }[0], [x21], x6\n" + "st1 { v26.s }[0], [x20], x6\n" + "st1 { v30.s }[0], [x19], x6\n" + "st1 { v19.s }[0], [x22]\n" + "st1 { v23.s }[0], [x21]\n" + "st1 { v27.s }[0], [x20]\n" + "st1 { v31.s }[0], [x19]\n" + "tbz %x[n_channels], #0, 140f\n" + "mov x22, x17\n" + "mov x21, x9\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v16.h }[2], [x22], x6\n" + "st1 { v20.h }[2], [x21], x6\n" + "st1 { v24.h }[2], [x20], x6\n" + "st1 { v28.h }[2], [x19], x6\n" + "st1 { v17.h }[2], [x22], x6\n" + "st1 { v21.h }[2], [x21], x6\n" + "st1 { v25.h }[2], [x20], x6\n" + "st1 { v29.h }[2], [x19], x6\n" + "st1 { v18.h }[2], [x22], x6\n" + "st1 { v22.h }[2], [x21], x6\n" + "st1 { v26.h }[2], [x20], x6\n" + "st1 { v30.h }[2], [x19], x6\n" + "st1 { v19.h }[2], [x22]\n" + "st1 { v23.h }[2], [x21]\n" + "st1 { v27.h }[2], [x20]\n" + "st1 { v31.h }[2], [x19]\n" + "b 140f\n" + "139:" // Tile loop: Oddments: Store: Bit 2: Unset: Bit 1: Unset + "mov x22, x17\n" + "mov x21, x9\n" + "st1 { v16.h }[0], [x22], x6\n" + "mov x20, x26\n" + "mov x19, x23\n" + "st1 { v20.h }[0], [x21], x6\n" + "st1 { v24.h }[0], [x20], x6\n" + "st1 { v28.h }[0], [x19], x6\n" + "st1 { v17.h }[0], [x22], x6\n" + "st1 { v21.h }[0], [x21], x6\n" + "st1 { v25.h }[0], [x20], x6\n" + "st1 { v29.h }[0], [x19], x6\n" + "st1 { v18.h }[0], [x22], x6\n" + "st1 { v22.h }[0], [x21], x6\n" + "st1 { v26.h }[0], [x20], x6\n" + "st1 { v30.h }[0], [x19], x6\n" + "st1 { v19.h }[0], [x22]\n" + "st1 { v23.h }[0], [x21]\n" + "st1 { v27.h }[0], [x20]\n" + "st1 { v31.h }[0], [x19]\n" + "140:" // Tile loop: Oddments: Store: Bit 2: End - "73:" // Tile loop: End - "ldr x4, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "add x21, x4, #0x1\n" - "ldr x26, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" - "add x26, x26, #0x1\n" + "141:" // Tile loop: End + "ldr x25, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x26, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "add x25, x25, #0x1\n" + "add x20, x26, #0x1\n" "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" + "cmp x25, x19\n" + "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" + "csel x26, x26, x20, LT\n" + "csel x25, x25, XZR, LT\n" "cmp x26, x19\n" - "csel x26, x26, XZR, LT\n" - "csel x4, x4, x21, LT\n" - "cmp x4, x20\n" "blt 1b\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" + : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" ); } diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp index 40c019a36c..2e877285ae 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp @@ -98,1294 +98,1904 @@ void a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl( activation_min, activation_max); __asm__ __volatile__( - "ldr x17, [%x[params_struct], %[offsetof_args_outptrs]]\n" - "add x16, %x[params_struct], %[offsetof_Args_inptrs]\n" - "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" + "mov x17, #0x10\n" // cntb _, ALL, #1 + "lsr x16, %x[n_channels], #0x3\n" + "ldr x15, [%x[params_struct], %[offsetof_args_outptrs]]\n" + "ldr x14, [%x[params_struct], %[offsetof_args_params]]\n" "add x20, %x[params_struct], %[offsetof_args_min]\n" "add x19, %x[params_struct], %[offsetof_args_max]\n" "ld1r { v15.8h }, [x20]\n" "ld1r { v14.8h }, [x19]\n" - "mov x14, #0x0\n" - "mov x13, #0x10\n" // cntb _, ALL, #1 - "sub x12, XZR, x13\n" - "lsr x11, %x[n_channels], #0x3\n" - "cbz x11, 3f\n" - "ldr q13, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "cmp x13, x11, LSL #4\n" - "ldr q1, [x15, #0x20]\n" - "ldr q2, [x15, #0x30]\n" - "ldr q3, [x15, #0x40]\n" - "ldr q4, [x15, #0x50]\n" - "ldr q5, [x15, #0x60]\n" - "ldr q6, [x15, #0x70]\n" - "ldr q7, [x15, #0x80]\n" - "ldr q8, [x15, #0x90]\n" - "add x15, x15, #0xa0\n" - "ldp x10, x9, [x16, #0x0]\n" - "ldp x28, x27, [x16, #0x10]\n" - "ldr q9, [x10, x14]\n" - "ldr q10, [x9, x14]\n" - "ldr q11, [x28, x14]\n" - "ldr q12, [x27, x14]\n" + "add x13, %x[params_struct], %[offsetof_Args_inptrs]\n" + "mov x12, #0x0\n" + "sub x11, XZR, x17\n" + "cbz x16, 3f\n" + "ldp x10, x9, [x13, #0x0]\n" + "ldp x28, x27, [x13, #0x10]\n" + "cmp x17, x16, LSL #4\n" + "ldr q13, [x14, #0x0]\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "ldr q2, [x14, #0x30]\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "add x14, x14, #0xa0\n" + "ldr q9, [x10, x12]\n" + "ldr q10, [x9, x12]\n" + "ldr q11, [x28, x12]\n" + "ldr q12, [x27, x12]\n" "bge 2f\n" "1:" // Channel loop - "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "ldr x26, [x16, #0x20]\n" - "add x12, x12, #0x10\n" - "mov v30.16b, v13.16b\n fmla v30.8h, v7.8h, v9.8h\n" - "ldr x25, [x16, #0x28]\n" - "mov v29.16b, v13.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "ldr x24, [x16, #0x30]\n" - "mov v27.16b, v13.16b\n fmla v27.8h, v5.8h, v9.8h\n" - "ldr x23, [x16, #0x38]\n" - "mov v26.16b, v13.16b\n fmla v26.8h, v4.8h, v9.8h\n" - "ldr x10, [x16, #0x40]\n" - "mov v25.16b, v13.16b\n fmla v25.8h, v3.8h, v9.8h\n" - "ldr x9, [x16, #0x48]\n" - "mov v23.16b, v13.16b\n fmla v23.8h, v2.8h, v9.8h\n" - "ldr x28, [x16, #0x50]\n" - "mov v22.16b, v13.16b\n fmla v22.8h, v1.8h, v9.8h\n" - "ldr x27, [x16, #0x58]\n" - "mov v21.16b, v13.16b\n fmla v21.8h, v0.8h, v9.8h\n" - "ldr q9, [x24, x14]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr q10, [x26, x14]\n" - "mov v28.16b, v13.16b\n fmla v28.8h, v2.8h, v11.8h\n" - "ldr q11, [x25, x14]\n" - "fmla v30.8h, v8.8h, v12.8h\n" - "ldr x26, [x16, #0x60]\n" - "fmla v29.8h, v7.8h, v12.8h\n" - "ldr x25, [x16, #0x68]\n" - "fmla v26.8h, v5.8h, v12.8h\n" - "ldr x24, [x16, #0x70]\n" - "fmla v28.8h, v6.8h, v12.8h\n" - "ldr x22, [x17, #0x0]\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "ldr x21, [x17, #0x8]\n" - "mov v24.16b, v13.16b\n fmla v24.8h, v3.8h, v12.8h\n" - "ldr x20, [x17, #0x10]\n" - "fmla v22.8h, v2.8h, v12.8h\n" - "ldr x19, [x17, #0x18]\n" - "fmla v21.8h, v1.8h, v12.8h\n" - "mov v20.16b, v13.16b\n fmla v20.8h, v0.8h, v12.8h\n" - "ldr q12, [x23, x14]\n" - "mov v19.16b, v13.16b\n fmla v19.8h, v6.8h, v10.8h\n" - "ldr q10, [x9, x14]\n" - "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v11.8h\n" - "ldr q11, [x10, x14]\n" - "fmla v27.8h, v8.8h, v9.8h\n" - "ldr x23, [x16, #0x78]\n" - "fmla v26.8h, v7.8h, v9.8h\n" - "ldr x10, [x16, #0x80]\n" - "fmla v25.8h, v6.8h, v9.8h\n" - "ldr x9, [x16, #0x88]\n" - "fmla v23.8h, v5.8h, v9.8h\n" - "fmla v22.8h, v4.8h, v9.8h\n" - "fmla v21.8h, v3.8h, v9.8h\n" - "fmla v19.8h, v2.8h, v9.8h\n" - "mov v18.16b, v13.16b\n fmla v18.8h, v1.8h, v9.8h\n" - "mov v17.16b, v13.16b\n fmla v17.8h, v0.8h, v9.8h\n" - "ldr q9, [x28, x14]\n" - "fmla v31.8h, v1.8h, v12.8h\n" - "ldr x28, [x16, #0x90]\n" - "fmla v30.8h, v0.8h, v12.8h\n" - "ldr q12, [x27, x14]\n" - "fmla v29.8h, v2.8h, v11.8h\n" - "ldr x27, [x16, #0x98]\n" - "fmla v28.8h, v1.8h, v11.8h\n" - "ldr q11, [x26, x14]\n" - "fmla v26.8h, v8.8h, v10.8h\n" - "ldr x26, [x16, #0xa0]\n" - "fmla v25.8h, v7.8h, v10.8h\n" - "ldr q13, [x15, #0x0]\n" - "fmla v24.8h, v6.8h, v10.8h\n" - "fmla v22.8h, v5.8h, v10.8h\n" - "fmla v21.8h, v4.8h, v10.8h\n" - "fmla v20.8h, v3.8h, v10.8h\n" - "fmla v18.8h, v2.8h, v10.8h\n" - "fmla v17.8h, v1.8h, v10.8h\n" + "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" + "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v9.8h\n" + "ldr x26, [x13, #0x20]\n" + "ldr x25, [x13, #0x30]\n" + "mov v22.16b, v13.16b\n fmla v22.8h, v3.8h, v9.8h\n" + "mov v25.16b, v13.16b\n fmla v25.8h, v1.8h, v9.8h\n" + "ldr x24, [x13, #0x28]\n" + "ldr x23, [x13, #0x38]\n" + "mov v26.16b, v13.16b\n fmla v26.8h, v0.8h, v9.8h\n" + "mov v17.16b, v13.16b\n fmla v17.8h, v7.8h, v9.8h\n" + "ldr x10, [x13, #0x40]\n" + "ldr x9, [x13, #0x48]\n" + "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" + "fmla v21.8h, v5.8h, v12.8h\n" + "ldr x28, [x13, #0x50]\n" + "ldr x27, [x13, #0x58]\n" + "mov v20.16b, v13.16b\n fmla v20.8h, v5.8h, v9.8h\n" + "mov v24.16b, v13.16b\n fmla v24.8h, v2.8h, v9.8h\n" + "ldr q9, [x25, x12]\n" + "ldr x25, [x13, #0x70]\n" "fmla v16.8h, v0.8h, v10.8h\n" - "ldr q10, [x25, x14]\n" - "fmla v31.8h, v3.8h, v9.8h\n" - "ldr x25, [x16, #0xa8]\n" - "fmla v27.8h, v0.8h, v9.8h\n" - "fmla v28.8h, v5.8h, v12.8h\n" - "fmla v24.8h, v2.8h, v12.8h\n" - "ldr q12, [x23, x14]\n" - "fmla v23.8h, v6.8h, v11.8h\n" - "ldr x23, [x16, #0xb8]\n" - "fmla v19.8h, v3.8h, v11.8h\n" - "ldr q11, [x24, x14]\n" - "fmla v31.8h, v5.8h, v10.8h\n" - "ldr x24, [x16, #0xb0]\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v3.8h, v10.8h\n" - "fmla v27.8h, v2.8h, v10.8h\n" - "fmla v26.8h, v1.8h, v10.8h\n" - "fmla v25.8h, v0.8h, v10.8h\n" - "ldr q10, [x9, x14]\n" - "fmla v20.8h, v8.8h, v11.8h\n" - "ldr x9, [x16, #0xc8]\n" - "fmla v16.8h, v5.8h, v11.8h\n" - "ldr q11, [x10, x14]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr x10, [x16, #0xc0]\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "fmla v26.8h, v2.8h, v12.8h\n" - "fmla v25.8h, v1.8h, v12.8h\n" - "fmla v24.8h, v0.8h, v12.8h\n" - "ldr q12, [x27, x14]\n" - "fmla v19.8h, v7.8h, v11.8h\n" - "ldr x27, [x16, #0xd8]\n" - "fmla v18.8h, v6.8h, v11.8h\n" - "ldr q11, [x28, x14]\n" - "fmla v31.8h, v7.8h, v10.8h\n" - "ldr x28, [x16, #0xd0]\n" - "fmla v30.8h, v6.8h, v10.8h\n" - "fmla v27.8h, v4.8h, v10.8h\n" - "fmla v26.8h, v3.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" - "fmla v22.8h, v0.8h, v10.8h\n" - "ldr q10, [x26, x14]\n" - "fmla v17.8h, v8.8h, v11.8h\n" - "ldr x26, [x16, #0xe0]\n" - "fmla v16.8h, v7.8h, v11.8h\n" - "ldr q11, [x25, x14]\n" - "fmla v29.8h, v8.8h, v12.8h\n" - "ldr x25, [x16, #0xe8]\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "fmla v25.8h, v5.8h, v12.8h\n" - "fmla v24.8h, v4.8h, v12.8h\n" - "fmla v21.8h, v2.8h, v12.8h\n" - "fmla v20.8h, v1.8h, v12.8h\n" - "ldr q12, [x24, x14]\n" - "fmla v31.8h, v2.8h, v10.8h\n" - "ldr x24, [x16, #0xf0]\n" - "fmla v30.8h, v1.8h, v10.8h\n" - "fmla v29.8h, v0.8h, v10.8h\n" - "ldr q10, [x23, x14]\n" - "fmla v27.8h, v7.8h, v11.8h\n" - "ldr x23, [x16, #0xf8]\n" - "fmla v26.8h, v6.8h, v11.8h\n" - "fmla v23.8h, v4.8h, v11.8h\n" - "fmla v22.8h, v3.8h, v11.8h\n" + "mov v19.16b, v13.16b\n fmla v19.8h, v2.8h, v11.8h\n" + "ldr q10, [x26, x12]\n" + "ldr q11, [x24, x12]\n" + "fmla v22.8h, v4.8h, v12.8h\n" + "fmla v25.8h, v2.8h, v12.8h\n" + "ldr x26, [x13, #0x60]\n" + "ldr x24, [x13, #0x68]\n" + "fmla v26.8h, v1.8h, v12.8h\n" + "fmla v17.8h, v8.8h, v12.8h\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "fmla v18.8h, v7.8h, v12.8h\n" + "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" + "ldr q10, [x9, x12]\n" + "ldr x9, [x13, #0x88]\n" + "fmla v21.8h, v7.8h, v9.8h\n" + "fmla v19.8h, v6.8h, v12.8h\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "mov v23.16b, v13.16b\n fmla v23.8h, v3.8h, v12.8h\n" + "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" + "ldr q12, [x23, x12]\n" + "ldr x23, [x13, #0x78]\n" + "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" + "fmla v22.8h, v6.8h, v9.8h\n" + "ldr q11, [x10, x12]\n" + "ldr x10, [x13, #0x80]\n" + "fmla v25.8h, v4.8h, v9.8h\n" + "fmla v26.8h, v3.8h, v9.8h\n" + "add x11, x11, #0x10\n" + "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" + "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" + "ldr q13, [x14, #0x0]\n" + "fmla v20.8h, v8.8h, v9.8h\n" + "fmla v24.8h, v5.8h, v9.8h\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v16.8h, v1.8h, v12.8h\n" + "ldr q9, [x28, x12]\n" + "ldr x28, [x13, #0x90]\n" + "fmla v17.8h, v0.8h, v12.8h\n" + "fmla v18.8h, v2.8h, v11.8h\n" + "ldr q12, [x27, x12]\n" + "ldr x27, [x13, #0x98]\n" + "fmla v21.8h, v8.8h, v10.8h\n" "fmla v19.8h, v1.8h, v11.8h\n" - "fmla v18.8h, v0.8h, v11.8h\n" - "ldr q11, [x10, x14]\n" - "fmla v30.8h, v2.8h, v12.8h\n" - "ldr x10, [x16, #0x100]\n" - "fmla v29.8h, v1.8h, v12.8h\n" - "fmla v28.8h, v0.8h, v12.8h\n" - "ldr q12, [x9, x14]\n" - "fmla v31.8h, v6.8h, v10.8h\n" - "ldr x9, [x16, #0x108]\n" + "ldr q11, [x26, x12]\n" + "ldr x26, [x13, #0xa0]\n" + "fmla v22.8h, v7.8h, v10.8h\n" + "fmla v23.8h, v6.8h, v10.8h\n" + "fmla v25.8h, v5.8h, v10.8h\n" + "fmla v26.8h, v4.8h, v10.8h\n" "fmla v27.8h, v3.8h, v10.8h\n" - "fmla v23.8h, v0.8h, v10.8h\n" - "ldr q10, [x28, x14]\n" - "fmla v25.8h, v8.8h, v11.8h\n" - "ldr x28, [x16, #0x110]\n" - "fmla v24.8h, v7.8h, v11.8h\n" - "fmla v21.8h, v5.8h, v11.8h\n" - "fmla v20.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v2.8h, v11.8h\n" - "fmla v16.8h, v1.8h, v11.8h\n" - "ldr q11, [x27, x14]\n" - "fmla v28.8h, v8.8h, v12.8h\n" - "ldr x27, [x16, #0x118]\n" - "fmla v24.8h, v5.8h, v12.8h\n" - "fmla v20.8h, v2.8h, v12.8h\n" - "ldr q12, [x26, x14]\n" - "fmla v27.8h, v6.8h, v10.8h\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "fmla v19.8h, v0.8h, v10.8h\n" - "ldr q10, [x25, x14]\n" - "fmla v22.8h, v7.8h, v11.8h\n" - "fmla v21.8h, v6.8h, v11.8h\n" - "fmla v23.8h, v8.8h, v11.8h\n" - "fmla v19.8h, v5.8h, v11.8h\n" - "fmla v18.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v3.8h, v11.8h\n" - "ldr q11, [x24, x14]\n" - "fmla v24.8h, v8.8h, v12.8h\n" - "fmla v20.8h, v5.8h, v12.8h\n" - "fmla v16.8h, v2.8h, v12.8h\n" - "ldr q12, [x23, x14]\n" - "fmla v19.8h, v8.8h, v10.8h\n" - "fmla v18.8h, v7.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v10.8h\n" + "fmla v30.8h, v1.8h, v10.8h\n" + "fmla v31.8h, v0.8h, v10.8h\n" + "ldr q10, [x24, x12]\n" + "ldr x24, [x13, #0xa8]\n" + "fmla v16.8h, v3.8h, v9.8h\n" + "fmla v20.8h, v0.8h, v9.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "ldr q11, [x25, x12]\n" + "ldr x25, [x13, #0xb0]\n" + "fmla v17.8h, v4.8h, v10.8h\n" + "fmla v18.8h, v3.8h, v10.8h\n" + "fmla v21.8h, v1.8h, v10.8h\n" + "fmla v19.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v2.8h, v12.8h\n" + "fmla v22.8h, v0.8h, v10.8h\n" + "ldr q12, [x23, x12]\n" + "ldr x23, [x13, #0xb8]\n" + "fmla v27.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "ldr q11, [x10, x12]\n" + "ldr x10, [x13, #0xc0]\n" + "fmla v16.8h, v5.8h, v10.8h\n" + "fmla v20.8h, v2.8h, v10.8h\n" + "ldr q10, [x9, x12]\n" + "ldr x9, [x13, #0xc8]\n" + "fmla v17.8h, v5.8h, v12.8h\n" + "fmla v18.8h, v4.8h, v12.8h\n" + "fmla v21.8h, v2.8h, v12.8h\n" + "fmla v19.8h, v3.8h, v12.8h\n" + "fmla v22.8h, v1.8h, v12.8h\n" + "fmla v23.8h, v0.8h, v12.8h\n" + "ldr q12, [x27, x12]\n" + "ldr x27, [x13, #0xd8]\n" + "fmla v28.8h, v7.8h, v11.8h\n" + "fmla v29.8h, v6.8h, v11.8h\n" + "ldr q11, [x28, x12]\n" + "ldr x28, [x13, #0xd0]\n" + "fmla v16.8h, v7.8h, v10.8h\n" "fmla v17.8h, v6.8h, v10.8h\n" - "ldr q10, [x10, x14]\n" - "fmla v22.8h, v8.8h, v11.8h\n" - "fmla v21.8h, v7.8h, v11.8h\n" - "fmla v20.8h, v6.8h, v11.8h\n" - "fmla v18.8h, v5.8h, v11.8h\n" - "fmla v17.8h, v4.8h, v11.8h\n" - "fmla v16.8h, v3.8h, v11.8h\n" - "ldr q11, [x9, x14]\n" - "fmla v31.8h, v4.8h, v10.8h\n" - "ldp x10, x9, [x16, #0x0]\n" + "fmla v20.8h, v4.8h, v10.8h\n" + "fmla v21.8h, v3.8h, v10.8h\n" + "fmla v24.8h, v1.8h, v10.8h\n" + "fmla v25.8h, v0.8h, v10.8h\n" + "ldr q10, [x26, x12]\n" + "ldr x26, [x13, #0xe0]\n" "fmla v18.8h, v8.8h, v12.8h\n" - "ldr q9, [x10, x13]\n" - "fmla v17.8h, v7.8h, v12.8h\n" - "fmla v16.8h, v6.8h, v12.8h\n" - "ldr q12, [x28, x14]\n" - "fmla v30.8h, v3.8h, v10.8h\n" - "fmla v27.8h, v1.8h, v10.8h\n" - "fmla v26.8h, v0.8h, v10.8h\n" - "ldr q10, [x27, x14]\n" - "add x14, x14, #0x10\n" + "fmla v30.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v7.8h, v11.8h\n" + "ldr q11, [x24, x12]\n" + "fmla v27.8h, v1.8h, v12.8h\n" + "ldr x24, [x13, #0xe8]\n" + "fmla v19.8h, v7.8h, v12.8h\n" + "fmla v22.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v4.8h, v12.8h\n" + "fmla v26.8h, v2.8h, v12.8h\n" + "ldr q12, [x25, x12]\n" + "ldr x25, [x13, #0xf0]\n" + "fmla v16.8h, v2.8h, v10.8h\n" + "fmla v17.8h, v1.8h, v10.8h\n" + "fmla v18.8h, v0.8h, v10.8h\n" + "fmla v20.8h, v7.8h, v11.8h\n" + "ldr q10, [x23, x12]\n" + "ldr x23, [x13, #0xf8]\n" + "fmla v21.8h, v6.8h, v11.8h\n" + "fmla v24.8h, v4.8h, v11.8h\n" + "fmla v25.8h, v3.8h, v11.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v0.8h, v11.8h\n" + "ldr q11, [x10, x12]\n" + "fmla v27.8h, v4.8h, v11.8h\n" + "ldr x10, [x13, #0x100]\n" + "fmla v30.8h, v2.8h, v11.8h\n" + "fmla v17.8h, v2.8h, v12.8h\n" + "fmla v18.8h, v1.8h, v12.8h\n" + "fmla v19.8h, v0.8h, v12.8h\n" + "ldr q12, [x9, x12]\n" + "ldr x9, [x13, #0x108]\n" + "fmla v16.8h, v6.8h, v10.8h\n" + "fmla v20.8h, v3.8h, v10.8h\n" + "fmla v24.8h, v0.8h, v10.8h\n" + "fmla v22.8h, v8.8h, v11.8h\n" + "ldr q10, [x28, x12]\n" + "ldr x28, [x13, #0x110]\n" + "fmla v23.8h, v7.8h, v11.8h\n" + "fmla v26.8h, v5.8h, v11.8h\n" + "fmla v31.8h, v1.8h, v11.8h\n" + "ldr q11, [x27, x12]\n" + "fmla v27.8h, v2.8h, v12.8h\n" + "ldr x27, [x13, #0x118]\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v4.8h, v11.8h\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v19.8h, v8.8h, v12.8h\n" + "fmla v23.8h, v5.8h, v12.8h\n" + "fmla v20.8h, v6.8h, v10.8h\n" + "ldr q12, [x26, x12]\n" + "fmla v24.8h, v3.8h, v10.8h\n" + "ldr q10, [x24, x12]\n" + "fmla v25.8h, v7.8h, v11.8h\n" + "fmla v26.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" + "fmla v27.8h, v5.8h, v12.8h\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "fmla v30.8h, v6.8h, v10.8h\n" + "fmla v24.8h, v8.8h, v11.8h\n" + "ldr q11, [x25, x12]\n" + "fmla v28.8h, v8.8h, v10.8h\n" + "ldr q10, [x10, x12]\n" + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v26.8h, v7.8h, v11.8h\n" + "fmla v27.8h, v6.8h, v11.8h\n" "fmla v29.8h, v5.8h, v11.8h\n" - "ldp x28, x27, [x16, #0x10]\n" - "fmla v28.8h, v4.8h, v11.8h\n" - "ldr q0, [x15, #0x10]\n" - "fmla v25.8h, v2.8h, v11.8h\n" - "ldr q2, [x15, #0x30]\n" - "fmla v24.8h, v1.8h, v11.8h\n" - "ldr q11, [x28, x13]\n" - "fmla v23.8h, v7.8h, v12.8h\n" - "ldr q1, [x15, #0x20]\n" - "fmla v22.8h, v6.8h, v12.8h\n" - "ldr q6, [x15, #0x70]\n" - "fmla v19.8h, v4.8h, v12.8h\n" - "fmla v18.8h, v3.8h, v12.8h\n" - "ldr q12, [x27, x13]\n" - "fmla v21.8h, v8.8h, v10.8h\n" - "ldr q3, [x15, #0x40]\n" - "fmla v20.8h, v7.8h, v10.8h\n" - "ldr q7, [x15, #0x80]\n" - "fmla v17.8h, v5.8h, v10.8h\n" - "ldr q5, [x15, #0x60]\n" + "fmla v30.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v11.8h\n" + "ldr q11, [x9, x12]\n" + "ldp x10, x9, [x13, #0x0]\n" + "fmla v23.8h, v8.8h, v12.8h\n" + "ldr q12, [x23, x12]\n" "fmla v16.8h, v4.8h, v10.8h\n" - "ldr q10, [x9, x13]\n" - "add x13, x13, #0x10\n" - "fmax v31.8h, v31.8h, v15.8h\n" - "ldr q4, [x15, #0x50]\n" - "cmp x13, x11, LSL #4\n" - "fmax v30.8h, v30.8h, v15.8h\n" - "ldr q8, [x15, #0x90]\n" - "add x15, x15, #0xa0\n" - "fmax v29.8h, v29.8h, v15.8h\n" - "fmax v28.8h, v28.8h, v15.8h\n" - "fmin v31.8h, v31.8h, v14.8h\n" - "str q31, [x22, x12]\n" - "fmin v30.8h, v30.8h, v14.8h\n" - "fmin v29.8h, v29.8h, v14.8h\n" - "ldr x22, [x17, #0x20]\n" - "fmin v28.8h, v28.8h, v14.8h\n" - "str q30, [x21, x12]\n" - "fmax v27.8h, v27.8h, v15.8h\n" - "fmax v26.8h, v26.8h, v15.8h\n" - "str q29, [x20, x12]\n" - "fmax v25.8h, v25.8h, v15.8h\n" - "str q28, [x19, x12]\n" - "fmax v24.8h, v24.8h, v15.8h\n" - "ldr x21, [x17, #0x28]\n" - "fmin v27.8h, v27.8h, v14.8h\n" - "ldr x20, [x17, #0x30]\n" - "fmin v26.8h, v26.8h, v14.8h\n" - "ldr x19, [x17, #0x38]\n" - "fmin v25.8h, v25.8h, v14.8h\n" - "str q27, [x22, x12]\n" - "fmin v24.8h, v24.8h, v14.8h\n" - "str q26, [x21, x12]\n" - "fmax v23.8h, v23.8h, v15.8h\n" - "str q25, [x20, x12]\n" - "fmax v22.8h, v22.8h, v15.8h\n" - "str q24, [x19, x12]\n" - "fmax v21.8h, v21.8h, v15.8h\n" - "ldr x22, [x17, #0x40]\n" - "fmin v23.8h, v23.8h, v14.8h\n" - "ldr x21, [x17, #0x48]\n" - "fmin v22.8h, v22.8h, v14.8h\n" - "ldr x20, [x17, #0x50]\n" - "fmin v21.8h, v21.8h, v14.8h\n" - "str q23, [x22, x12]\n" - "fmax v20.8h, v20.8h, v15.8h\n" - "str q22, [x21, x12]\n" - "fmax v19.8h, v19.8h, v15.8h\n" - "str q21, [x20, x12]\n" - "fmax v18.8h, v18.8h, v15.8h\n" - "ldr x19, [x17, #0x58]\n" - "fmin v20.8h, v20.8h, v14.8h\n" - "ldr x22, [x17, #0x60]\n" - "fmin v19.8h, v19.8h, v14.8h\n" - "ldr x21, [x17, #0x68]\n" - "fmin v18.8h, v18.8h, v14.8h\n" - "str q20, [x19, x12]\n" - "fmax v17.8h, v17.8h, v15.8h\n" - "str q19, [x22, x12]\n" "fmax v16.8h, v16.8h, v15.8h\n" - "str q18, [x21, x12]\n" - "ldr x20, [x17, #0x70]\n" - "fmin v17.8h, v17.8h, v14.8h\n" - "ldr x19, [x17, #0x78]\n" + "fmla v17.8h, v3.8h, v10.8h\n" + "fmla v18.8h, v5.8h, v11.8h\n" + "fmax v17.8h, v17.8h, v15.8h\n" + "ldr q9, [x10, x17]\n" + "fmla v19.8h, v4.8h, v11.8h\n" + "fmla v29.8h, v8.8h, v12.8h\n" + "fmax v18.8h, v18.8h, v15.8h\n" + "fmla v30.8h, v7.8h, v12.8h\n" + "fmla v31.8h, v6.8h, v12.8h\n" + "ldr q12, [x28, x12]\n" + "fmax v19.8h, v19.8h, v15.8h\n" + "fmla v20.8h, v1.8h, v10.8h\n" + "fmla v21.8h, v0.8h, v10.8h\n" + "ldr q10, [x27, x12]\n" "fmin v16.8h, v16.8h, v14.8h\n" - "str q17, [x20, x12]\n" - "str q16, [x19, x12]\n" + "fmla v22.8h, v2.8h, v11.8h\n" + "fmla v23.8h, v1.8h, v11.8h\n" + "fmin v17.8h, v17.8h, v14.8h\n" + "str q16, [x22, x11]\n" + "fmla v24.8h, v7.8h, v12.8h\n" + "fmla v25.8h, v6.8h, v12.8h\n" + "fmin v18.8h, v18.8h, v14.8h\n" + "str q17, [x21, x11]\n" + "fmla v26.8h, v8.8h, v10.8h\n" + "fmla v27.8h, v7.8h, v10.8h\n" + "fmin v19.8h, v19.8h, v14.8h\n" + "str q18, [x20, x11]\n" + "fmax v20.8h, v20.8h, v15.8h\n" + "fmax v21.8h, v21.8h, v15.8h\n" + "str q19, [x19, x11]\n" + "ldr x22, [x15, #0x20]\n" + "fmax v22.8h, v22.8h, v15.8h\n" + "fmax v23.8h, v23.8h, v15.8h\n" + "ldr x21, [x15, #0x28]\n" + "ldr x20, [x15, #0x30]\n" + "ldr x19, [x15, #0x38]\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "fmin v20.8h, v20.8h, v14.8h\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "fmin v21.8h, v21.8h, v14.8h\n" + "str q20, [x22, x11]\n" + "fmin v22.8h, v22.8h, v14.8h\n" + "fmin v23.8h, v23.8h, v14.8h\n" + "str q21, [x21, x11]\n" + "ldr x22, [x15, #0x40]\n" + "fmax v24.8h, v24.8h, v15.8h\n" + "fmax v25.8h, v25.8h, v15.8h\n" + "str q22, [x20, x11]\n" + "ldr x21, [x15, #0x48]\n" + "fmax v26.8h, v26.8h, v15.8h\n" + "fmax v27.8h, v27.8h, v15.8h\n" + "str q23, [x19, x11]\n" + "ldr x20, [x15, #0x50]\n" + "ldr x19, [x15, #0x58]\n" + "ldp x28, x27, [x13, #0x10]\n" + "fmin v24.8h, v24.8h, v14.8h\n" + "fmin v25.8h, v25.8h, v14.8h\n" + "fmin v26.8h, v26.8h, v14.8h\n" + "fmin v27.8h, v27.8h, v14.8h\n" + "str q24, [x22, x11]\n" + "ldr x22, [x15, #0x60]\n" + "fmax v28.8h, v28.8h, v15.8h\n" + "fmax v29.8h, v29.8h, v15.8h\n" + "str q25, [x21, x11]\n" + "ldr x21, [x15, #0x68]\n" + "fmax v30.8h, v30.8h, v15.8h\n" + "fmax v31.8h, v31.8h, v15.8h\n" + "str q26, [x20, x11]\n" + "ldr x20, [x15, #0x70]\n" + "str q27, [x19, x11]\n" + "ldr x19, [x15, #0x78]\n" + "ldr q10, [x9, x17]\n" + "fmin v28.8h, v28.8h, v14.8h\n" + "ldr q11, [x28, x17]\n" + "ldr q12, [x27, x17]\n" + "add x17, x17, #0x10\n" + "cmp x17, x16, LSL #4\n" + "fmin v29.8h, v29.8h, v14.8h\n" + "fmin v30.8h, v30.8h, v14.8h\n" + "add x12, x12, #0x10\n" + "str q28, [x22, x11]\n" + "fmin v31.8h, v31.8h, v14.8h\n" + "str q29, [x21, x11]\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "str q30, [x20, x11]\n" + "ldr q2, [x14, #0x30]\n" + "ldr q3, [x14, #0x40]\n" + "str q31, [x19, x11]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "add x14, x14, #0xa0\n" "blt 1b\n" "2:" // Channel tail - "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "ldr x26, [x16, #0x20]\n" - "add x12, x12, #0x10\n" - "mov v30.16b, v13.16b\n fmla v30.8h, v7.8h, v9.8h\n" - "ldr x25, [x16, #0x28]\n" - "mov v29.16b, v13.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "ldr x24, [x16, #0x30]\n" - "mov v27.16b, v13.16b\n fmla v27.8h, v5.8h, v9.8h\n" - "ldr x23, [x16, #0x38]\n" - "mov v26.16b, v13.16b\n fmla v26.8h, v4.8h, v9.8h\n" - "ldr x10, [x16, #0x40]\n" - "mov v25.16b, v13.16b\n fmla v25.8h, v3.8h, v9.8h\n" - "ldr x9, [x16, #0x48]\n" - "mov v23.16b, v13.16b\n fmla v23.8h, v2.8h, v9.8h\n" - "ldr x28, [x16, #0x50]\n" - "mov v22.16b, v13.16b\n fmla v22.8h, v1.8h, v9.8h\n" - "ldr x27, [x16, #0x58]\n" - "mov v21.16b, v13.16b\n fmla v21.8h, v0.8h, v9.8h\n" - "ldr q9, [x24, x14]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr q10, [x26, x14]\n" - "mov v28.16b, v13.16b\n fmla v28.8h, v2.8h, v11.8h\n" - "ldr q11, [x25, x14]\n" - "fmla v30.8h, v8.8h, v12.8h\n" - "ldr x26, [x16, #0x60]\n" - "fmla v29.8h, v7.8h, v12.8h\n" - "ldr x25, [x16, #0x68]\n" - "fmla v26.8h, v5.8h, v12.8h\n" - "ldr x24, [x16, #0x70]\n" - "fmla v28.8h, v6.8h, v12.8h\n" - "ldr x22, [x17, #0x0]\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "ldr x21, [x17, #0x8]\n" - "mov v24.16b, v13.16b\n fmla v24.8h, v3.8h, v12.8h\n" - "ldr x20, [x17, #0x10]\n" - "fmla v22.8h, v2.8h, v12.8h\n" - "ldr x19, [x17, #0x18]\n" - "fmla v21.8h, v1.8h, v12.8h\n" - "mov v20.16b, v13.16b\n fmla v20.8h, v0.8h, v12.8h\n" - "ldr q12, [x23, x14]\n" - "mov v19.16b, v13.16b\n fmla v19.8h, v6.8h, v10.8h\n" - "ldr q10, [x9, x14]\n" - "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v11.8h\n" - "ldr q11, [x10, x14]\n" - "fmla v27.8h, v8.8h, v9.8h\n" - "ldr x23, [x16, #0x78]\n" - "fmla v26.8h, v7.8h, v9.8h\n" - "ldr x10, [x16, #0x80]\n" - "fmla v25.8h, v6.8h, v9.8h\n" - "ldr x9, [x16, #0x88]\n" - "fmla v23.8h, v5.8h, v9.8h\n" - "fmla v22.8h, v4.8h, v9.8h\n" - "fmla v21.8h, v3.8h, v9.8h\n" - "fmla v19.8h, v2.8h, v9.8h\n" - "mov v18.16b, v13.16b\n fmla v18.8h, v1.8h, v9.8h\n" - "mov v17.16b, v13.16b\n fmla v17.8h, v0.8h, v9.8h\n" - "ldr q9, [x28, x14]\n" - "fmla v31.8h, v1.8h, v12.8h\n" - "ldr x28, [x16, #0x90]\n" - "fmla v30.8h, v0.8h, v12.8h\n" - "ldr q12, [x27, x14]\n" - "fmla v29.8h, v2.8h, v11.8h\n" - "ldr x27, [x16, #0x98]\n" - "fmla v28.8h, v1.8h, v11.8h\n" - "ldr q11, [x26, x14]\n" - "fmla v26.8h, v8.8h, v10.8h\n" - "ldr x26, [x16, #0xa0]\n" - "fmla v25.8h, v7.8h, v10.8h\n" - "fmla v24.8h, v6.8h, v10.8h\n" - "fmla v22.8h, v5.8h, v10.8h\n" - "fmla v21.8h, v4.8h, v10.8h\n" - "fmla v20.8h, v3.8h, v10.8h\n" - "fmla v18.8h, v2.8h, v10.8h\n" - "fmla v17.8h, v1.8h, v10.8h\n" + "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" + "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v9.8h\n" + "ldr x26, [x13, #0x20]\n" + "ldr x25, [x13, #0x30]\n" + "mov v22.16b, v13.16b\n fmla v22.8h, v3.8h, v9.8h\n" + "mov v25.16b, v13.16b\n fmla v25.8h, v1.8h, v9.8h\n" + "ldr x24, [x13, #0x28]\n" + "ldr x23, [x13, #0x38]\n" + "mov v26.16b, v13.16b\n fmla v26.8h, v0.8h, v9.8h\n" + "mov v17.16b, v13.16b\n fmla v17.8h, v7.8h, v9.8h\n" + "ldr x10, [x13, #0x40]\n" + "ldr x9, [x13, #0x48]\n" + "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" + "fmla v21.8h, v5.8h, v12.8h\n" + "ldr x28, [x13, #0x50]\n" + "ldr x27, [x13, #0x58]\n" + "mov v20.16b, v13.16b\n fmla v20.8h, v5.8h, v9.8h\n" + "mov v24.16b, v13.16b\n fmla v24.8h, v2.8h, v9.8h\n" + "ldr q9, [x25, x12]\n" + "ldr x25, [x13, #0x70]\n" "fmla v16.8h, v0.8h, v10.8h\n" - "ldr q10, [x25, x14]\n" - "fmla v31.8h, v3.8h, v9.8h\n" - "ldr x25, [x16, #0xa8]\n" - "fmla v27.8h, v0.8h, v9.8h\n" - "fmla v28.8h, v5.8h, v12.8h\n" - "fmla v24.8h, v2.8h, v12.8h\n" - "ldr q12, [x23, x14]\n" - "fmla v23.8h, v6.8h, v11.8h\n" - "ldr x23, [x16, #0xb8]\n" - "fmla v19.8h, v3.8h, v11.8h\n" - "ldr q11, [x24, x14]\n" - "fmla v31.8h, v5.8h, v10.8h\n" - "ldr x24, [x16, #0xb0]\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v3.8h, v10.8h\n" - "fmla v27.8h, v2.8h, v10.8h\n" - "fmla v26.8h, v1.8h, v10.8h\n" - "fmla v25.8h, v0.8h, v10.8h\n" - "ldr q10, [x9, x14]\n" - "fmla v20.8h, v8.8h, v11.8h\n" - "ldr x9, [x16, #0xc8]\n" - "fmla v16.8h, v5.8h, v11.8h\n" - "ldr q11, [x10, x14]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr x10, [x16, #0xc0]\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "fmla v26.8h, v2.8h, v12.8h\n" - "fmla v25.8h, v1.8h, v12.8h\n" - "fmla v24.8h, v0.8h, v12.8h\n" - "ldr q12, [x27, x14]\n" - "fmla v19.8h, v7.8h, v11.8h\n" - "ldr x27, [x16, #0xd8]\n" - "fmla v18.8h, v6.8h, v11.8h\n" - "ldr q11, [x28, x14]\n" - "fmla v31.8h, v7.8h, v10.8h\n" - "ldr x28, [x16, #0xd0]\n" - "fmla v30.8h, v6.8h, v10.8h\n" - "fmla v27.8h, v4.8h, v10.8h\n" - "fmla v26.8h, v3.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" - "fmla v22.8h, v0.8h, v10.8h\n" - "ldr q10, [x26, x14]\n" - "fmla v17.8h, v8.8h, v11.8h\n" - "ldr x26, [x16, #0xe0]\n" - "fmla v16.8h, v7.8h, v11.8h\n" - "ldr q11, [x25, x14]\n" - "fmla v29.8h, v8.8h, v12.8h\n" - "ldr x25, [x16, #0xe8]\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "fmla v25.8h, v5.8h, v12.8h\n" - "fmla v24.8h, v4.8h, v12.8h\n" - "fmla v21.8h, v2.8h, v12.8h\n" - "fmla v20.8h, v1.8h, v12.8h\n" - "ldr q12, [x24, x14]\n" - "fmla v31.8h, v2.8h, v10.8h\n" - "ldr x24, [x16, #0xf0]\n" - "fmla v30.8h, v1.8h, v10.8h\n" - "fmla v29.8h, v0.8h, v10.8h\n" - "ldr q10, [x23, x14]\n" - "fmla v27.8h, v7.8h, v11.8h\n" - "ldr x23, [x16, #0xf8]\n" - "fmla v26.8h, v6.8h, v11.8h\n" - "fmla v23.8h, v4.8h, v11.8h\n" - "fmla v22.8h, v3.8h, v11.8h\n" + "mov v19.16b, v13.16b\n fmla v19.8h, v2.8h, v11.8h\n" + "ldr q10, [x26, x12]\n" + "ldr q11, [x24, x12]\n" + "fmla v22.8h, v4.8h, v12.8h\n" + "fmla v25.8h, v2.8h, v12.8h\n" + "ldr x26, [x13, #0x60]\n" + "ldr x24, [x13, #0x68]\n" + "fmla v26.8h, v1.8h, v12.8h\n" + "fmla v17.8h, v8.8h, v12.8h\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "fmla v18.8h, v7.8h, v12.8h\n" + "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" + "ldr q10, [x9, x12]\n" + "ldr x9, [x13, #0x88]\n" + "fmla v21.8h, v7.8h, v9.8h\n" + "fmla v19.8h, v6.8h, v12.8h\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "mov v23.16b, v13.16b\n fmla v23.8h, v3.8h, v12.8h\n" + "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" + "ldr q12, [x23, x12]\n" + "ldr x23, [x13, #0x78]\n" + "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" + "fmla v22.8h, v6.8h, v9.8h\n" + "ldr q11, [x10, x12]\n" + "ldr x10, [x13, #0x80]\n" + "fmla v25.8h, v4.8h, v9.8h\n" + "fmla v26.8h, v3.8h, v9.8h\n" + "add x11, x11, #0x10\n" + "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" + "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" + "fmla v20.8h, v8.8h, v9.8h\n" + "fmla v24.8h, v5.8h, v9.8h\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v16.8h, v1.8h, v12.8h\n" + "ldr q9, [x28, x12]\n" + "ldr x28, [x13, #0x90]\n" + "fmla v17.8h, v0.8h, v12.8h\n" + "fmla v18.8h, v2.8h, v11.8h\n" + "ldr q12, [x27, x12]\n" + "ldr x27, [x13, #0x98]\n" + "fmla v21.8h, v8.8h, v10.8h\n" "fmla v19.8h, v1.8h, v11.8h\n" - "fmla v18.8h, v0.8h, v11.8h\n" - "ldr q11, [x10, x14]\n" - "fmla v30.8h, v2.8h, v12.8h\n" - "ldr x10, [x16, #0x100]\n" - "fmla v29.8h, v1.8h, v12.8h\n" - "fmla v28.8h, v0.8h, v12.8h\n" - "ldr q12, [x9, x14]\n" - "fmla v31.8h, v6.8h, v10.8h\n" - "ldr x9, [x16, #0x108]\n" + "ldr q11, [x26, x12]\n" + "ldr x26, [x13, #0xa0]\n" + "fmla v22.8h, v7.8h, v10.8h\n" + "fmla v23.8h, v6.8h, v10.8h\n" + "fmla v25.8h, v5.8h, v10.8h\n" + "fmla v26.8h, v4.8h, v10.8h\n" "fmla v27.8h, v3.8h, v10.8h\n" - "fmla v23.8h, v0.8h, v10.8h\n" - "ldr q10, [x28, x14]\n" - "fmla v25.8h, v8.8h, v11.8h\n" - "ldr x28, [x16, #0x110]\n" - "fmla v24.8h, v7.8h, v11.8h\n" - "fmla v21.8h, v5.8h, v11.8h\n" - "fmla v20.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v2.8h, v11.8h\n" - "fmla v16.8h, v1.8h, v11.8h\n" - "ldr q11, [x27, x14]\n" - "fmla v28.8h, v8.8h, v12.8h\n" - "ldr x27, [x16, #0x118]\n" - "fmla v24.8h, v5.8h, v12.8h\n" - "fmla v20.8h, v2.8h, v12.8h\n" - "ldr q12, [x26, x14]\n" - "fmla v27.8h, v6.8h, v10.8h\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "fmla v19.8h, v0.8h, v10.8h\n" - "ldr q10, [x25, x14]\n" - "fmla v22.8h, v7.8h, v11.8h\n" - "fmla v21.8h, v6.8h, v11.8h\n" - "fmla v23.8h, v8.8h, v11.8h\n" - "fmla v19.8h, v5.8h, v11.8h\n" - "fmla v18.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v3.8h, v11.8h\n" - "ldr q11, [x24, x14]\n" - "fmla v24.8h, v8.8h, v12.8h\n" - "fmla v20.8h, v5.8h, v12.8h\n" - "fmla v16.8h, v2.8h, v12.8h\n" - "ldr q12, [x23, x14]\n" - "fmla v19.8h, v8.8h, v10.8h\n" - "fmla v18.8h, v7.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v10.8h\n" + "fmla v30.8h, v1.8h, v10.8h\n" + "fmla v31.8h, v0.8h, v10.8h\n" + "ldr q10, [x24, x12]\n" + "ldr x24, [x13, #0xa8]\n" + "fmla v16.8h, v3.8h, v9.8h\n" + "fmla v20.8h, v0.8h, v9.8h\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "ldr q11, [x25, x12]\n" + "ldr x25, [x13, #0xb0]\n" + "fmla v17.8h, v4.8h, v10.8h\n" + "fmla v18.8h, v3.8h, v10.8h\n" + "fmla v21.8h, v1.8h, v10.8h\n" + "fmla v19.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v2.8h, v12.8h\n" + "fmla v22.8h, v0.8h, v10.8h\n" + "ldr q12, [x23, x12]\n" + "ldr x23, [x13, #0xb8]\n" + "fmla v27.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "ldr q11, [x10, x12]\n" + "ldr x10, [x13, #0xc0]\n" + "fmla v16.8h, v5.8h, v10.8h\n" + "fmla v20.8h, v2.8h, v10.8h\n" + "ldr q10, [x9, x12]\n" + "ldr x9, [x13, #0xc8]\n" + "fmla v17.8h, v5.8h, v12.8h\n" + "fmla v18.8h, v4.8h, v12.8h\n" + "fmla v21.8h, v2.8h, v12.8h\n" + "fmla v19.8h, v3.8h, v12.8h\n" + "fmla v22.8h, v1.8h, v12.8h\n" + "fmla v23.8h, v0.8h, v12.8h\n" + "ldr q12, [x27, x12]\n" + "ldr x27, [x13, #0xd8]\n" + "fmla v28.8h, v7.8h, v11.8h\n" + "fmla v29.8h, v6.8h, v11.8h\n" + "ldr q11, [x28, x12]\n" + "ldr x28, [x13, #0xd0]\n" + "fmla v16.8h, v7.8h, v10.8h\n" "fmla v17.8h, v6.8h, v10.8h\n" - "ldr q10, [x10, x14]\n" - "fmla v22.8h, v8.8h, v11.8h\n" - "fmla v21.8h, v7.8h, v11.8h\n" - "fmla v20.8h, v6.8h, v11.8h\n" - "fmla v18.8h, v5.8h, v11.8h\n" - "fmla v17.8h, v4.8h, v11.8h\n" - "fmla v16.8h, v3.8h, v11.8h\n" - "ldr q11, [x9, x14]\n" - "fmla v31.8h, v4.8h, v10.8h\n" + "fmla v20.8h, v4.8h, v10.8h\n" + "fmla v21.8h, v3.8h, v10.8h\n" + "fmla v24.8h, v1.8h, v10.8h\n" + "fmla v25.8h, v0.8h, v10.8h\n" + "ldr q10, [x26, x12]\n" + "ldr x26, [x13, #0xe0]\n" "fmla v18.8h, v8.8h, v12.8h\n" - "fmla v17.8h, v7.8h, v12.8h\n" - "fmla v16.8h, v6.8h, v12.8h\n" - "ldr q12, [x28, x14]\n" - "fmla v30.8h, v3.8h, v10.8h\n" - "fmla v27.8h, v1.8h, v10.8h\n" - "fmla v26.8h, v0.8h, v10.8h\n" - "ldr q10, [x27, x14]\n" - "add x14, x14, #0x10\n" + "fmla v30.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v7.8h, v11.8h\n" + "ldr q11, [x24, x12]\n" + "fmla v27.8h, v1.8h, v12.8h\n" + "ldr x24, [x13, #0xe8]\n" + "fmla v19.8h, v7.8h, v12.8h\n" + "fmla v22.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v4.8h, v12.8h\n" + "fmla v26.8h, v2.8h, v12.8h\n" + "ldr q12, [x25, x12]\n" + "ldr x25, [x13, #0xf0]\n" + "fmla v16.8h, v2.8h, v10.8h\n" + "fmla v17.8h, v1.8h, v10.8h\n" + "fmla v18.8h, v0.8h, v10.8h\n" + "fmla v20.8h, v7.8h, v11.8h\n" + "ldr q10, [x23, x12]\n" + "ldr x23, [x13, #0xf8]\n" + "fmla v21.8h, v6.8h, v11.8h\n" + "fmla v24.8h, v4.8h, v11.8h\n" + "fmla v25.8h, v3.8h, v11.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v0.8h, v11.8h\n" + "ldr q11, [x10, x12]\n" + "fmla v27.8h, v4.8h, v11.8h\n" + "ldr x10, [x13, #0x100]\n" + "fmla v30.8h, v2.8h, v11.8h\n" + "fmla v17.8h, v2.8h, v12.8h\n" + "fmla v18.8h, v1.8h, v12.8h\n" + "fmla v19.8h, v0.8h, v12.8h\n" + "ldr q12, [x9, x12]\n" + "ldr x9, [x13, #0x108]\n" + "fmla v16.8h, v6.8h, v10.8h\n" + "fmla v20.8h, v3.8h, v10.8h\n" + "fmla v24.8h, v0.8h, v10.8h\n" + "fmla v22.8h, v8.8h, v11.8h\n" + "ldr q10, [x28, x12]\n" + "ldr x28, [x13, #0x110]\n" + "fmla v23.8h, v7.8h, v11.8h\n" + "fmla v26.8h, v5.8h, v11.8h\n" + "fmla v31.8h, v1.8h, v11.8h\n" + "ldr q11, [x27, x12]\n" + "fmla v27.8h, v2.8h, v12.8h\n" + "ldr x27, [x13, #0x118]\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v4.8h, v11.8h\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v19.8h, v8.8h, v12.8h\n" + "fmla v23.8h, v5.8h, v12.8h\n" + "fmla v20.8h, v6.8h, v10.8h\n" + "ldr q12, [x26, x12]\n" + "fmla v24.8h, v3.8h, v10.8h\n" + "ldr q10, [x24, x12]\n" + "fmla v25.8h, v7.8h, v11.8h\n" + "fmla v26.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" + "fmla v27.8h, v5.8h, v12.8h\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "fmla v30.8h, v6.8h, v10.8h\n" + "fmla v24.8h, v8.8h, v11.8h\n" + "ldr q11, [x25, x12]\n" + "fmla v28.8h, v8.8h, v10.8h\n" + "ldr q10, [x10, x12]\n" + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v26.8h, v7.8h, v11.8h\n" + "fmla v27.8h, v6.8h, v11.8h\n" "fmla v29.8h, v5.8h, v11.8h\n" - "fmla v28.8h, v4.8h, v11.8h\n" - "fmla v25.8h, v2.8h, v11.8h\n" - "fmla v24.8h, v1.8h, v11.8h\n" - "fmla v23.8h, v7.8h, v12.8h\n" - "fmla v22.8h, v6.8h, v12.8h\n" - "fmla v19.8h, v4.8h, v12.8h\n" - "fmla v18.8h, v3.8h, v12.8h\n" - "fmla v21.8h, v8.8h, v10.8h\n" - "fmla v20.8h, v7.8h, v10.8h\n" - "fmla v17.8h, v5.8h, v10.8h\n" + "fmla v30.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v11.8h\n" + "ldr q11, [x9, x12]\n" + "fmla v23.8h, v8.8h, v12.8h\n" + "ldr q12, [x23, x12]\n" "fmla v16.8h, v4.8h, v10.8h\n" - "fmax v31.8h, v31.8h, v15.8h\n" - "fmax v30.8h, v30.8h, v15.8h\n" - "fmax v29.8h, v29.8h, v15.8h\n" - "fmin v31.8h, v31.8h, v14.8h\n" - "str q31, [x22, x12]\n" - "fmin v30.8h, v30.8h, v14.8h\n" - "fmin v29.8h, v29.8h, v14.8h\n" - "ldr x22, [x17, #0x20]\n" - "fmax v28.8h, v28.8h, v15.8h\n" - "str q30, [x21, x12]\n" - "fmax v27.8h, v27.8h, v15.8h\n" - "fmax v26.8h, v26.8h, v15.8h\n" - "str q29, [x20, x12]\n" - "fmin v28.8h, v28.8h, v14.8h\n" - "ldr x21, [x17, #0x28]\n" - "fmax v25.8h, v25.8h, v15.8h\n" - "ldr x20, [x17, #0x30]\n" - "fmin v27.8h, v27.8h, v14.8h\n" - "str q28, [x19, x12]\n" - "fmin v26.8h, v26.8h, v14.8h\n" - "ldr x19, [x17, #0x38]\n" - "fmin v25.8h, v25.8h, v14.8h\n" - "str q27, [x22, x12]\n" - "fmax v24.8h, v24.8h, v15.8h\n" - "str q26, [x21, x12]\n" - "fmax v23.8h, v23.8h, v15.8h\n" - "str q25, [x20, x12]\n" - "fmax v22.8h, v22.8h, v15.8h\n" - "ldr x22, [x17, #0x40]\n" - "fmin v24.8h, v24.8h, v14.8h\n" - "ldr x21, [x17, #0x48]\n" - "fmin v23.8h, v23.8h, v14.8h\n" - "ldr x20, [x17, #0x50]\n" - "fmin v22.8h, v22.8h, v14.8h\n" - "str q24, [x19, x12]\n" - "fmax v21.8h, v21.8h, v15.8h\n" - "str q23, [x22, x12]\n" - "fmax v20.8h, v20.8h, v15.8h\n" - "str q22, [x21, x12]\n" - "fmax v19.8h, v19.8h, v15.8h\n" - "ldr x19, [x17, #0x58]\n" - "fmin v21.8h, v21.8h, v14.8h\n" - "ldr x22, [x17, #0x60]\n" - "fmin v20.8h, v20.8h, v14.8h\n" - "ldr x21, [x17, #0x68]\n" - "fmin v19.8h, v19.8h, v14.8h\n" - "str q21, [x20, x12]\n" - "fmax v18.8h, v18.8h, v15.8h\n" - "str q20, [x19, x12]\n" - "fmax v17.8h, v17.8h, v15.8h\n" - "str q19, [x22, x12]\n" "fmax v16.8h, v16.8h, v15.8h\n" - "ldr x20, [x17, #0x70]\n" - "fmin v18.8h, v18.8h, v14.8h\n" - "ldr x19, [x17, #0x78]\n" - "fmin v17.8h, v17.8h, v14.8h\n" - "str q18, [x21, x12]\n" + "fmla v17.8h, v3.8h, v10.8h\n" + "fmla v18.8h, v5.8h, v11.8h\n" + "fmax v17.8h, v17.8h, v15.8h\n" + "fmla v19.8h, v4.8h, v11.8h\n" + "fmla v29.8h, v8.8h, v12.8h\n" + "fmax v18.8h, v18.8h, v15.8h\n" + "fmla v30.8h, v7.8h, v12.8h\n" + "fmla v31.8h, v6.8h, v12.8h\n" + "ldr q12, [x28, x12]\n" + "fmax v19.8h, v19.8h, v15.8h\n" + "fmla v20.8h, v1.8h, v10.8h\n" + "fmla v21.8h, v0.8h, v10.8h\n" + "ldr q10, [x27, x12]\n" "fmin v16.8h, v16.8h, v14.8h\n" - "str q17, [x20, x12]\n" - "str q16, [x19, x12]\n" + "fmla v22.8h, v2.8h, v11.8h\n" + "fmla v23.8h, v1.8h, v11.8h\n" + "fmin v17.8h, v17.8h, v14.8h\n" + "str q16, [x22, x11]\n" + "fmla v24.8h, v7.8h, v12.8h\n" + "fmla v25.8h, v6.8h, v12.8h\n" + "fmin v18.8h, v18.8h, v14.8h\n" + "str q17, [x21, x11]\n" + "fmla v26.8h, v8.8h, v10.8h\n" + "fmla v27.8h, v7.8h, v10.8h\n" + "fmin v19.8h, v19.8h, v14.8h\n" + "str q18, [x20, x11]\n" + "fmax v20.8h, v20.8h, v15.8h\n" + "fmax v21.8h, v21.8h, v15.8h\n" + "str q19, [x19, x11]\n" + "ldr x22, [x15, #0x20]\n" + "fmax v22.8h, v22.8h, v15.8h\n" + "fmax v23.8h, v23.8h, v15.8h\n" + "ldr x21, [x15, #0x28]\n" + "ldr x20, [x15, #0x30]\n" + "ldr x19, [x15, #0x38]\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "fmin v20.8h, v20.8h, v14.8h\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "fmin v21.8h, v21.8h, v14.8h\n" + "str q20, [x22, x11]\n" + "fmin v22.8h, v22.8h, v14.8h\n" + "fmin v23.8h, v23.8h, v14.8h\n" + "str q21, [x21, x11]\n" + "ldr x22, [x15, #0x40]\n" + "fmax v24.8h, v24.8h, v15.8h\n" + "fmax v25.8h, v25.8h, v15.8h\n" + "str q22, [x20, x11]\n" + "ldr x21, [x15, #0x48]\n" + "fmax v26.8h, v26.8h, v15.8h\n" + "fmax v27.8h, v27.8h, v15.8h\n" + "str q23, [x19, x11]\n" + "ldr x20, [x15, #0x50]\n" + "ldr x19, [x15, #0x58]\n" + "fmin v24.8h, v24.8h, v14.8h\n" + "fmin v25.8h, v25.8h, v14.8h\n" + "str q24, [x22, x11]\n" + "fmin v26.8h, v26.8h, v14.8h\n" + "fmin v27.8h, v27.8h, v14.8h\n" + "str q25, [x21, x11]\n" + "ldr x22, [x15, #0x60]\n" + "fmax v28.8h, v28.8h, v15.8h\n" + "fmax v29.8h, v29.8h, v15.8h\n" + "str q26, [x20, x11]\n" + "ldr x21, [x15, #0x68]\n" + "fmax v30.8h, v30.8h, v15.8h\n" + "fmax v31.8h, v31.8h, v15.8h\n" + "str q27, [x19, x11]\n" + "ldr x20, [x15, #0x70]\n" + "ldr x19, [x15, #0x78]\n" + "fmin v28.8h, v28.8h, v14.8h\n" + "fmin v29.8h, v29.8h, v14.8h\n" + "str q28, [x22, x11]\n" + "fmin v30.8h, v30.8h, v14.8h\n" + "fmin v31.8h, v31.8h, v14.8h\n" + "str q29, [x21, x11]\n" + "add x12, x12, #0x10\n" + "str q30, [x20, x11]\n" + "str q31, [x19, x11]\n" "3:" // Oddments - "tst %x[n_channels], #0x1\n" - "beq 72f\n" - "ldr q13, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "mov x12, x14\n" - "ldr q1, [x15, #0x20]\n" - "ldr q2, [x15, #0x30]\n" - "ldr q3, [x15, #0x40]\n" - "ldr q4, [x15, #0x50]\n" - "ldr q5, [x15, #0x60]\n" - "ldr q6, [x15, #0x70]\n" - "ldr q7, [x15, #0x80]\n" - "ldr q8, [x15, #0x90]\n" - "ldr x10, [x16, #0x0]\n" - "add x10, x10, x14\n" - "ldr x9, [x16, #0x8]\n" - "ldr x28, [x16, #0x10]\n" - "add x9, x9, x14\n" - "ldr x27, [x16, #0x18]\n" - "add x28, x28, x14\n" - "add x27, x27, x14\n" + "tst %x[n_channels], #0x7\n" + "beq 140f\n" + "ldr x10, [x13, #0x0]\n" + "ldr x9, [x13, #0x8]\n" + "ldr x28, [x13, #0x10]\n" + "ldr x27, [x13, #0x18]\n" + "mov x11, x12\n" + "add x10, x10, x12\n" + "ldr q13, [x14, #0x0]\n" + "ldr q0, [x14, #0x10]\n" + "add x9, x9, x12\n" + "add x28, x28, x12\n" + "ldr q1, [x14, #0x20]\n" + "ldr q2, [x14, #0x30]\n" + "add x27, x27, x12\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "tbz %x[n_channels], #2, 5f\n" + "ld1 { v9.d }[0], [x10], #0x8\n" + "ld1 { v10.d }[0], [x9], #0x8\n" + "ld1 { v11.d }[0], [x28], #0x8\n" + "ld1 { v12.d }[0], [x27], #0x8\n" "tbz %x[n_channels], #1, 4f\n" + "ld1 { v9.s }[2], [x10], #0x4\n" + "ld1 { v10.s }[2], [x9], #0x4\n" + "ld1 { v11.s }[2], [x28], #0x4\n" + "ld1 { v12.s }[2], [x27], #0x4\n" + "tbz %x[n_channels], #0, 7f\n" + "ld1 { v9.h }[6], [x10], #0x2\n" + "ld1 { v10.h }[6], [x9], #0x2\n" + "ld1 { v11.h }[6], [x28], #0x2\n" + "ld1 { v12.h }[6], [x27], #0x2\n" + "b 7f\n" + "4:" // Oddments: Load inputs (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 7f\n" + "ld1 { v9.h }[4], [x10], #0x2\n" + "ld1 { v10.h }[4], [x9], #0x2\n" + "ld1 { v11.h }[4], [x28], #0x2\n" + "ld1 { v12.h }[4], [x27], #0x2\n" + "b 7f\n" + "5:" // Oddments: Load inputs (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 6f\n" "ld1 { v9.s }[0], [x10], #0x4\n" "ld1 { v10.s }[0], [x9], #0x4\n" "ld1 { v11.s }[0], [x28], #0x4\n" "ld1 { v12.s }[0], [x27], #0x4\n" - "tbz %x[n_channels], #0, 5f\n" + "tbz %x[n_channels], #0, 7f\n" "ld1 { v9.h }[2], [x10], #0x2\n" "ld1 { v10.h }[2], [x9], #0x2\n" "ld1 { v11.h }[2], [x28], #0x2\n" "ld1 { v12.h }[2], [x27], #0x2\n" - "b 5f\n" - "4:" // Oddments: Load inputs (2, 2), (0, 0), (0, 5), (2, 3): Bit 1: Unset + "b 7f\n" + "6:" // Oddments: Load inputs (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v9.h }[0], [x10], #0x2\n" "ld1 { v10.h }[0], [x9], #0x2\n" "ld1 { v11.h }[0], [x28], #0x2\n" "ld1 { v12.h }[0], [x27], #0x2\n" - "5:" // Oddments: Load inputs (2, 2), (0, 0), (0, 5), (2, 3): Bit 1: End - "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "ldr x26, [x16, #0x20]\n" - "add x26, x26, x14\n" - "mov v30.16b, v13.16b\n fmla v30.8h, v7.8h, v9.8h\n" - "mov v29.16b, v13.16b\n fmla v29.8h, v6.8h, v9.8h\n" - "mov v27.16b, v13.16b\n fmla v27.8h, v5.8h, v9.8h\n" - "mov v26.16b, v13.16b\n fmla v26.8h, v4.8h, v9.8h\n" - "mov v25.16b, v13.16b\n fmla v25.8h, v3.8h, v9.8h\n" - "mov v23.16b, v13.16b\n fmla v23.8h, v2.8h, v9.8h\n" - "mov v22.16b, v13.16b\n fmla v22.8h, v1.8h, v9.8h\n" - "mov v21.16b, v13.16b\n fmla v21.8h, v0.8h, v9.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "mov v28.16b, v13.16b\n fmla v28.8h, v2.8h, v11.8h\n" - "fmla v30.8h, v8.8h, v12.8h\n" - "fmla v29.8h, v7.8h, v12.8h\n" - "fmla v26.8h, v5.8h, v12.8h\n" - "fmla v28.8h, v6.8h, v12.8h\n" - "fmla v25.8h, v4.8h, v12.8h\n" - "mov v24.16b, v13.16b\n fmla v24.8h, v3.8h, v12.8h\n" - "fmla v22.8h, v2.8h, v12.8h\n" - "fmla v21.8h, v1.8h, v12.8h\n" - "mov v20.16b, v13.16b\n fmla v20.8h, v0.8h, v12.8h\n" - "tbz %x[n_channels], #1, 6f\n" - "ld1 { v10.s }[0], [x26], #0x4\n" - "tbz %x[n_channels], #0, 7f\n" - "ld1 { v10.h }[2], [x26], #0x2\n" - "b 7f\n" - "6:" // Oddments: Load input (5, 0): Bit 1: Unset - "ld1 { v10.h }[0], [x26], #0x2\n" - "7:" // Oddments: Load input (5, 0): Bit 1: End - "mov v19.16b, v13.16b\n fmla v19.8h, v6.8h, v10.8h\n" - "ldr x25, [x16, #0x28]\n" - "add x25, x25, x14\n" + "7:" // Oddments: Load inputs (2, 2), (0, 0), (0, 5), (2, 3): Bit 2: End + "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v9.8h\n" + "mov v17.16b, v13.16b\n fmla v17.8h, v7.8h, v9.8h\n" + "ldr x26, [x13, #0x20]\n" + "add x26, x26, x12\n" + "mov v18.16b, v13.16b\n fmla v18.8h, v6.8h, v9.8h\n" + "mov v21.16b, v13.16b\n fmla v21.8h, v4.8h, v9.8h\n" + "mov v22.16b, v13.16b\n fmla v22.8h, v3.8h, v9.8h\n" + "mov v25.16b, v13.16b\n fmla v25.8h, v1.8h, v9.8h\n" + "mov v26.16b, v13.16b\n fmla v26.8h, v0.8h, v9.8h\n" + "mov v19.16b, v13.16b\n fmla v19.8h, v2.8h, v11.8h\n" + "mov v20.16b, v13.16b\n fmla v20.8h, v5.8h, v9.8h\n" + "mov v24.16b, v13.16b\n fmla v24.8h, v2.8h, v9.8h\n" + "fmla v16.8h, v0.8h, v10.8h\n" + "fmla v17.8h, v8.8h, v12.8h\n" + "fmla v18.8h, v7.8h, v12.8h\n" + "fmla v19.8h, v6.8h, v12.8h\n" + "fmla v21.8h, v5.8h, v12.8h\n" + "fmla v22.8h, v4.8h, v12.8h\n" + "mov v23.16b, v13.16b\n fmla v23.8h, v3.8h, v12.8h\n" + "fmla v25.8h, v2.8h, v12.8h\n" + "fmla v26.8h, v1.8h, v12.8h\n" + "mov v27.16b, v13.16b\n fmla v27.8h, v0.8h, v12.8h\n" + "tbz %x[n_channels], #2, 9f\n" + "ld1 { v10.d }[0], [x26], #0x8\n" "tbz %x[n_channels], #1, 8f\n" - "ld1 { v11.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 9f\n" - "ld1 { v11.h }[2], [x25], #0x2\n" - "b 9f\n" - "8:" // Oddments: Load input (5, 5): Bit 1: Unset - "ld1 { v11.h }[0], [x25], #0x2\n" - "9:" // Oddments: Load input (5, 5): Bit 1: End - "mov v16.16b, v13.16b\n fmla v16.8h, v8.8h, v11.8h\n" - "ldr x24, [x16, #0x30]\n" - "add x24, x24, x14\n" + "ld1 { v10.s }[2], [x26], #0x4\n" + "tbz %x[n_channels], #0, 11f\n" + "ld1 { v10.h }[6], [x26], #0x2\n" + "b 11f\n" + "8:" // Oddments: Load input (5, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 11f\n" + "ld1 { v10.h }[4], [x26], #0x2\n" + "b 11f\n" + "9:" // Oddments: Load input (5, 0): Bit 2: Unset "tbz %x[n_channels], #1, 10f\n" - "ld1 { v9.s }[0], [x24], #0x4\n" + "ld1 { v10.s }[0], [x26], #0x4\n" "tbz %x[n_channels], #0, 11f\n" - "ld1 { v9.h }[2], [x24], #0x2\n" + "ld1 { v10.h }[2], [x26], #0x2\n" "b 11f\n" - "10:" // Oddments: Load input (3, 2): Bit 1: Unset - "ld1 { v9.h }[0], [x24], #0x2\n" - "11:" // Oddments: Load input (3, 2): Bit 1: End - "fmla v27.8h, v8.8h, v9.8h\n" - "ldr x23, [x16, #0x38]\n" - "fmla v26.8h, v7.8h, v9.8h\n" - "add x23, x23, x14\n" - "fmla v25.8h, v6.8h, v9.8h\n" - "fmla v23.8h, v5.8h, v9.8h\n" - "fmla v22.8h, v4.8h, v9.8h\n" - "fmla v21.8h, v3.8h, v9.8h\n" - "fmla v19.8h, v2.8h, v9.8h\n" - "mov v18.16b, v13.16b\n fmla v18.8h, v1.8h, v9.8h\n" - "mov v17.16b, v13.16b\n fmla v17.8h, v0.8h, v9.8h\n" + "10:" // Oddments: Load input (5, 0): Bit 2: Unset: Bit 1: Unset + "ld1 { v10.h }[0], [x26], #0x2\n" + "11:" // Oddments: Load input (5, 0): Bit 2: End + "ldr x24, [x13, #0x28]\n" + "mov v28.16b, v13.16b\n fmla v28.8h, v6.8h, v10.8h\n" + "add x24, x24, x12\n" + "tbz %x[n_channels], #2, 13f\n" + "ld1 { v11.d }[0], [x24], #0x8\n" "tbz %x[n_channels], #1, 12f\n" + "ld1 { v11.s }[2], [x24], #0x4\n" + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v11.h }[6], [x24], #0x2\n" + "b 15f\n" + "12:" // Oddments: Load input (5, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v11.h }[4], [x24], #0x2\n" + "b 15f\n" + "13:" // Oddments: Load input (5, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 14f\n" + "ld1 { v11.s }[0], [x24], #0x4\n" + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v11.h }[2], [x24], #0x2\n" + "b 15f\n" + "14:" // Oddments: Load input (5, 5): Bit 2: Unset: Bit 1: Unset + "ld1 { v11.h }[0], [x24], #0x2\n" + "15:" // Oddments: Load input (5, 5): Bit 2: End + "ldr x25, [x13, #0x30]\n" + "mov v31.16b, v13.16b\n fmla v31.8h, v8.8h, v11.8h\n" + "add x25, x25, x12\n" + "tbz %x[n_channels], #2, 17f\n" + "ld1 { v9.d }[0], [x25], #0x8\n" + "tbz %x[n_channels], #1, 16f\n" + "ld1 { v9.s }[2], [x25], #0x4\n" + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v9.h }[6], [x25], #0x2\n" + "b 19f\n" + "16:" // Oddments: Load input (3, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v9.h }[4], [x25], #0x2\n" + "b 19f\n" + "17:" // Oddments: Load input (3, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 18f\n" + "ld1 { v9.s }[0], [x25], #0x4\n" + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v9.h }[2], [x25], #0x2\n" + "b 19f\n" + "18:" // Oddments: Load input (3, 2): Bit 2: Unset: Bit 1: Unset + "ld1 { v9.h }[0], [x25], #0x2\n" + "19:" // Oddments: Load input (3, 2): Bit 2: End + "ldr x23, [x13, #0x38]\n" + "fmla v20.8h, v8.8h, v9.8h\n" + "fmla v21.8h, v7.8h, v9.8h\n" + "add x23, x23, x12\n" + "fmla v22.8h, v6.8h, v9.8h\n" + "fmla v24.8h, v5.8h, v9.8h\n" + "fmla v25.8h, v4.8h, v9.8h\n" + "fmla v26.8h, v3.8h, v9.8h\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "mov v29.16b, v13.16b\n fmla v29.8h, v1.8h, v9.8h\n" + "mov v30.16b, v13.16b\n fmla v30.8h, v0.8h, v9.8h\n" + "tbz %x[n_channels], #2, 21f\n" + "ld1 { v12.d }[0], [x23], #0x8\n" + "tbz %x[n_channels], #1, 20f\n" + "ld1 { v12.s }[2], [x23], #0x4\n" + "tbz %x[n_channels], #0, 23f\n" + "ld1 { v12.h }[6], [x23], #0x2\n" + "b 23f\n" + "20:" // Oddments: Load input (0, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 23f\n" + "ld1 { v12.h }[4], [x23], #0x2\n" + "b 23f\n" + "21:" // Oddments: Load input (0, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 22f\n" "ld1 { v12.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 13f\n" + "tbz %x[n_channels], #0, 23f\n" "ld1 { v12.h }[2], [x23], #0x2\n" - "b 13f\n" - "12:" // Oddments: Load input (0, 1): Bit 1: Unset + "b 23f\n" + "22:" // Oddments: Load input (0, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x23], #0x2\n" - "13:" // Oddments: Load input (0, 1): Bit 1: End - "fmla v31.8h, v1.8h, v12.8h\n" - "ldr x10, [x16, #0x40]\n" - "fmla v30.8h, v0.8h, v12.8h\n" - "add x10, x10, x14\n" - "tbz %x[n_channels], #1, 14f\n" + "23:" // Oddments: Load input (0, 1): Bit 2: End + "ldr x10, [x13, #0x40]\n" + "fmla v16.8h, v1.8h, v12.8h\n" + "fmla v17.8h, v0.8h, v12.8h\n" + "add x10, x10, x12\n" + "tbz %x[n_channels], #2, 25f\n" + "ld1 { v11.d }[0], [x10], #0x8\n" + "tbz %x[n_channels], #1, 24f\n" + "ld1 { v11.s }[2], [x10], #0x4\n" + "tbz %x[n_channels], #0, 27f\n" + "ld1 { v11.h }[6], [x10], #0x2\n" + "b 27f\n" + "24:" // Oddments: Load input (0, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 27f\n" + "ld1 { v11.h }[4], [x10], #0x2\n" + "b 27f\n" + "25:" // Oddments: Load input (0, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 26f\n" "ld1 { v11.s }[0], [x10], #0x4\n" - "tbz %x[n_channels], #0, 15f\n" + "tbz %x[n_channels], #0, 27f\n" "ld1 { v11.h }[2], [x10], #0x2\n" - "b 15f\n" - "14:" // Oddments: Load input (0, 4): Bit 1: Unset + "b 27f\n" + "26:" // Oddments: Load input (0, 4): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x10], #0x2\n" - "15:" // Oddments: Load input (0, 4): Bit 1: End - "fmla v29.8h, v2.8h, v11.8h\n" - "ldr x9, [x16, #0x48]\n" - "fmla v28.8h, v1.8h, v11.8h\n" - "add x9, x9, x14\n" - "tbz %x[n_channels], #1, 16f\n" + "27:" // Oddments: Load input (0, 4): Bit 2: End + "ldr x9, [x13, #0x48]\n" + "fmla v18.8h, v2.8h, v11.8h\n" + "fmla v19.8h, v1.8h, v11.8h\n" + "add x9, x9, x12\n" + "tbz %x[n_channels], #2, 29f\n" + "ld1 { v10.d }[0], [x9], #0x8\n" + "tbz %x[n_channels], #1, 28f\n" + "ld1 { v10.s }[2], [x9], #0x4\n" + "tbz %x[n_channels], #0, 31f\n" + "ld1 { v10.h }[6], [x9], #0x2\n" + "b 31f\n" + "28:" // Oddments: Load input (3, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 31f\n" + "ld1 { v10.h }[4], [x9], #0x2\n" + "b 31f\n" + "29:" // Oddments: Load input (3, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 30f\n" "ld1 { v10.s }[0], [x9], #0x4\n" - "tbz %x[n_channels], #0, 17f\n" + "tbz %x[n_channels], #0, 31f\n" "ld1 { v10.h }[2], [x9], #0x2\n" - "b 17f\n" - "16:" // Oddments: Load input (3, 3): Bit 1: Unset + "b 31f\n" + "30:" // Oddments: Load input (3, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v10.h }[0], [x9], #0x2\n" - "17:" // Oddments: Load input (3, 3): Bit 1: End - "fmla v26.8h, v8.8h, v10.8h\n" - "ldr x28, [x16, #0x50]\n" - "fmla v25.8h, v7.8h, v10.8h\n" - "add x28, x28, x14\n" - "fmla v24.8h, v6.8h, v10.8h\n" - "fmla v22.8h, v5.8h, v10.8h\n" - "fmla v21.8h, v4.8h, v10.8h\n" - "fmla v20.8h, v3.8h, v10.8h\n" - "fmla v18.8h, v2.8h, v10.8h\n" - "fmla v17.8h, v1.8h, v10.8h\n" - "fmla v16.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 18f\n" + "31:" // Oddments: Load input (3, 3): Bit 2: End + "ldr x28, [x13, #0x50]\n" + "fmla v21.8h, v8.8h, v10.8h\n" + "fmla v22.8h, v7.8h, v10.8h\n" + "add x28, x28, x12\n" + "fmla v23.8h, v6.8h, v10.8h\n" + "fmla v25.8h, v5.8h, v10.8h\n" + "fmla v26.8h, v4.8h, v10.8h\n" + "fmla v27.8h, v3.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v10.8h\n" + "fmla v30.8h, v1.8h, v10.8h\n" + "fmla v31.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 33f\n" + "ld1 { v9.d }[0], [x28], #0x8\n" + "tbz %x[n_channels], #1, 32f\n" + "ld1 { v9.s }[2], [x28], #0x4\n" + "tbz %x[n_channels], #0, 35f\n" + "ld1 { v9.h }[6], [x28], #0x2\n" + "b 35f\n" + "32:" // Oddments: Load input (1, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 35f\n" + "ld1 { v9.h }[4], [x28], #0x2\n" + "b 35f\n" + "33:" // Oddments: Load input (1, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 34f\n" "ld1 { v9.s }[0], [x28], #0x4\n" - "tbz %x[n_channels], #0, 19f\n" + "tbz %x[n_channels], #0, 35f\n" "ld1 { v9.h }[2], [x28], #0x2\n" - "b 19f\n" - "18:" // Oddments: Load input (1, 0): Bit 1: Unset + "b 35f\n" + "34:" // Oddments: Load input (1, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v9.h }[0], [x28], #0x2\n" - "19:" // Oddments: Load input (1, 0): Bit 1: End - "fmla v31.8h, v3.8h, v9.8h\n" - "ldr x27, [x16, #0x58]\n" - "fmla v27.8h, v0.8h, v9.8h\n" - "add x27, x27, x14\n" - "tbz %x[n_channels], #1, 20f\n" + "35:" // Oddments: Load input (1, 0): Bit 2: End + "ldr x27, [x13, #0x58]\n" + "fmla v16.8h, v3.8h, v9.8h\n" + "fmla v20.8h, v0.8h, v9.8h\n" + "add x27, x27, x12\n" + "tbz %x[n_channels], #2, 37f\n" + "ld1 { v12.d }[0], [x27], #0x8\n" + "tbz %x[n_channels], #1, 36f\n" + "ld1 { v12.s }[2], [x27], #0x4\n" + "tbz %x[n_channels], #0, 39f\n" + "ld1 { v12.h }[6], [x27], #0x2\n" + "b 39f\n" + "36:" // Oddments: Load input (1, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 39f\n" + "ld1 { v12.h }[4], [x27], #0x2\n" + "b 39f\n" + "37:" // Oddments: Load input (1, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 38f\n" "ld1 { v12.s }[0], [x27], #0x4\n" - "tbz %x[n_channels], #0, 21f\n" + "tbz %x[n_channels], #0, 39f\n" "ld1 { v12.h }[2], [x27], #0x2\n" - "b 21f\n" - "20:" // Oddments: Load input (1, 5): Bit 1: Unset + "b 39f\n" + "38:" // Oddments: Load input (1, 5): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x27], #0x2\n" - "21:" // Oddments: Load input (1, 5): Bit 1: End - "fmla v28.8h, v5.8h, v12.8h\n" - "ldr x26, [x16, #0x60]\n" - "fmla v24.8h, v2.8h, v12.8h\n" - "add x26, x26, x14\n" - "tbz %x[n_channels], #1, 22f\n" + "39:" // Oddments: Load input (1, 5): Bit 2: End + "ldr x26, [x13, #0x60]\n" + "fmla v19.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v2.8h, v12.8h\n" + "add x26, x26, x12\n" + "tbz %x[n_channels], #2, 41f\n" + "ld1 { v11.d }[0], [x26], #0x8\n" + "tbz %x[n_channels], #1, 40f\n" + "ld1 { v11.s }[2], [x26], #0x4\n" + "tbz %x[n_channels], #0, 43f\n" + "ld1 { v11.h }[6], [x26], #0x2\n" + "b 43f\n" + "40:" // Oddments: Load input (4, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 43f\n" + "ld1 { v11.h }[4], [x26], #0x2\n" + "b 43f\n" + "41:" // Oddments: Load input (4, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 42f\n" "ld1 { v11.s }[0], [x26], #0x4\n" - "tbz %x[n_channels], #0, 23f\n" + "tbz %x[n_channels], #0, 43f\n" "ld1 { v11.h }[2], [x26], #0x2\n" - "b 23f\n" - "22:" // Oddments: Load input (4, 0): Bit 1: Unset + "b 43f\n" + "42:" // Oddments: Load input (4, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x26], #0x2\n" - "23:" // Oddments: Load input (4, 0): Bit 1: End - "fmla v23.8h, v6.8h, v11.8h\n" - "ldr x25, [x16, #0x68]\n" - "fmla v19.8h, v3.8h, v11.8h\n" - "add x25, x25, x14\n" - "tbz %x[n_channels], #1, 24f\n" - "ld1 { v10.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 25f\n" - "ld1 { v10.h }[2], [x25], #0x2\n" - "b 25f\n" - "24:" // Oddments: Load input (1, 2): Bit 1: Unset - "ld1 { v10.h }[0], [x25], #0x2\n" - "25:" // Oddments: Load input (1, 2): Bit 1: End - "fmla v31.8h, v5.8h, v10.8h\n" - "ldr x24, [x16, #0x70]\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "add x24, x24, x14\n" - "fmla v29.8h, v3.8h, v10.8h\n" - "fmla v27.8h, v2.8h, v10.8h\n" - "fmla v26.8h, v1.8h, v10.8h\n" - "fmla v25.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 26f\n" - "ld1 { v11.s }[0], [x24], #0x4\n" - "tbz %x[n_channels], #0, 27f\n" - "ld1 { v11.h }[2], [x24], #0x2\n" - "b 27f\n" - "26:" // Oddments: Load input (4, 5): Bit 1: Unset - "ld1 { v11.h }[0], [x24], #0x2\n" - "27:" // Oddments: Load input (4, 5): Bit 1: End - "fmla v20.8h, v8.8h, v11.8h\n" - "ldr x23, [x16, #0x78]\n" - "fmla v16.8h, v5.8h, v11.8h\n" - "add x23, x23, x14\n" - "tbz %x[n_channels], #1, 28f\n" + "43:" // Oddments: Load input (4, 0): Bit 2: End + "ldr x24, [x13, #0x68]\n" + "fmla v24.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "add x24, x24, x12\n" + "tbz %x[n_channels], #2, 45f\n" + "ld1 { v10.d }[0], [x24], #0x8\n" + "tbz %x[n_channels], #1, 44f\n" + "ld1 { v10.s }[2], [x24], #0x4\n" + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v10.h }[6], [x24], #0x2\n" + "b 47f\n" + "44:" // Oddments: Load input (1, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v10.h }[4], [x24], #0x2\n" + "b 47f\n" + "45:" // Oddments: Load input (1, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 46f\n" + "ld1 { v10.s }[0], [x24], #0x4\n" + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v10.h }[2], [x24], #0x2\n" + "b 47f\n" + "46:" // Oddments: Load input (1, 2): Bit 2: Unset: Bit 1: Unset + "ld1 { v10.h }[0], [x24], #0x2\n" + "47:" // Oddments: Load input (1, 2): Bit 2: End + "ldr x25, [x13, #0x70]\n" + "fmla v16.8h, v5.8h, v10.8h\n" + "fmla v17.8h, v4.8h, v10.8h\n" + "add x25, x25, x12\n" + "fmla v18.8h, v3.8h, v10.8h\n" + "fmla v20.8h, v2.8h, v10.8h\n" + "fmla v21.8h, v1.8h, v10.8h\n" + "fmla v22.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 49f\n" + "ld1 { v11.d }[0], [x25], #0x8\n" + "tbz %x[n_channels], #1, 48f\n" + "ld1 { v11.s }[2], [x25], #0x4\n" + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v11.h }[6], [x25], #0x2\n" + "b 51f\n" + "48:" // Oddments: Load input (4, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v11.h }[4], [x25], #0x2\n" + "b 51f\n" + "49:" // Oddments: Load input (4, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 50f\n" + "ld1 { v11.s }[0], [x25], #0x4\n" + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v11.h }[2], [x25], #0x2\n" + "b 51f\n" + "50:" // Oddments: Load input (4, 5): Bit 2: Unset: Bit 1: Unset + "ld1 { v11.h }[0], [x25], #0x2\n" + "51:" // Oddments: Load input (4, 5): Bit 2: End + "ldr x23, [x13, #0x78]\n" + "fmla v27.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v11.8h\n" + "add x23, x23, x12\n" + "tbz %x[n_channels], #2, 53f\n" + "ld1 { v12.d }[0], [x23], #0x8\n" + "tbz %x[n_channels], #1, 52f\n" + "ld1 { v12.s }[2], [x23], #0x4\n" + "tbz %x[n_channels], #0, 55f\n" + "ld1 { v12.h }[6], [x23], #0x2\n" + "b 55f\n" + "52:" // Oddments: Load input (1, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 55f\n" + "ld1 { v12.h }[4], [x23], #0x2\n" + "b 55f\n" + "53:" // Oddments: Load input (1, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 54f\n" "ld1 { v12.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 29f\n" + "tbz %x[n_channels], #0, 55f\n" "ld1 { v12.h }[2], [x23], #0x2\n" - "b 29f\n" - "28:" // Oddments: Load input (1, 3): Bit 1: Unset + "b 55f\n" + "54:" // Oddments: Load input (1, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x23], #0x2\n" - "29:" // Oddments: Load input (1, 3): Bit 1: End - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr x10, [x16, #0x80]\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "add x10, x10, x14\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "fmla v26.8h, v2.8h, v12.8h\n" - "fmla v25.8h, v1.8h, v12.8h\n" - "fmla v24.8h, v0.8h, v12.8h\n" - "tbz %x[n_channels], #1, 30f\n" + "55:" // Oddments: Load input (1, 3): Bit 2: End + "ldr x10, [x13, #0x80]\n" + "fmla v17.8h, v5.8h, v12.8h\n" + "fmla v18.8h, v4.8h, v12.8h\n" + "add x10, x10, x12\n" + "fmla v19.8h, v3.8h, v12.8h\n" + "fmla v21.8h, v2.8h, v12.8h\n" + "fmla v22.8h, v1.8h, v12.8h\n" + "fmla v23.8h, v0.8h, v12.8h\n" + "tbz %x[n_channels], #2, 57f\n" + "ld1 { v11.d }[0], [x10], #0x8\n" + "tbz %x[n_channels], #1, 56f\n" + "ld1 { v11.s }[2], [x10], #0x4\n" + "tbz %x[n_channels], #0, 59f\n" + "ld1 { v11.h }[6], [x10], #0x2\n" + "b 59f\n" + "56:" // Oddments: Load input (5, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 59f\n" + "ld1 { v11.h }[4], [x10], #0x2\n" + "b 59f\n" + "57:" // Oddments: Load input (5, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 58f\n" "ld1 { v11.s }[0], [x10], #0x4\n" - "tbz %x[n_channels], #0, 31f\n" + "tbz %x[n_channels], #0, 59f\n" "ld1 { v11.h }[2], [x10], #0x2\n" - "b 31f\n" - "30:" // Oddments: Load input (5, 1): Bit 1: Unset + "b 59f\n" + "58:" // Oddments: Load input (5, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x10], #0x2\n" - "31:" // Oddments: Load input (5, 1): Bit 1: End - "fmla v19.8h, v7.8h, v11.8h\n" - "ldr x9, [x16, #0x88]\n" - "fmla v18.8h, v6.8h, v11.8h\n" - "add x9, x9, x14\n" - "tbz %x[n_channels], #1, 32f\n" + "59:" // Oddments: Load input (5, 1): Bit 2: End + "ldr x9, [x13, #0x88]\n" + "fmla v28.8h, v7.8h, v11.8h\n" + "fmla v29.8h, v6.8h, v11.8h\n" + "add x9, x9, x12\n" + "tbz %x[n_channels], #2, 61f\n" + "ld1 { v10.d }[0], [x9], #0x8\n" + "tbz %x[n_channels], #1, 60f\n" + "ld1 { v10.s }[2], [x9], #0x4\n" + "tbz %x[n_channels], #0, 63f\n" + "ld1 { v10.h }[6], [x9], #0x2\n" + "b 63f\n" + "60:" // Oddments: Load input (2, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 63f\n" + "ld1 { v10.h }[4], [x9], #0x2\n" + "b 63f\n" + "61:" // Oddments: Load input (2, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 62f\n" "ld1 { v10.s }[0], [x9], #0x4\n" - "tbz %x[n_channels], #0, 33f\n" + "tbz %x[n_channels], #0, 63f\n" "ld1 { v10.h }[2], [x9], #0x2\n" - "b 33f\n" - "32:" // Oddments: Load input (2, 1): Bit 1: Unset + "b 63f\n" + "62:" // Oddments: Load input (2, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v10.h }[0], [x9], #0x2\n" - "33:" // Oddments: Load input (2, 1): Bit 1: End - "fmla v31.8h, v7.8h, v10.8h\n" - "ldr x28, [x16, #0x90]\n" - "fmla v30.8h, v6.8h, v10.8h\n" - "add x28, x28, x14\n" - "fmla v27.8h, v4.8h, v10.8h\n" - "fmla v26.8h, v3.8h, v10.8h\n" - "fmla v23.8h, v1.8h, v10.8h\n" - "fmla v22.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 34f\n" + "63:" // Oddments: Load input (2, 1): Bit 2: End + "ldr x28, [x13, #0x90]\n" + "fmla v16.8h, v7.8h, v10.8h\n" + "fmla v17.8h, v6.8h, v10.8h\n" + "add x28, x28, x12\n" + "fmla v20.8h, v4.8h, v10.8h\n" + "fmla v21.8h, v3.8h, v10.8h\n" + "fmla v24.8h, v1.8h, v10.8h\n" + "fmla v25.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 65f\n" + "ld1 { v11.d }[0], [x28], #0x8\n" + "tbz %x[n_channels], #1, 64f\n" + "ld1 { v11.s }[2], [x28], #0x4\n" + "tbz %x[n_channels], #0, 67f\n" + "ld1 { v11.h }[6], [x28], #0x2\n" + "b 67f\n" + "64:" // Oddments: Load input (5, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 67f\n" + "ld1 { v11.h }[4], [x28], #0x2\n" + "b 67f\n" + "65:" // Oddments: Load input (5, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 66f\n" "ld1 { v11.s }[0], [x28], #0x4\n" - "tbz %x[n_channels], #0, 35f\n" + "tbz %x[n_channels], #0, 67f\n" "ld1 { v11.h }[2], [x28], #0x2\n" - "b 35f\n" - "34:" // Oddments: Load input (5, 4): Bit 1: Unset + "b 67f\n" + "66:" // Oddments: Load input (5, 4): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x28], #0x2\n" - "35:" // Oddments: Load input (5, 4): Bit 1: End - "fmla v17.8h, v8.8h, v11.8h\n" - "ldr x27, [x16, #0x98]\n" - "fmla v16.8h, v7.8h, v11.8h\n" - "add x27, x27, x14\n" - "tbz %x[n_channels], #1, 36f\n" + "67:" // Oddments: Load input (5, 4): Bit 2: End + "ldr x27, [x13, #0x98]\n" + "fmla v30.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v7.8h, v11.8h\n" + "add x27, x27, x12\n" + "tbz %x[n_channels], #2, 69f\n" + "ld1 { v12.d }[0], [x27], #0x8\n" + "tbz %x[n_channels], #1, 68f\n" + "ld1 { v12.s }[2], [x27], #0x4\n" + "tbz %x[n_channels], #0, 71f\n" + "ld1 { v12.h }[6], [x27], #0x2\n" + "b 71f\n" + "68:" // Oddments: Load input (2, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 71f\n" + "ld1 { v12.h }[4], [x27], #0x2\n" + "b 71f\n" + "69:" // Oddments: Load input (2, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 70f\n" "ld1 { v12.s }[0], [x27], #0x4\n" - "tbz %x[n_channels], #0, 37f\n" + "tbz %x[n_channels], #0, 71f\n" "ld1 { v12.h }[2], [x27], #0x2\n" - "b 37f\n" - "36:" // Oddments: Load input (2, 4): Bit 1: Unset + "b 71f\n" + "70:" // Oddments: Load input (2, 4): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x27], #0x2\n" - "37:" // Oddments: Load input (2, 4): Bit 1: End - "fmla v29.8h, v8.8h, v12.8h\n" - "ldr x26, [x16, #0xa0]\n" - "fmla v28.8h, v7.8h, v12.8h\n" - "add x26, x26, x14\n" - "fmla v25.8h, v5.8h, v12.8h\n" - "fmla v24.8h, v4.8h, v12.8h\n" - "fmla v21.8h, v2.8h, v12.8h\n" - "fmla v20.8h, v1.8h, v12.8h\n" - "tbz %x[n_channels], #1, 38f\n" + "71:" // Oddments: Load input (2, 4): Bit 2: End + "ldr x26, [x13, #0xa0]\n" + "fmla v18.8h, v8.8h, v12.8h\n" + "fmla v19.8h, v7.8h, v12.8h\n" + "add x26, x26, x12\n" + "fmla v22.8h, v5.8h, v12.8h\n" + "fmla v23.8h, v4.8h, v12.8h\n" + "fmla v26.8h, v2.8h, v12.8h\n" + "fmla v27.8h, v1.8h, v12.8h\n" + "tbz %x[n_channels], #2, 73f\n" + "ld1 { v10.d }[0], [x26], #0x8\n" + "tbz %x[n_channels], #1, 72f\n" + "ld1 { v10.s }[2], [x26], #0x4\n" + "tbz %x[n_channels], #0, 75f\n" + "ld1 { v10.h }[6], [x26], #0x2\n" + "b 75f\n" + "72:" // Oddments: Load input (0, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 75f\n" + "ld1 { v10.h }[4], [x26], #0x2\n" + "b 75f\n" + "73:" // Oddments: Load input (0, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 74f\n" "ld1 { v10.s }[0], [x26], #0x4\n" - "tbz %x[n_channels], #0, 39f\n" + "tbz %x[n_channels], #0, 75f\n" "ld1 { v10.h }[2], [x26], #0x2\n" - "b 39f\n" - "38:" // Oddments: Load input (0, 2): Bit 1: Unset + "b 75f\n" + "74:" // Oddments: Load input (0, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v10.h }[0], [x26], #0x2\n" - "39:" // Oddments: Load input (0, 2): Bit 1: End - "fmla v31.8h, v2.8h, v10.8h\n" - "ldr x25, [x16, #0xa8]\n" - "fmla v30.8h, v1.8h, v10.8h\n" - "add x25, x25, x14\n" - "fmla v29.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 40f\n" - "ld1 { v11.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 41f\n" - "ld1 { v11.h }[2], [x25], #0x2\n" - "b 41f\n" - "40:" // Oddments: Load input (3, 1): Bit 1: Unset - "ld1 { v11.h }[0], [x25], #0x2\n" - "41:" // Oddments: Load input (3, 1): Bit 1: End - "fmla v27.8h, v7.8h, v11.8h\n" - "ldr x24, [x16, #0xb0]\n" - "fmla v26.8h, v6.8h, v11.8h\n" - "add x24, x24, x14\n" - "fmla v23.8h, v4.8h, v11.8h\n" - "fmla v22.8h, v3.8h, v11.8h\n" - "fmla v19.8h, v1.8h, v11.8h\n" - "fmla v18.8h, v0.8h, v11.8h\n" - "tbz %x[n_channels], #1, 42f\n" - "ld1 { v12.s }[0], [x24], #0x4\n" - "tbz %x[n_channels], #0, 43f\n" - "ld1 { v12.h }[2], [x24], #0x2\n" - "b 43f\n" - "42:" // Oddments: Load input (0, 3): Bit 1: Unset - "ld1 { v12.h }[0], [x24], #0x2\n" - "43:" // Oddments: Load input (0, 3): Bit 1: End - "fmla v30.8h, v2.8h, v12.8h\n" - "ldr x23, [x16, #0xb8]\n" - "fmla v29.8h, v1.8h, v12.8h\n" - "add x23, x23, x14\n" - "fmla v28.8h, v0.8h, v12.8h\n" - "tbz %x[n_channels], #1, 44f\n" + "75:" // Oddments: Load input (0, 2): Bit 2: End + "ldr x24, [x13, #0xa8]\n" + "fmla v16.8h, v2.8h, v10.8h\n" + "fmla v17.8h, v1.8h, v10.8h\n" + "add x24, x24, x12\n" + "fmla v18.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 77f\n" + "ld1 { v11.d }[0], [x24], #0x8\n" + "tbz %x[n_channels], #1, 76f\n" + "ld1 { v11.s }[2], [x24], #0x4\n" + "tbz %x[n_channels], #0, 79f\n" + "ld1 { v11.h }[6], [x24], #0x2\n" + "b 79f\n" + "76:" // Oddments: Load input (3, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 79f\n" + "ld1 { v11.h }[4], [x24], #0x2\n" + "b 79f\n" + "77:" // Oddments: Load input (3, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 78f\n" + "ld1 { v11.s }[0], [x24], #0x4\n" + "tbz %x[n_channels], #0, 79f\n" + "ld1 { v11.h }[2], [x24], #0x2\n" + "b 79f\n" + "78:" // Oddments: Load input (3, 1): Bit 2: Unset: Bit 1: Unset + "ld1 { v11.h }[0], [x24], #0x2\n" + "79:" // Oddments: Load input (3, 1): Bit 2: End + "ldr x25, [x13, #0xb0]\n" + "fmla v20.8h, v7.8h, v11.8h\n" + "fmla v21.8h, v6.8h, v11.8h\n" + "add x25, x25, x12\n" + "fmla v24.8h, v4.8h, v11.8h\n" + "fmla v25.8h, v3.8h, v11.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v0.8h, v11.8h\n" + "tbz %x[n_channels], #2, 81f\n" + "ld1 { v12.d }[0], [x25], #0x8\n" + "tbz %x[n_channels], #1, 80f\n" + "ld1 { v12.s }[2], [x25], #0x4\n" + "tbz %x[n_channels], #0, 83f\n" + "ld1 { v12.h }[6], [x25], #0x2\n" + "b 83f\n" + "80:" // Oddments: Load input (0, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 83f\n" + "ld1 { v12.h }[4], [x25], #0x2\n" + "b 83f\n" + "81:" // Oddments: Load input (0, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 82f\n" + "ld1 { v12.s }[0], [x25], #0x4\n" + "tbz %x[n_channels], #0, 83f\n" + "ld1 { v12.h }[2], [x25], #0x2\n" + "b 83f\n" + "82:" // Oddments: Load input (0, 3): Bit 2: Unset: Bit 1: Unset + "ld1 { v12.h }[0], [x25], #0x2\n" + "83:" // Oddments: Load input (0, 3): Bit 2: End + "ldr x23, [x13, #0xb8]\n" + "fmla v17.8h, v2.8h, v12.8h\n" + "fmla v18.8h, v1.8h, v12.8h\n" + "add x23, x23, x12\n" + "fmla v19.8h, v0.8h, v12.8h\n" + "tbz %x[n_channels], #2, 85f\n" + "ld1 { v10.d }[0], [x23], #0x8\n" + "tbz %x[n_channels], #1, 84f\n" + "ld1 { v10.s }[2], [x23], #0x4\n" + "tbz %x[n_channels], #0, 87f\n" + "ld1 { v10.h }[6], [x23], #0x2\n" + "b 87f\n" + "84:" // Oddments: Load input (2, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 87f\n" + "ld1 { v10.h }[4], [x23], #0x2\n" + "b 87f\n" + "85:" // Oddments: Load input (2, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 86f\n" "ld1 { v10.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 45f\n" + "tbz %x[n_channels], #0, 87f\n" "ld1 { v10.h }[2], [x23], #0x2\n" - "b 45f\n" - "44:" // Oddments: Load input (2, 0): Bit 1: Unset + "b 87f\n" + "86:" // Oddments: Load input (2, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v10.h }[0], [x23], #0x2\n" - "45:" // Oddments: Load input (2, 0): Bit 1: End - "fmla v31.8h, v6.8h, v10.8h\n" - "ldr x10, [x16, #0xc0]\n" - "fmla v27.8h, v3.8h, v10.8h\n" - "add x10, x10, x14\n" - "fmla v23.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 46f\n" + "87:" // Oddments: Load input (2, 0): Bit 2: End + "ldr x10, [x13, #0xc0]\n" + "fmla v16.8h, v6.8h, v10.8h\n" + "fmla v20.8h, v3.8h, v10.8h\n" + "add x10, x10, x12\n" + "fmla v24.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 89f\n" + "ld1 { v11.d }[0], [x10], #0x8\n" + "tbz %x[n_channels], #1, 88f\n" + "ld1 { v11.s }[2], [x10], #0x4\n" + "tbz %x[n_channels], #0, 91f\n" + "ld1 { v11.h }[6], [x10], #0x2\n" + "b 91f\n" + "88:" // Oddments: Load input (3, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 91f\n" + "ld1 { v11.h }[4], [x10], #0x2\n" + "b 91f\n" + "89:" // Oddments: Load input (3, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 90f\n" "ld1 { v11.s }[0], [x10], #0x4\n" - "tbz %x[n_channels], #0, 47f\n" + "tbz %x[n_channels], #0, 91f\n" "ld1 { v11.h }[2], [x10], #0x2\n" - "b 47f\n" - "46:" // Oddments: Load input (3, 4): Bit 1: Unset + "b 91f\n" + "90:" // Oddments: Load input (3, 4): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x10], #0x2\n" - "47:" // Oddments: Load input (3, 4): Bit 1: End - "fmla v25.8h, v8.8h, v11.8h\n" - "ldr x9, [x16, #0xc8]\n" - "fmla v24.8h, v7.8h, v11.8h\n" - "add x9, x9, x14\n" - "fmla v21.8h, v5.8h, v11.8h\n" - "fmla v20.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v2.8h, v11.8h\n" - "fmla v16.8h, v1.8h, v11.8h\n" - "tbz %x[n_channels], #1, 48f\n" + "91:" // Oddments: Load input (3, 4): Bit 2: End + "ldr x9, [x13, #0xc8]\n" + "fmla v22.8h, v8.8h, v11.8h\n" + "fmla v23.8h, v7.8h, v11.8h\n" + "add x9, x9, x12\n" + "fmla v26.8h, v5.8h, v11.8h\n" + "fmla v27.8h, v4.8h, v11.8h\n" + "fmla v30.8h, v2.8h, v11.8h\n" + "fmla v31.8h, v1.8h, v11.8h\n" + "tbz %x[n_channels], #2, 93f\n" + "ld1 { v12.d }[0], [x9], #0x8\n" + "tbz %x[n_channels], #1, 92f\n" + "ld1 { v12.s }[2], [x9], #0x4\n" + "tbz %x[n_channels], #0, 95f\n" + "ld1 { v12.h }[6], [x9], #0x2\n" + "b 95f\n" + "92:" // Oddments: Load input (2, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 95f\n" + "ld1 { v12.h }[4], [x9], #0x2\n" + "b 95f\n" + "93:" // Oddments: Load input (2, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 94f\n" "ld1 { v12.s }[0], [x9], #0x4\n" - "tbz %x[n_channels], #0, 49f\n" + "tbz %x[n_channels], #0, 95f\n" "ld1 { v12.h }[2], [x9], #0x2\n" - "b 49f\n" - "48:" // Oddments: Load input (2, 5): Bit 1: Unset + "b 95f\n" + "94:" // Oddments: Load input (2, 5): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x9], #0x2\n" - "49:" // Oddments: Load input (2, 5): Bit 1: End - "fmla v28.8h, v8.8h, v12.8h\n" - "ldr x28, [x16, #0xd0]\n" - "fmla v24.8h, v5.8h, v12.8h\n" - "add x28, x28, x14\n" - "fmla v20.8h, v2.8h, v12.8h\n" - "tbz %x[n_channels], #1, 50f\n" + "95:" // Oddments: Load input (2, 5): Bit 2: End + "ldr x28, [x13, #0xd0]\n" + "fmla v19.8h, v8.8h, v12.8h\n" + "fmla v23.8h, v5.8h, v12.8h\n" + "add x28, x28, x12\n" + "fmla v27.8h, v2.8h, v12.8h\n" + "tbz %x[n_channels], #2, 97f\n" + "ld1 { v10.d }[0], [x28], #0x8\n" + "tbz %x[n_channels], #1, 96f\n" + "ld1 { v10.s }[2], [x28], #0x4\n" + "tbz %x[n_channels], #0, 99f\n" + "ld1 { v10.h }[6], [x28], #0x2\n" + "b 99f\n" + "96:" // Oddments: Load input (3, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 99f\n" + "ld1 { v10.h }[4], [x28], #0x2\n" + "b 99f\n" + "97:" // Oddments: Load input (3, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 98f\n" "ld1 { v10.s }[0], [x28], #0x4\n" - "tbz %x[n_channels], #0, 51f\n" + "tbz %x[n_channels], #0, 99f\n" "ld1 { v10.h }[2], [x28], #0x2\n" - "b 51f\n" - "50:" // Oddments: Load input (3, 0): Bit 1: Unset + "b 99f\n" + "98:" // Oddments: Load input (3, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v10.h }[0], [x28], #0x2\n" - "51:" // Oddments: Load input (3, 0): Bit 1: End - "fmla v27.8h, v6.8h, v10.8h\n" - "ldr x27, [x16, #0xd8]\n" - "fmla v23.8h, v3.8h, v10.8h\n" - "add x27, x27, x14\n" - "fmla v19.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 52f\n" + "99:" // Oddments: Load input (3, 0): Bit 2: End + "ldr x27, [x13, #0xd8]\n" + "fmla v20.8h, v6.8h, v10.8h\n" + "fmla v24.8h, v3.8h, v10.8h\n" + "add x27, x27, x12\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 101f\n" + "ld1 { v11.d }[0], [x27], #0x8\n" + "tbz %x[n_channels], #1, 100f\n" + "ld1 { v11.s }[2], [x27], #0x4\n" + "tbz %x[n_channels], #0, 103f\n" + "ld1 { v11.h }[6], [x27], #0x2\n" + "b 103f\n" + "100:" // Oddments: Load input (4, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 103f\n" + "ld1 { v11.h }[4], [x27], #0x2\n" + "b 103f\n" + "101:" // Oddments: Load input (4, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 102f\n" "ld1 { v11.s }[0], [x27], #0x4\n" - "tbz %x[n_channels], #0, 53f\n" + "tbz %x[n_channels], #0, 103f\n" "ld1 { v11.h }[2], [x27], #0x2\n" - "b 53f\n" - "52:" // Oddments: Load input (4, 2): Bit 1: Unset + "b 103f\n" + "102:" // Oddments: Load input (4, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x27], #0x2\n" - "53:" // Oddments: Load input (4, 2): Bit 1: End - "fmla v23.8h, v8.8h, v11.8h\n" - "ldr x26, [x16, #0xe0]\n" - "fmla v22.8h, v7.8h, v11.8h\n" - "add x26, x26, x14\n" - "fmla v21.8h, v6.8h, v11.8h\n" - "fmla v19.8h, v5.8h, v11.8h\n" - "fmla v18.8h, v4.8h, v11.8h\n" - "fmla v17.8h, v3.8h, v11.8h\n" - "tbz %x[n_channels], #1, 54f\n" + "103:" // Oddments: Load input (4, 2): Bit 2: End + "ldr x26, [x13, #0xe0]\n" + "fmla v24.8h, v8.8h, v11.8h\n" + "fmla v25.8h, v7.8h, v11.8h\n" + "add x26, x26, x12\n" + "fmla v26.8h, v6.8h, v11.8h\n" + "fmla v28.8h, v5.8h, v11.8h\n" + "fmla v29.8h, v4.8h, v11.8h\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "tbz %x[n_channels], #2, 105f\n" + "ld1 { v12.d }[0], [x26], #0x8\n" + "tbz %x[n_channels], #1, 104f\n" + "ld1 { v12.s }[2], [x26], #0x4\n" + "tbz %x[n_channels], #0, 107f\n" + "ld1 { v12.h }[6], [x26], #0x2\n" + "b 107f\n" + "104:" // Oddments: Load input (3, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 107f\n" + "ld1 { v12.h }[4], [x26], #0x2\n" + "b 107f\n" + "105:" // Oddments: Load input (3, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 106f\n" "ld1 { v12.s }[0], [x26], #0x4\n" - "tbz %x[n_channels], #0, 55f\n" + "tbz %x[n_channels], #0, 107f\n" "ld1 { v12.h }[2], [x26], #0x2\n" - "b 55f\n" - "54:" // Oddments: Load input (3, 5): Bit 1: Unset + "b 107f\n" + "106:" // Oddments: Load input (3, 5): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x26], #0x2\n" - "55:" // Oddments: Load input (3, 5): Bit 1: End - "fmla v24.8h, v8.8h, v12.8h\n" - "ldr x25, [x16, #0xe8]\n" - "fmla v20.8h, v5.8h, v12.8h\n" - "add x25, x25, x14\n" - "fmla v16.8h, v2.8h, v12.8h\n" - "tbz %x[n_channels], #1, 56f\n" - "ld1 { v10.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 57f\n" - "ld1 { v10.h }[2], [x25], #0x2\n" - "b 57f\n" - "56:" // Oddments: Load input (5, 2): Bit 1: Unset - "ld1 { v10.h }[0], [x25], #0x2\n" - "57:" // Oddments: Load input (5, 2): Bit 1: End - "fmla v19.8h, v8.8h, v10.8h\n" - "ldr x24, [x16, #0xf0]\n" - "fmla v18.8h, v7.8h, v10.8h\n" - "add x24, x24, x14\n" - "fmla v17.8h, v6.8h, v10.8h\n" - "tbz %x[n_channels], #1, 58f\n" - "ld1 { v11.s }[0], [x24], #0x4\n" - "tbz %x[n_channels], #0, 59f\n" - "ld1 { v11.h }[2], [x24], #0x2\n" - "b 59f\n" - "58:" // Oddments: Load input (4, 3): Bit 1: Unset - "ld1 { v11.h }[0], [x24], #0x2\n" - "59:" // Oddments: Load input (4, 3): Bit 1: End - "fmla v22.8h, v8.8h, v11.8h\n" - "ldr x23, [x16, #0xf8]\n" - "fmla v21.8h, v7.8h, v11.8h\n" - "add x23, x23, x14\n" - "fmla v20.8h, v6.8h, v11.8h\n" - "fmla v18.8h, v5.8h, v11.8h\n" - "fmla v17.8h, v4.8h, v11.8h\n" - "fmla v16.8h, v3.8h, v11.8h\n" - "tbz %x[n_channels], #1, 60f\n" + "107:" // Oddments: Load input (3, 5): Bit 2: End + "ldr x24, [x13, #0xe8]\n" + "fmla v23.8h, v8.8h, v12.8h\n" + "fmla v27.8h, v5.8h, v12.8h\n" + "add x24, x24, x12\n" + "fmla v31.8h, v2.8h, v12.8h\n" + "tbz %x[n_channels], #2, 109f\n" + "ld1 { v10.d }[0], [x24], #0x8\n" + "tbz %x[n_channels], #1, 108f\n" + "ld1 { v10.s }[2], [x24], #0x4\n" + "tbz %x[n_channels], #0, 111f\n" + "ld1 { v10.h }[6], [x24], #0x2\n" + "b 111f\n" + "108:" // Oddments: Load input (5, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 111f\n" + "ld1 { v10.h }[4], [x24], #0x2\n" + "b 111f\n" + "109:" // Oddments: Load input (5, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 110f\n" + "ld1 { v10.s }[0], [x24], #0x4\n" + "tbz %x[n_channels], #0, 111f\n" + "ld1 { v10.h }[2], [x24], #0x2\n" + "b 111f\n" + "110:" // Oddments: Load input (5, 2): Bit 2: Unset: Bit 1: Unset + "ld1 { v10.h }[0], [x24], #0x2\n" + "111:" // Oddments: Load input (5, 2): Bit 2: End + "ldr x25, [x13, #0xf0]\n" + "fmla v28.8h, v8.8h, v10.8h\n" + "fmla v29.8h, v7.8h, v10.8h\n" + "add x25, x25, x12\n" + "fmla v30.8h, v6.8h, v10.8h\n" + "tbz %x[n_channels], #2, 113f\n" + "ld1 { v11.d }[0], [x25], #0x8\n" + "tbz %x[n_channels], #1, 112f\n" + "ld1 { v11.s }[2], [x25], #0x4\n" + "tbz %x[n_channels], #0, 115f\n" + "ld1 { v11.h }[6], [x25], #0x2\n" + "b 115f\n" + "112:" // Oddments: Load input (4, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 115f\n" + "ld1 { v11.h }[4], [x25], #0x2\n" + "b 115f\n" + "113:" // Oddments: Load input (4, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 114f\n" + "ld1 { v11.s }[0], [x25], #0x4\n" + "tbz %x[n_channels], #0, 115f\n" + "ld1 { v11.h }[2], [x25], #0x2\n" + "b 115f\n" + "114:" // Oddments: Load input (4, 3): Bit 2: Unset: Bit 1: Unset + "ld1 { v11.h }[0], [x25], #0x2\n" + "115:" // Oddments: Load input (4, 3): Bit 2: End + "ldr x23, [x13, #0xf8]\n" + "fmla v25.8h, v8.8h, v11.8h\n" + "fmla v26.8h, v7.8h, v11.8h\n" + "add x23, x23, x12\n" + "fmla v27.8h, v6.8h, v11.8h\n" + "fmla v29.8h, v5.8h, v11.8h\n" + "fmla v30.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v11.8h\n" + "tbz %x[n_channels], #2, 117f\n" + "ld1 { v12.d }[0], [x23], #0x8\n" + "tbz %x[n_channels], #1, 116f\n" + "ld1 { v12.s }[2], [x23], #0x4\n" + "tbz %x[n_channels], #0, 119f\n" + "ld1 { v12.h }[6], [x23], #0x2\n" + "b 119f\n" + "116:" // Oddments: Load input (5, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 119f\n" + "ld1 { v12.h }[4], [x23], #0x2\n" + "b 119f\n" + "117:" // Oddments: Load input (5, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 118f\n" "ld1 { v12.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 61f\n" + "tbz %x[n_channels], #0, 119f\n" "ld1 { v12.h }[2], [x23], #0x2\n" - "b 61f\n" - "60:" // Oddments: Load input (5, 3): Bit 1: Unset + "b 119f\n" + "118:" // Oddments: Load input (5, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x23], #0x2\n" - "61:" // Oddments: Load input (5, 3): Bit 1: End - "fmla v18.8h, v8.8h, v12.8h\n" - "ldr x10, [x16, #0x100]\n" - "fmla v17.8h, v7.8h, v12.8h\n" - "add x10, x10, x14\n" - "fmla v16.8h, v6.8h, v12.8h\n" - "tbz %x[n_channels], #1, 62f\n" + "119:" // Oddments: Load input (5, 3): Bit 2: End + "ldr x10, [x13, #0x100]\n" + "fmla v29.8h, v8.8h, v12.8h\n" + "fmla v30.8h, v7.8h, v12.8h\n" + "add x10, x10, x12\n" + "fmla v31.8h, v6.8h, v12.8h\n" + "tbz %x[n_channels], #2, 121f\n" + "ld1 { v10.d }[0], [x10], #0x8\n" + "tbz %x[n_channels], #1, 120f\n" + "ld1 { v10.s }[2], [x10], #0x4\n" + "tbz %x[n_channels], #0, 123f\n" + "ld1 { v10.h }[6], [x10], #0x2\n" + "b 123f\n" + "120:" // Oddments: Load input (1, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 123f\n" + "ld1 { v10.h }[4], [x10], #0x2\n" + "b 123f\n" + "121:" // Oddments: Load input (1, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 122f\n" "ld1 { v10.s }[0], [x10], #0x4\n" - "tbz %x[n_channels], #0, 63f\n" + "tbz %x[n_channels], #0, 123f\n" "ld1 { v10.h }[2], [x10], #0x2\n" - "b 63f\n" - "62:" // Oddments: Load input (1, 1): Bit 1: Unset + "b 123f\n" + "122:" // Oddments: Load input (1, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v10.h }[0], [x10], #0x2\n" - "63:" // Oddments: Load input (1, 1): Bit 1: End - "fmla v31.8h, v4.8h, v10.8h\n" - "ldr x9, [x16, #0x108]\n" - "fmla v30.8h, v3.8h, v10.8h\n" - "add x9, x9, x14\n" - "fmla v27.8h, v1.8h, v10.8h\n" - "fmla v26.8h, v0.8h, v10.8h\n" - "tbz %x[n_channels], #1, 64f\n" + "123:" // Oddments: Load input (1, 1): Bit 2: End + "ldr x9, [x13, #0x108]\n" + "fmla v16.8h, v4.8h, v10.8h\n" + "fmla v17.8h, v3.8h, v10.8h\n" + "add x9, x9, x12\n" + "fmla v20.8h, v1.8h, v10.8h\n" + "fmla v21.8h, v0.8h, v10.8h\n" + "tbz %x[n_channels], #2, 125f\n" + "ld1 { v11.d }[0], [x9], #0x8\n" + "tbz %x[n_channels], #1, 124f\n" + "ld1 { v11.s }[2], [x9], #0x4\n" + "tbz %x[n_channels], #0, 127f\n" + "ld1 { v11.h }[6], [x9], #0x2\n" + "b 127f\n" + "124:" // Oddments: Load input (1, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 127f\n" + "ld1 { v11.h }[4], [x9], #0x2\n" + "b 127f\n" + "125:" // Oddments: Load input (1, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 126f\n" "ld1 { v11.s }[0], [x9], #0x4\n" - "tbz %x[n_channels], #0, 65f\n" + "tbz %x[n_channels], #0, 127f\n" "ld1 { v11.h }[2], [x9], #0x2\n" - "b 65f\n" - "64:" // Oddments: Load input (1, 4): Bit 1: Unset + "b 127f\n" + "126:" // Oddments: Load input (1, 4): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x9], #0x2\n" - "65:" // Oddments: Load input (1, 4): Bit 1: End - "fmla v29.8h, v5.8h, v11.8h\n" - "ldr x28, [x16, #0x110]\n" - "fmla v28.8h, v4.8h, v11.8h\n" - "add x28, x28, x14\n" - "fmla v25.8h, v2.8h, v11.8h\n" - "fmla v24.8h, v1.8h, v11.8h\n" - "tbz %x[n_channels], #1, 66f\n" + "127:" // Oddments: Load input (1, 4): Bit 2: End + "ldr x28, [x13, #0x110]\n" + "fmla v18.8h, v5.8h, v11.8h\n" + "fmla v19.8h, v4.8h, v11.8h\n" + "add x28, x28, x12\n" + "fmla v22.8h, v2.8h, v11.8h\n" + "fmla v23.8h, v1.8h, v11.8h\n" + "tbz %x[n_channels], #2, 129f\n" + "ld1 { v12.d }[0], [x28], #0x8\n" + "tbz %x[n_channels], #1, 128f\n" + "ld1 { v12.s }[2], [x28], #0x4\n" + "tbz %x[n_channels], #0, 131f\n" + "ld1 { v12.h }[6], [x28], #0x2\n" + "b 131f\n" + "128:" // Oddments: Load input (4, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 131f\n" + "ld1 { v12.h }[4], [x28], #0x2\n" + "b 131f\n" + "129:" // Oddments: Load input (4, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 130f\n" "ld1 { v12.s }[0], [x28], #0x4\n" - "tbz %x[n_channels], #0, 67f\n" + "tbz %x[n_channels], #0, 131f\n" "ld1 { v12.h }[2], [x28], #0x2\n" - "b 67f\n" - "66:" // Oddments: Load input (4, 1): Bit 1: Unset + "b 131f\n" + "130:" // Oddments: Load input (4, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x28], #0x2\n" - "67:" // Oddments: Load input (4, 1): Bit 1: End - "fmla v23.8h, v7.8h, v12.8h\n" - "ldr x27, [x16, #0x118]\n" - "fmla v22.8h, v6.8h, v12.8h\n" - "add x27, x27, x14\n" - "fmla v19.8h, v4.8h, v12.8h\n" - "fmla v18.8h, v3.8h, v12.8h\n" - "tbz %x[n_channels], #1, 68f\n" + "131:" // Oddments: Load input (4, 1): Bit 2: End + "ldr x27, [x13, #0x118]\n" + "fmla v24.8h, v7.8h, v12.8h\n" + "fmla v25.8h, v6.8h, v12.8h\n" + "add x27, x27, x12\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "tbz %x[n_channels], #2, 133f\n" + "ld1 { v10.d }[0], [x27], #0x8\n" + "tbz %x[n_channels], #1, 132f\n" + "ld1 { v10.s }[2], [x27], #0x4\n" + "tbz %x[n_channels], #0, 135f\n" + "ld1 { v10.h }[6], [x27], #0x2\n" + "b 135f\n" + "132:" // Oddments: Load input (4, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 135f\n" + "ld1 { v10.h }[4], [x27], #0x2\n" + "b 135f\n" + "133:" // Oddments: Load input (4, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 134f\n" "ld1 { v10.s }[0], [x27], #0x4\n" - "tbz %x[n_channels], #0, 69f\n" + "tbz %x[n_channels], #0, 135f\n" "ld1 { v10.h }[2], [x27], #0x2\n" - "b 69f\n" - "68:" // Oddments: Load input (4, 4): Bit 1: Unset + "b 135f\n" + "134:" // Oddments: Load input (4, 4): Bit 2: Unset: Bit 1: Unset "ld1 { v10.h }[0], [x27], #0x2\n" - "69:" // Oddments: Load input (4, 4): Bit 1: End - "fmla v21.8h, v8.8h, v10.8h\n" - "fmla v20.8h, v7.8h, v10.8h\n" - "fmla v17.8h, v5.8h, v10.8h\n" - "fmla v16.8h, v4.8h, v10.8h\n" - "fmax v31.8h, v31.8h, v15.8h\n" - "fmax v30.8h, v30.8h, v15.8h\n" - "fmax v29.8h, v29.8h, v15.8h\n" - "fmin v31.8h, v31.8h, v14.8h\n" - "fmin v30.8h, v30.8h, v14.8h\n" - "fmin v29.8h, v29.8h, v14.8h\n" - "fmax v28.8h, v28.8h, v15.8h\n" - "fmax v27.8h, v27.8h, v15.8h\n" - "fmax v26.8h, v26.8h, v15.8h\n" - "fmin v28.8h, v28.8h, v14.8h\n" - "fmin v27.8h, v27.8h, v14.8h\n" - "fmin v26.8h, v26.8h, v14.8h\n" - "fmax v25.8h, v25.8h, v15.8h\n" - "fmax v24.8h, v24.8h, v15.8h\n" - "fmax v23.8h, v23.8h, v15.8h\n" - "fmin v25.8h, v25.8h, v14.8h\n" - "fmin v24.8h, v24.8h, v14.8h\n" - "fmin v23.8h, v23.8h, v14.8h\n" - "fmax v22.8h, v22.8h, v15.8h\n" - "fmax v21.8h, v21.8h, v15.8h\n" - "fmax v20.8h, v20.8h, v15.8h\n" - "fmin v22.8h, v22.8h, v14.8h\n" - "fmin v21.8h, v21.8h, v14.8h\n" - "fmin v20.8h, v20.8h, v14.8h\n" - "fmax v19.8h, v19.8h, v15.8h\n" - "fmax v18.8h, v18.8h, v15.8h\n" - "fmax v17.8h, v17.8h, v15.8h\n" - "fmin v19.8h, v19.8h, v14.8h\n" - "fmin v18.8h, v18.8h, v14.8h\n" - "fmin v17.8h, v17.8h, v14.8h\n" + "135:" // Oddments: Load input (4, 4): Bit 2: End + "fmla v26.8h, v8.8h, v10.8h\n" + "fmla v27.8h, v7.8h, v10.8h\n" "fmax v16.8h, v16.8h, v15.8h\n" + "fmla v30.8h, v5.8h, v10.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "fmax v17.8h, v17.8h, v15.8h\n" + "fmax v18.8h, v18.8h, v15.8h\n" + "fmax v19.8h, v19.8h, v15.8h\n" + "fmax v20.8h, v20.8h, v15.8h\n" + "fmax v21.8h, v21.8h, v15.8h\n" + "fmax v22.8h, v22.8h, v15.8h\n" + "fmax v23.8h, v23.8h, v15.8h\n" + "fmax v24.8h, v24.8h, v15.8h\n" + "fmax v25.8h, v25.8h, v15.8h\n" + "fmax v26.8h, v26.8h, v15.8h\n" + "fmax v27.8h, v27.8h, v15.8h\n" + "fmax v28.8h, v28.8h, v15.8h\n" + "fmax v29.8h, v29.8h, v15.8h\n" + "fmax v30.8h, v30.8h, v15.8h\n" + "fmax v31.8h, v31.8h, v15.8h\n" "fmin v16.8h, v16.8h, v14.8h\n" - "tbz %x[n_channels], #1, 70f\n" - "ldr x22, [x17, #0x0]\n" - "ldr x21, [x17, #0x8]\n" - "add x22, x22, x12\n" - "ldr x20, [x17, #0x10]\n" - "ldr x19, [x17, #0x18]\n" - "add x21, x21, x12\n" - "st1 { v31.s }[0], [x22]\n" - "add x20, x20, x12\n" - "st1 { v30.s }[0], [x21]\n" - "ldr x22, [x17, #0x20]\n" - "add x19, x19, x12\n" - "st1 { v29.s }[0], [x20]\n" - "add x22, x22, x12\n" - "st1 { v28.s }[0], [x19]\n" - "ldr x21, [x17, #0x28]\n" - "add x21, x21, x12\n" - "st1 { v27.s }[0], [x22]\n" - "ldr x20, [x17, #0x30]\n" - "add x20, x20, x12\n" - "st1 { v26.s }[0], [x21]\n" - "ldr x19, [x17, #0x38]\n" - "add x19, x19, x12\n" - "st1 { v25.s }[0], [x20]\n" - "ldr x22, [x17, #0x40]\n" - "add x22, x22, x12\n" - "st1 { v24.s }[0], [x19]\n" - "ldr x21, [x17, #0x48]\n" - "add x21, x21, x12\n" - "st1 { v23.s }[0], [x22]\n" - "ldr x20, [x17, #0x50]\n" - "add x20, x20, x12\n" - "st1 { v22.s }[0], [x21]\n" - "ldr x19, [x17, #0x58]\n" - "add x19, x19, x12\n" - "st1 { v21.s }[0], [x20]\n" - "ldr x22, [x17, #0x60]\n" - "add x22, x22, x12\n" - "st1 { v20.s }[0], [x19]\n" - "ldr x21, [x17, #0x68]\n" - "add x21, x21, x12\n" - "st1 { v19.s }[0], [x22]\n" - "ldr x20, [x17, #0x70]\n" - "add x20, x20, x12\n" - "st1 { v18.s }[0], [x21]\n" - "ldr x19, [x17, #0x78]\n" - "add x19, x19, x12\n" - "st1 { v17.s }[0], [x20]\n" - "add x12, x12, #0x4\n" - "st1 { v16.s }[0], [x19]\n" - "tbz %x[n_channels], #0, 71f\n" - "ldr x22, [x17, #0x0]\n" - "ldr x21, [x17, #0x8]\n" - "add x22, x22, x12\n" - "ldr x20, [x17, #0x10]\n" - "ldr x19, [x17, #0x18]\n" - "add x21, x21, x12\n" - "st1 { v31.h }[2], [x22]\n" - "add x20, x20, x12\n" - "st1 { v30.h }[2], [x21]\n" - "ldr x22, [x17, #0x20]\n" - "add x19, x19, x12\n" - "st1 { v29.h }[2], [x20]\n" - "add x22, x22, x12\n" - "st1 { v28.h }[2], [x19]\n" - "ldr x21, [x17, #0x28]\n" - "add x21, x21, x12\n" - "st1 { v27.h }[2], [x22]\n" - "ldr x20, [x17, #0x30]\n" - "add x20, x20, x12\n" - "st1 { v26.h }[2], [x21]\n" - "ldr x19, [x17, #0x38]\n" - "add x19, x19, x12\n" - "st1 { v25.h }[2], [x20]\n" - "ldr x22, [x17, #0x40]\n" - "add x22, x22, x12\n" - "st1 { v24.h }[2], [x19]\n" - "ldr x21, [x17, #0x48]\n" - "add x21, x21, x12\n" - "st1 { v23.h }[2], [x22]\n" - "ldr x20, [x17, #0x50]\n" - "add x20, x20, x12\n" - "st1 { v22.h }[2], [x21]\n" - "ldr x19, [x17, #0x58]\n" - "add x19, x19, x12\n" - "st1 { v21.h }[2], [x20]\n" - "ldr x22, [x17, #0x60]\n" - "add x22, x22, x12\n" - "st1 { v20.h }[2], [x19]\n" - "ldr x21, [x17, #0x68]\n" - "add x21, x21, x12\n" - "st1 { v19.h }[2], [x22]\n" - "ldr x20, [x17, #0x70]\n" - "add x20, x20, x12\n" - "st1 { v18.h }[2], [x21]\n" - "ldr x19, [x17, #0x78]\n" - "add x19, x19, x12\n" - "st1 { v17.h }[2], [x20]\n" - "st1 { v16.h }[2], [x19]\n" - "b 71f\n" - "70:" // Oddments: Store: Bit 1: Unset - "ldr x22, [x17, #0x0]\n" - "add x22, x22, x12\n" - "ldr x21, [x17, #0x8]\n" - "ldr x20, [x17, #0x10]\n" - "add x21, x21, x12\n" - "st1 { v31.h }[0], [x22]\n" - "ldr x19, [x17, #0x18]\n" - "add x20, x20, x12\n" - "st1 { v30.h }[0], [x21]\n" - "add x19, x19, x12\n" - "st1 { v29.h }[0], [x20]\n" - "ldr x22, [x17, #0x20]\n" - "add x22, x22, x12\n" - "st1 { v28.h }[0], [x19]\n" - "ldr x21, [x17, #0x28]\n" - "add x21, x21, x12\n" - "st1 { v27.h }[0], [x22]\n" - "ldr x20, [x17, #0x30]\n" - "add x20, x20, x12\n" - "st1 { v26.h }[0], [x21]\n" - "ldr x19, [x17, #0x38]\n" - "add x19, x19, x12\n" - "st1 { v25.h }[0], [x20]\n" - "ldr x22, [x17, #0x40]\n" - "add x22, x22, x12\n" - "st1 { v24.h }[0], [x19]\n" - "ldr x21, [x17, #0x48]\n" - "add x21, x21, x12\n" - "st1 { v23.h }[0], [x22]\n" - "ldr x20, [x17, #0x50]\n" - "add x20, x20, x12\n" - "st1 { v22.h }[0], [x21]\n" - "ldr x19, [x17, #0x58]\n" - "add x19, x19, x12\n" - "st1 { v21.h }[0], [x20]\n" - "ldr x22, [x17, #0x60]\n" - "add x22, x22, x12\n" - "st1 { v20.h }[0], [x19]\n" - "ldr x21, [x17, #0x68]\n" - "add x21, x21, x12\n" - "st1 { v19.h }[0], [x22]\n" - "ldr x20, [x17, #0x70]\n" - "add x20, x20, x12\n" - "st1 { v18.h }[0], [x21]\n" - "ldr x19, [x17, #0x78]\n" - "add x19, x19, x12\n" - "st1 { v17.h }[0], [x20]\n" - "st1 { v16.h }[0], [x19]\n" - "71:" // Oddments: Store: Bit 1: End + "fmin v17.8h, v17.8h, v14.8h\n" + "fmin v18.8h, v18.8h, v14.8h\n" + "fmin v19.8h, v19.8h, v14.8h\n" + "fmin v20.8h, v20.8h, v14.8h\n" + "fmin v21.8h, v21.8h, v14.8h\n" + "fmin v22.8h, v22.8h, v14.8h\n" + "fmin v23.8h, v23.8h, v14.8h\n" + "fmin v24.8h, v24.8h, v14.8h\n" + "fmin v25.8h, v25.8h, v14.8h\n" + "fmin v26.8h, v26.8h, v14.8h\n" + "fmin v27.8h, v27.8h, v14.8h\n" + "fmin v28.8h, v28.8h, v14.8h\n" + "fmin v29.8h, v29.8h, v14.8h\n" + "fmin v30.8h, v30.8h, v14.8h\n" + "fmin v31.8h, v31.8h, v14.8h\n" + "tbz %x[n_channels], #2, 137f\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "ldr x19, [x15, #0x18]\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.d }[0], [x22]\n" + "st1 { v17.d }[0], [x21]\n" + "ldr x22, [x15, #0x20]\n" + "ldr x21, [x15, #0x28]\n" + "add x22, x22, x11\n" + "st1 { v18.d }[0], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "st1 { v19.d }[0], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.d }[0], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.d }[0], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.d }[0], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.d }[0], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.d }[0], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.d }[0], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.d }[0], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.d }[0], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "add x11, x11, #0x8\n" + "st1 { v28.d }[0], [x22]\n" + "st1 { v29.d }[0], [x21]\n" + "st1 { v30.d }[0], [x20]\n" + "st1 { v31.d }[0], [x19]\n" + "tbz %x[n_channels], #1, 136f\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.s }[2], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "st1 { v17.s }[2], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "st1 { v18.s }[2], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.s }[2], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.s }[2], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.s }[2], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.s }[2], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.s }[2], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.s }[2], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.s }[2], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.s }[2], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.s }[2], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "add x11, x11, #0x4\n" + "st1 { v28.s }[2], [x22]\n" + "st1 { v29.s }[2], [x21]\n" + "st1 { v30.s }[2], [x20]\n" + "st1 { v31.s }[2], [x19]\n" + "tbz %x[n_channels], #0, 139f\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.h }[6], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "st1 { v17.h }[6], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "st1 { v18.h }[6], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.h }[6], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.h }[6], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.h }[6], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.h }[6], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.h }[6], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.h }[6], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.h }[6], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.h }[6], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.h }[6], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "st1 { v28.h }[6], [x22]\n" + "st1 { v29.h }[6], [x21]\n" + "st1 { v30.h }[6], [x20]\n" + "st1 { v31.h }[6], [x19]\n" + "b 139f\n" + "136:" // Oddments: Store: Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 139f\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "add x22, x22, x11\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.h }[4], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "add x22, x22, x11\n" + "st1 { v17.h }[4], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x21, x21, x11\n" + "st1 { v18.h }[4], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.h }[4], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.h }[4], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.h }[4], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.h }[4], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.h }[4], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.h }[4], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.h }[4], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.h }[4], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.h }[4], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "st1 { v28.h }[4], [x22]\n" + "st1 { v29.h }[4], [x21]\n" + "st1 { v30.h }[4], [x20]\n" + "st1 { v31.h }[4], [x19]\n" + "b 139f\n" + "137:" // Oddments: Store: Bit 2: Unset + "tbz %x[n_channels], #1, 138f\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "add x22, x22, x11\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.s }[0], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "add x22, x22, x11\n" + "st1 { v17.s }[0], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x21, x21, x11\n" + "st1 { v18.s }[0], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.s }[0], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.s }[0], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.s }[0], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.s }[0], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.s }[0], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.s }[0], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.s }[0], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.s }[0], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.s }[0], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "add x11, x11, #0x4\n" + "st1 { v28.s }[0], [x22]\n" + "st1 { v29.s }[0], [x21]\n" + "st1 { v30.s }[0], [x20]\n" + "st1 { v31.s }[0], [x19]\n" + "tbz %x[n_channels], #0, 139f\n" + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.h }[2], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "st1 { v17.h }[2], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "st1 { v18.h }[2], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.h }[2], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.h }[2], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.h }[2], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.h }[2], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.h }[2], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.h }[2], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.h }[2], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.h }[2], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.h }[2], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "st1 { v28.h }[2], [x22]\n" + "st1 { v29.h }[2], [x21]\n" + "st1 { v30.h }[2], [x20]\n" + "st1 { v31.h }[2], [x19]\n" + "b 139f\n" + "138:" // Oddments: Store: Bit 2: Unset: Bit 1: Unset + "ldr x22, [x15, #0x0]\n" + "ldr x21, [x15, #0x8]\n" + "add x22, x22, x11\n" + "add x21, x21, x11\n" + "ldr x20, [x15, #0x10]\n" + "ldr x19, [x15, #0x18]\n" + "add x20, x20, x11\n" + "add x19, x19, x11\n" + "st1 { v16.h }[0], [x22]\n" + "ldr x22, [x15, #0x20]\n" + "add x22, x22, x11\n" + "st1 { v17.h }[0], [x21]\n" + "ldr x21, [x15, #0x28]\n" + "add x21, x21, x11\n" + "st1 { v18.h }[0], [x20]\n" + "ldr x20, [x15, #0x30]\n" + "add x20, x20, x11\n" + "st1 { v19.h }[0], [x19]\n" + "ldr x19, [x15, #0x38]\n" + "add x19, x19, x11\n" + "st1 { v20.h }[0], [x22]\n" + "ldr x22, [x15, #0x40]\n" + "add x22, x22, x11\n" + "st1 { v21.h }[0], [x21]\n" + "ldr x21, [x15, #0x48]\n" + "add x21, x21, x11\n" + "st1 { v22.h }[0], [x20]\n" + "ldr x20, [x15, #0x50]\n" + "add x20, x20, x11\n" + "st1 { v23.h }[0], [x19]\n" + "ldr x19, [x15, #0x58]\n" + "add x19, x19, x11\n" + "st1 { v24.h }[0], [x22]\n" + "ldr x22, [x15, #0x60]\n" + "add x22, x22, x11\n" + "st1 { v25.h }[0], [x21]\n" + "ldr x21, [x15, #0x68]\n" + "add x21, x21, x11\n" + "st1 { v26.h }[0], [x20]\n" + "ldr x20, [x15, #0x70]\n" + "add x20, x20, x11\n" + "st1 { v27.h }[0], [x19]\n" + "ldr x19, [x15, #0x78]\n" + "add x19, x19, x11\n" + "st1 { v28.h }[0], [x22]\n" + "st1 { v29.h }[0], [x21]\n" + "st1 { v30.h }[0], [x20]\n" + "st1 { v31.h }[0], [x19]\n" + "139:" // Oddments: Store: Bit 2: End - "72:" // End + "140:" // End : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp index 32a6fb964c..9b2d77fa53 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp @@ -87,260 +87,300 @@ void a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl( ); __asm__ __volatile__( - "mov x6, #0x0\n" - "mov x27, #0x0\n" + "mov x22, #0x0\n" + "mov x26, #0x0\n" "1:" // Tile loop - "str x6, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "mov x26, #0x4\n" - "str x27, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "str x22, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "mov x21, #0x4\n" "mov x25, #0x2\n" - "ldr x7, [%x[params_struct], %[offsetof_args_params]]\n" - "add x24, %x[params_struct], %[offsetof_args_min]\n" - "ldr x23, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" - "add x21, %x[params_struct], %[offsetof_args_max]\n" - "ldr x8, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" - "mov x22, #0x0\n" + "str x26, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x24, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" + "ldr x7, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" + "mul x20, x22, x24\n" // offset = tile_i * ld_input_row + "ldr x23, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" + "madd x20, x26, x7, x20\n" // offset += tile_j * ld_input_col + "ldr x8, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" + "lsl x7, x7, #0x1\n" + "mul x19, x22, x23\n" // offset = tile_i * ld_output_row "ldr x17, [%x[params_struct], %[offsetof_args_inptr]]\n" - "mul x19, x6, x23\n" // offset = tile_i * ld_input_row - "ldr x20, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" - "madd x19, x27, x8, x19\n" // offset += tile_j * ld_input_col - "ldr x16, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" - "mul x19, x19, x26\n" // offset *= kernel_stride * output_size - "ldr x15, [%x[params_struct], %[offsetof_args_outptr]]\n" - "add x17, x17, x19, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) - "ld1r { v19.8h }, [x24]\n" - "add x14, x17, x23, LSL #1\n" - "ld1r { v18.8h }, [x21]\n" - "add x13, x14, x23, LSL #1\n" + "ldr x16, [%x[params_struct], %[offsetof_args_outptr]]\n" + "mov x22, #0x10\n" // cntb _, ALL, #1 + "mul x20, x20, x21\n" // offset *= kernel_stride * output_size + "add x17, x17, x20, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) + "add x15, x17, x24, LSL #1\n" + "ldr x14, [%x[params_struct], %[offsetof_args_params]]\n" + "madd x19, x26, x8, x19\n" // offset += tile_j * ld_output_col + "lsr x21, %x[n_channels], #0x3\n" + "add x13, x15, x24, LSL #1\n" + "mul x19, x19, x25\n" // offset *= output_tile_size + "add x12, x7, x7\n" + "add x11, x13, x24, LSL #1\n" + "add x10, x12, x7\n" + "add x16, x16, x19, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) + "add x20, %x[params_struct], %[offsetof_args_min]\n" + "add x19, %x[params_struct], %[offsetof_args_max]\n" + "ld1r { v19.8h }, [x20]\n" + "ld1r { v18.8h }, [x19]\n" + "add x9, x11, x24, LSL #1\n" + "add x28, x10, x7\n" + "add x27, x16, x23, LSL #1\n" "lsl x8, x8, #0x1\n" - "add x12, x13, x23, LSL #1\n" - "add x11, x12, x23, LSL #1\n" - "add x10, x8, x8\n" - "add x9, x10, x8\n" - "add x28, x9, x8\n" - "mul x19, x6, x20\n" // offset = tile_i * ld_output_row - "madd x19, x27, x16, x19\n" // offset += tile_j * ld_output_col - "mul x19, x19, x25\n" // offset *= output_tile_size - "add x15, x15, x19, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) - "add x27, x15, x20, LSL #1\n" - "lsl x16, x16, #0x1\n" - "mov x21, #0x10\n" // cntb _, ALL, #1 - "sub x20, XZR, x21\n" - "lsr x19, %x[n_channels], #0x3\n" - "cbz x19, 4f\n" - "ldr q17, [x7, #0x0]\n" - "ldr q0, [x7, #0x10]\n" - "cmp x21, x19, LSL #4\n" - "ldr q1, [x7, #0x20]\n" - "ldr q2, [x7, #0x30]\n" - "ldr q3, [x7, #0x40]\n" - "ldr q4, [x7, #0x50]\n" - "ldr q5, [x7, #0x60]\n" - "ldr q6, [x7, #0x70]\n" - "ldr q7, [x7, #0x80]\n" - "ldr q8, [x7, #0x90]\n" - "add x7, x7, #0xa0\n" - "ldr q9, [x13, x10]\n" + "mov x20, #0x0\n" + "sub x19, XZR, x22\n" + "cbz x21, 4f\n" + "ldr q17, [x14, #0x0]\n" + "cmp x22, x21, LSL #4\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "ldr q2, [x14, #0x30]\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "ldr q9, [x13, x12]\n" + "add x14, x14, #0xa0\n" "ld1 { v10.8h }, [x17]\n" - "ldr q11, [x17, x8]\n" - "ldr q12, [x17, x9]\n" + "ldr q11, [x17, x7]\n" + "ldr q12, [x17, x10]\n" "ldr q13, [x17, x28]\n" - "ld1 { v14.8h }, [x14]\n" - "ldr q15, [x14, x8]\n" - "ldr q16, [x17, x10]\n" + "ld1 { v14.8h }, [x15]\n" + "ldr q15, [x15, x7]\n" + "ldr q16, [x17, x12]\n" "bge 3f\n" "2:" // Tile loop: Channel loop - "mov v31.16b, v17.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "add x20, x20, #0x10\n" - "mov v30.16b, v17.16b\n fmla v30.8h, v6.8h, v9.8h\n" + "mov v28.16b, v17.16b\n fmla v28.8h, v8.8h, v9.8h\n" + "mov v29.16b, v17.16b\n fmla v29.8h, v6.8h, v9.8h\n" "add x22, x22, #0x10\n" - "mov v29.16b, v17.16b\n fmla v29.8h, v2.8h, v9.8h\n" "add x17, x17, #0x10\n" - "mov v28.16b, v17.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "ldr q17, [x7, #0x0]\n" - "add x21, x21, #0x10\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ld1 { v10.8h }, [x17]\n" - "cmp x21, x19, LSL #4\n" - "fmla v30.8h, v1.8h, v12.8h\n" - "ldr q12, [x14, x28]\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x14, x9]\n" - "fmla v30.8h, v2.8h, v13.8h\n" - "ldr q13, [x14, x10]\n" - "add x14, x14, #0x10\n" - "fmla v31.8h, v3.8h, v14.8h\n" - "ld1 { v14.8h }, [x12]\n" - "fmla v30.8h, v0.8h, v16.8h\n" - "fmla v31.8h, v4.8h, v15.8h\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v1.8h, v12.8h\n" + "ldr q12, [x15, x28]\n" + "cmp x22, x21, LSL #4\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v2.8h, v13.8h\n" + "ldr q11, [x15, x10]\n" + "ldr q13, [x15, x12]\n" + "fmla v28.8h, v3.8h, v14.8h\n" + "fmla v29.8h, v0.8h, v16.8h\n" + "ld1 { v14.8h }, [x11]\n" + "add x15, x15, #0x10\n" + "fmla v28.8h, v4.8h, v15.8h\n" + "fmla v29.8h, v4.8h, v11.8h\n" "ld1 { v15.8h }, [x13]\n" - "fmla v29.8h, v3.8h, v14.8h\n" - "ldr q14, [x12, x28]\n" + "ldr q11, [x11, x7]\n" + "fmla v28.8h, v2.8h, v16.8h\n" + "fmla v29.8h, v5.8h, v12.8h\n" + "ldr q12, [x13, x10]\n" + "ldr q16, [x13, x7]\n" + "mov v30.16b, v17.16b\n fmla v30.8h, v2.8h, v9.8h\n" + "mov v31.16b, v17.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "add x19, x19, #0x10\n" + "add x20, x20, #0x10\n" + "fmla v28.8h, v5.8h, v13.8h\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "ldr q13, [x11, x10]\n" + "ld1 { v10.8h }, [x17]\n" + "fmla v30.8h, v3.8h, v14.8h\n" + "fmla v31.8h, v4.8h, v13.8h\n" + "ldr q14, [x11, x28]\n" + "ldr q13, [x9, x7]\n" + "fmla v30.8h, v0.8h, v15.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "ldr q17, [x14, #0x0]\n" + "ldr q0, [x14, #0x10]\n" "fmla v30.8h, v4.8h, v11.8h\n" - "ldr q11, [x12, x8]\n" - "fmla v31.8h, v2.8h, v16.8h\n" - "ldr q16, [x13, x8]\n" - "fmla v29.8h, v0.8h, v15.8h\n" - "ldr q0, [x7, #0x10]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr q12, [x13, x9]\n" - "fmla v31.8h, v5.8h, v13.8h\n" - "fmla v29.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v14.8h\n" "ldr q11, [x13, x28]\n" + "ldr q14, [x9, x10]\n" + "fmla v28.8h, v6.8h, v15.8h\n" + "fmla v30.8h, v1.8h, v16.8h\n" + "ld1 { v15.8h }, [x9]\n" "add x13, x13, #0x10\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "ldr q13, [x12, x9]\n" - "ldr q9, [x13, x10]\n" - "fmla v31.8h, v6.8h, v15.8h\n" - "ld1 { v15.8h }, [x11]\n" - "fmla v29.8h, v1.8h, v16.8h\n" - "fmla v28.8h, v4.8h, v13.8h\n" - "ldr q13, [x11, x8]\n" - "fmla v30.8h, v7.8h, v12.8h\n" - "ldr q4, [x7, #0x50]\n" - "fmla v31.8h, v7.8h, v16.8h\n" - "ldr q16, [x12, x10]\n" - "add x12, x12, #0x10\n" - "fmla v29.8h, v6.8h, v15.8h\n" - "ldr q15, [x11, x10]\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "ldr q12, [x17, x9]\n" - "fmla v30.8h, v8.8h, v11.8h\n" - "ldr q1, [x7, #0x20]\n" - "fmax v31.8h, v31.8h, v19.8h\n" - "fmla v29.8h, v7.8h, v13.8h\n" - "ldr q13, [x17, x28]\n" - "fmla v28.8h, v5.8h, v14.8h\n" - "ldr q14, [x11, x9]\n" - "fmax v30.8h, v30.8h, v19.8h\n" - "fmin v31.8h, v31.8h, v18.8h\n" - "st1 { v31.8h }, [x15]\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v5.8h, v16.8h\n" - "ldr q11, [x11, x28]\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "fmla v28.8h, v7.8h, v16.8h\n" + "ldr q16, [x11, x12]\n" + "fmax v28.8h, v28.8h, v19.8h\n" + "fmla v30.8h, v6.8h, v15.8h\n" + "fmla v31.8h, v3.8h, v16.8h\n" + "ldr q15, [x9, x12]\n" + "fmin v28.8h, v28.8h, v18.8h\n" + "fmla v30.8h, v7.8h, v13.8h\n" + "fmla v31.8h, v7.8h, v14.8h\n" "add x11, x11, #0x10\n" - "fmin v30.8h, v30.8h, v18.8h\n" - "ldr q2, [x7, #0x30]\n" - "ldr q5, [x7, #0x60]\n" - "fmla v28.8h, v3.8h, v16.8h\n" - "ldr q16, [x17, x10]\n" - "fmla v29.8h, v8.8h, v15.8h\n" - "str q30, [x15, x16]\n" - "add x15, x15, #0x10\n" - "fmla v28.8h, v7.8h, v14.8h\n" - "ld1 { v14.8h }, [x14]\n" + "ldr q9, [x13, x12]\n" + "fmla v29.8h, v7.8h, v12.8h\n" + "fmla v30.8h, v5.8h, v16.8h\n" + "ldr q12, [x17, x10]\n" + "ldr q13, [x17, x28]\n" + "fmla v31.8h, v6.8h, v15.8h\n" + "fmla v29.8h, v8.8h, v11.8h\n" + "ldr q11, [x9, x28]\n" "fmax v29.8h, v29.8h, v19.8h\n" - "ldr q3, [x7, #0x40]\n" - "ldr q7, [x7, #0x80]\n" + "fmla v30.8h, v8.8h, v15.8h\n" + "fmla v31.8h, v8.8h, v11.8h\n" + "fmax v30.8h, v30.8h, v19.8h\n" + "add x9, x9, #0x10\n" + "fmax v31.8h, v31.8h, v19.8h\n" "fmin v29.8h, v29.8h, v18.8h\n" - "st1 { v29.8h }, [x27]\n" - "fmla v28.8h, v6.8h, v15.8h\n" - "ldr q15, [x14, x8]\n" - "fmla v28.8h, v8.8h, v11.8h\n" - "ldr q11, [x17, x8]\n" - "ldr q6, [x7, #0x70]\n" - "fmax v28.8h, v28.8h, v19.8h\n" - "ldr q8, [x7, #0x90]\n" - "add x7, x7, #0xa0\n" - "fmin v28.8h, v28.8h, v18.8h\n" - "str q28, [x27, x16]\n" + "ldr q11, [x17, x7]\n" + "ld1 { v14.8h }, [x15]\n" + "fmin v30.8h, v30.8h, v18.8h\n" + "fmin v31.8h, v31.8h, v18.8h\n" + "ldr q15, [x15, x7]\n" + "ldr q16, [x17, x12]\n" + "st1 { v28.8h }, [x16]\n" + "ldr q1, [x14, #0x20]\n" + "ldr q2, [x14, #0x30]\n" + "str q29, [x16, x8]\n" + "add x16, x16, #0x10\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "st1 { v30.8h }, [x27]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "str q31, [x27, x8]\n" "add x27, x27, #0x10\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "add x14, x14, #0xa0\n" "blt 2b\n" "3:" // Tile loop: Channel tail - "mov v31.16b, v17.16b\n fmla v31.8h, v8.8h, v9.8h\n" + "mov v28.16b, v17.16b\n fmla v28.8h, v8.8h, v9.8h\n" + "mov v29.16b, v17.16b\n fmla v29.8h, v6.8h, v9.8h\n" "add x17, x17, #0x10\n" - "mov v30.16b, v17.16b\n fmla v30.8h, v6.8h, v9.8h\n" - "mov v29.16b, v17.16b\n fmla v29.8h, v2.8h, v9.8h\n" - "mov v28.16b, v17.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "fmla v30.8h, v1.8h, v12.8h\n" - "ldr q12, [x14, x28]\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x14, x9]\n" - "fmla v30.8h, v2.8h, v13.8h\n" - "ldr q13, [x14, x10]\n" - "add x14, x14, #0x10\n" - "fmla v31.8h, v3.8h, v14.8h\n" - "ld1 { v14.8h }, [x12]\n" - "fmla v30.8h, v0.8h, v16.8h\n" - "fmla v31.8h, v4.8h, v15.8h\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v1.8h, v12.8h\n" + "ldr q12, [x15, x28]\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v2.8h, v13.8h\n" + "ldr q11, [x15, x10]\n" + "ldr q13, [x15, x12]\n" + "fmla v28.8h, v3.8h, v14.8h\n" + "fmla v29.8h, v0.8h, v16.8h\n" + "ld1 { v14.8h }, [x11]\n" + "add x15, x15, #0x10\n" + "fmla v28.8h, v4.8h, v15.8h\n" + "fmla v29.8h, v4.8h, v11.8h\n" "ld1 { v15.8h }, [x13]\n" + "ldr q11, [x11, x7]\n" + "fmla v28.8h, v2.8h, v16.8h\n" + "fmla v29.8h, v5.8h, v12.8h\n" + "ldr q12, [x13, x10]\n" + "ldr q16, [x13, x7]\n" + "mov v30.16b, v17.16b\n fmla v30.8h, v2.8h, v9.8h\n" + "mov v31.16b, v17.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "fmla v28.8h, v5.8h, v13.8h\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "ldr q13, [x11, x10]\n" + "fmla v30.8h, v3.8h, v14.8h\n" + "fmla v31.8h, v4.8h, v13.8h\n" + "ldr q14, [x11, x28]\n" + "ldr q13, [x9, x7]\n" + "fmla v30.8h, v0.8h, v15.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" "fmla v30.8h, v4.8h, v11.8h\n" - "ldr q11, [x12, x8]\n" - "fmla v29.8h, v3.8h, v14.8h\n" - "ldr q14, [x12, x28]\n" - "fmla v31.8h, v2.8h, v16.8h\n" - "ldr q16, [x13, x8]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr q12, [x13, x9]\n" - "fmla v29.8h, v0.8h, v15.8h\n" - "fmla v31.8h, v5.8h, v13.8h\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "ldr q13, [x12, x9]\n" - "fmla v29.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v14.8h\n" "ldr q11, [x13, x28]\n" + "ldr q14, [x9, x10]\n" + "fmla v28.8h, v6.8h, v15.8h\n" + "fmla v30.8h, v1.8h, v16.8h\n" + "ld1 { v15.8h }, [x9]\n" "add x13, x13, #0x10\n" - "fmla v31.8h, v6.8h, v15.8h\n" - "ld1 { v15.8h }, [x11]\n" - "fmla v30.8h, v7.8h, v12.8h\n" - "fmla v29.8h, v1.8h, v16.8h\n" - "fmla v28.8h, v4.8h, v13.8h\n" - "ldr q13, [x11, x8]\n" - "fmla v31.8h, v7.8h, v16.8h\n" - "ldr q16, [x12, x10]\n" - "add x12, x12, #0x10\n" - "fmla v29.8h, v6.8h, v15.8h\n" - "ldr q15, [x11, x10]\n" - "fmla v30.8h, v8.8h, v11.8h\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "fmax v31.8h, v31.8h, v19.8h\n" - "fmla v29.8h, v7.8h, v13.8h\n" - "fmax v30.8h, v30.8h, v19.8h\n" - "fmla v28.8h, v5.8h, v14.8h\n" - "ldr q14, [x11, x9]\n" - "fmin v31.8h, v31.8h, v18.8h\n" - "st1 { v31.8h }, [x15]\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v5.8h, v16.8h\n" - "ldr q11, [x11, x28]\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "fmla v28.8h, v7.8h, v16.8h\n" + "ldr q16, [x11, x12]\n" + "fmax v28.8h, v28.8h, v19.8h\n" + "fmla v30.8h, v6.8h, v15.8h\n" + "fmla v31.8h, v3.8h, v16.8h\n" + "ldr q15, [x9, x12]\n" + "fmin v28.8h, v28.8h, v18.8h\n" + "fmla v30.8h, v7.8h, v13.8h\n" + "fmla v31.8h, v7.8h, v14.8h\n" + "st1 { v28.8h }, [x16]\n" "add x11, x11, #0x10\n" - "fmin v30.8h, v30.8h, v18.8h\n" - "str q30, [x15, x16]\n" - "fmla v28.8h, v3.8h, v16.8h\n" - "add x15, x15, #0x10\n" - "fmla v29.8h, v8.8h, v15.8h\n" - "fmla v28.8h, v7.8h, v14.8h\n" + "fmla v29.8h, v7.8h, v12.8h\n" + "fmla v30.8h, v5.8h, v16.8h\n" + "fmla v31.8h, v6.8h, v15.8h\n" + "fmla v29.8h, v8.8h, v11.8h\n" + "ldr q11, [x9, x28]\n" "fmax v29.8h, v29.8h, v19.8h\n" - "fmla v28.8h, v6.8h, v15.8h\n" + "fmla v30.8h, v8.8h, v15.8h\n" + "fmla v31.8h, v8.8h, v11.8h\n" + "fmax v30.8h, v30.8h, v19.8h\n" + "add x9, x9, #0x10\n" + "fmax v31.8h, v31.8h, v19.8h\n" "fmin v29.8h, v29.8h, v18.8h\n" - "st1 { v29.8h }, [x27]\n" - "fmla v28.8h, v8.8h, v11.8h\n" - "fmax v28.8h, v28.8h, v19.8h\n" - "fmin v28.8h, v28.8h, v18.8h\n" - "str q28, [x27, x16]\n" + "str q29, [x16, x8]\n" + "add x16, x16, #0x10\n" + "fmin v30.8h, v30.8h, v18.8h\n" + "fmin v31.8h, v31.8h, v18.8h\n" + "st1 { v30.8h }, [x27]\n" + "str q31, [x27, x8]\n" "add x27, x27, #0x10\n" "4:" // Tile loop: Oddments - "tst %x[n_channels], #0x1\n" - "beq 43f\n" - "ldr q17, [x7, #0x0]\n" - "ldr q0, [x7, #0x10]\n" - "add x26, x13, x10\n" - "ldr q1, [x7, #0x20]\n" + "tst %x[n_channels], #0x7\n" + "beq 81f\n" + "ldr q17, [x14, #0x0]\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "ldr q2, [x14, #0x30]\n" + "add x26, x13, x12\n" "add x25, x17, XZR\n" - "ldr q2, [x7, #0x30]\n" - "add x24, x17, x8\n" - "ldr q3, [x7, #0x40]\n" - "add x23, x17, x9\n" - "ldr q4, [x7, #0x50]\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "add x24, x17, x7\n" + "add x23, x17, x10\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" "add x22, x17, x28\n" - "ldr q5, [x7, #0x60]\n" - "add x21, x14, XZR\n" - "ldr q6, [x7, #0x70]\n" - "add x20, x14, x8\n" - "ldr q7, [x7, #0x80]\n" - "add x19, x17, x10\n" - "ldr q8, [x7, #0x90]\n" + "add x21, x15, XZR\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "add x20, x15, x7\n" + "add x19, x17, x12\n" + "tbz %x[n_channels], #2, 6f\n" + "ldr d9, [x26], #0x8\n" + "ldr d10, [x25], #0x8\n" + "ldr d11, [x24], #0x8\n" + "ldr d12, [x23], #0x8\n" + "ldr d13, [x22], #0x8\n" + "ldr d14, [x21], #0x8\n" + "ldr d15, [x20], #0x8\n" + "ldr d16, [x19], #0x8\n" "tbz %x[n_channels], #1, 5f\n" + "ld1 { v9.s }[2], [x26], #0x4\n" + "ld1 { v10.s }[2], [x25], #0x4\n" + "ld1 { v11.s }[2], [x24], #0x4\n" + "ld1 { v12.s }[2], [x23], #0x4\n" + "ld1 { v13.s }[2], [x22], #0x4\n" + "ld1 { v14.s }[2], [x21], #0x4\n" + "ld1 { v15.s }[2], [x20], #0x4\n" + "ld1 { v16.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 8f\n" + "ld1 { v9.h }[6], [x26]\n" + "ld1 { v10.h }[6], [x25]\n" + "ld1 { v11.h }[6], [x24]\n" + "ld1 { v12.h }[6], [x23]\n" + "ld1 { v13.h }[6], [x22]\n" + "ld1 { v14.h }[6], [x21]\n" + "ld1 { v15.h }[6], [x20]\n" + "ld1 { v16.h }[6], [x19]\n" + "b 8f\n" + "5:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 8f\n" + "ld1 { v9.h }[4], [x26]\n" + "ld1 { v10.h }[4], [x25]\n" + "ld1 { v11.h }[4], [x24]\n" + "ld1 { v12.h }[4], [x23]\n" + "ld1 { v13.h }[4], [x22]\n" + "ld1 { v14.h }[4], [x21]\n" + "ld1 { v15.h }[4], [x20]\n" + "ld1 { v16.h }[4], [x19]\n" + "b 8f\n" + "6:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 7f\n" "ldr s9, [x26], #0x4\n" "ldr s10, [x25], #0x4\n" "ldr s11, [x24], #0x4\n" @@ -349,7 +389,7 @@ void a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl( "ldr s14, [x21], #0x4\n" "ldr s15, [x20], #0x4\n" "ldr s16, [x19], #0x4\n" - "tbz %x[n_channels], #0, 6f\n" + "tbz %x[n_channels], #0, 8f\n" "ld1 { v9.h }[2], [x26]\n" "ld1 { v10.h }[2], [x25]\n" "ld1 { v11.h }[2], [x24]\n" @@ -358,8 +398,8 @@ void a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl( "ld1 { v14.h }[2], [x21]\n" "ld1 { v15.h }[2], [x20]\n" "ld1 { v16.h }[2], [x19]\n" - "b 6f\n" - "5:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 1: Unset + "b 8f\n" + "7:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 2: Unset: Bit 1: Unset "ldr h9, [x26, #0x0]\n" "ldr h10, [x25, #0x0]\n" "ldr h11, [x24, #0x0]\n" @@ -368,245 +408,485 @@ void a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl( "ldr h14, [x21, #0x0]\n" "ldr h15, [x20, #0x0]\n" "ldr h16, [x19, #0x0]\n" - "6:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 1: End - "mov v31.16b, v17.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "add x19, x14, x9\n" - "mov v30.16b, v17.16b\n fmla v30.8h, v6.8h, v9.8h\n" - "mov v29.16b, v17.16b\n fmla v29.8h, v2.8h, v9.8h\n" - "mov v28.16b, v17.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "fmla v30.8h, v1.8h, v12.8h\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "fmla v30.8h, v2.8h, v13.8h\n" - "fmla v31.8h, v3.8h, v14.8h\n" - "fmla v30.8h, v0.8h, v16.8h\n" - "fmla v31.8h, v4.8h, v15.8h\n" - "fmla v31.8h, v2.8h, v16.8h\n" - "tbz %x[n_channels], #1, 7f\n" + "8:" // Tile loop: Oddments: Load inputs: (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 2: End + "mov v28.16b, v17.16b\n fmla v28.8h, v8.8h, v9.8h\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "add x19, x15, x10\n" + "mov v29.16b, v17.16b\n fmla v29.8h, v6.8h, v9.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v1.8h, v12.8h\n" + "fmla v28.8h, v3.8h, v14.8h\n" + "fmla v29.8h, v2.8h, v13.8h\n" + "fmla v28.8h, v4.8h, v15.8h\n" + "mov v30.16b, v17.16b\n fmla v30.8h, v2.8h, v9.8h\n" + "mov v31.16b, v17.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "fmla v28.8h, v2.8h, v16.8h\n" + "fmla v29.8h, v0.8h, v16.8h\n" + "tbz %x[n_channels], #2, 10f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 9f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 12f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 12f\n" + "9:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 12f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 12f\n" + "10:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 11f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 8f\n" + "tbz %x[n_channels], #0, 12f\n" "ld1 { v11.h }[2], [x19]\n" - "b 8f\n" - "7:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: Unset + "b 12f\n" + "11:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "8:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: End - "fmla v30.8h, v4.8h, v11.8h\n" - "add x19, x14, x28\n" - "tbz %x[n_channels], #1, 9f\n" + "12:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: End + "fmla v29.8h, v4.8h, v11.8h\n" + "add x19, x15, x28\n" + "tbz %x[n_channels], #2, 14f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 13f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 16f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 16f\n" + "13:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 16f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 16f\n" + "14:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 15f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 10f\n" + "tbz %x[n_channels], #0, 16f\n" "ld1 { v12.h }[2], [x19]\n" - "b 10f\n" - "9:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 1: Unset + "b 16f\n" + "15:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "10:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 1: End - "fmla v30.8h, v5.8h, v12.8h\n" - "add x19, x14, x10\n" - "tbz %x[n_channels], #1, 11f\n" + "16:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: End + "fmla v29.8h, v5.8h, v12.8h\n" + "add x19, x15, x12\n" + "tbz %x[n_channels], #2, 18f\n" + "ldr d13, [x19], #0x8\n" + "tbz %x[n_channels], #1, 17f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 20f\n" + "ld1 { v13.h }[6], [x19]\n" + "b 20f\n" + "17:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 20f\n" + "ld1 { v13.h }[4], [x19]\n" + "b 20f\n" + "18:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 19f\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 12f\n" + "tbz %x[n_channels], #0, 20f\n" "ld1 { v13.h }[2], [x19]\n" - "b 12f\n" - "11:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 1: Unset + "b 20f\n" + "19:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: Unset: Bit 1: Unset "ldr h13, [x19, #0x0]\n" - "12:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 1: End - "fmla v31.8h, v5.8h, v13.8h\n" - "add x19, x12, XZR\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "tbz %x[n_channels], #1, 13f\n" + "20:" // Tile loop: Oddments: Load inputs: (1, 2): Bit 2: End + "fmla v28.8h, v5.8h, v13.8h\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "add x19, x11, XZR\n" + "tbz %x[n_channels], #2, 22f\n" + "ldr d14, [x19], #0x8\n" + "tbz %x[n_channels], #1, 21f\n" + "ld1 { v14.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 24f\n" + "ld1 { v14.h }[6], [x19]\n" + "b 24f\n" + "21:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 24f\n" + "ld1 { v14.h }[4], [x19]\n" + "b 24f\n" + "22:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 23f\n" "ldr s14, [x19], #0x4\n" - "tbz %x[n_channels], #0, 14f\n" + "tbz %x[n_channels], #0, 24f\n" "ld1 { v14.h }[2], [x19]\n" - "b 14f\n" - "13:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: Unset + "b 24f\n" + "23:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset: Bit 1: Unset "ldr h14, [x19, #0x0]\n" - "14:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: End - "fmla v29.8h, v3.8h, v14.8h\n" + "24:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: End + "fmla v30.8h, v3.8h, v14.8h\n" "add x19, x13, XZR\n" - "tbz %x[n_channels], #1, 15f\n" + "tbz %x[n_channels], #2, 26f\n" + "ldr d15, [x19], #0x8\n" + "tbz %x[n_channels], #1, 25f\n" + "ld1 { v15.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 28f\n" + "ld1 { v15.h }[6], [x19]\n" + "b 28f\n" + "25:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 28f\n" + "ld1 { v15.h }[4], [x19]\n" + "b 28f\n" + "26:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 27f\n" "ldr s15, [x19], #0x4\n" - "tbz %x[n_channels], #0, 16f\n" + "tbz %x[n_channels], #0, 28f\n" "ld1 { v15.h }[2], [x19]\n" - "b 16f\n" - "15:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 1: Unset + "b 28f\n" + "27:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: Unset: Bit 1: Unset "ldr h15, [x19, #0x0]\n" - "16:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 1: End - "fmla v31.8h, v6.8h, v15.8h\n" - "add x19, x12, x8\n" - "fmla v29.8h, v0.8h, v15.8h\n" - "tbz %x[n_channels], #1, 17f\n" + "28:" // Tile loop: Oddments: Load inputs: (2, 0): Bit 2: End + "fmla v28.8h, v6.8h, v15.8h\n" + "fmla v30.8h, v0.8h, v15.8h\n" + "add x19, x11, x7\n" + "tbz %x[n_channels], #2, 30f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 29f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 32f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 32f\n" + "29:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 32f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 32f\n" + "30:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 31f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 18f\n" + "tbz %x[n_channels], #0, 32f\n" "ld1 { v11.h }[2], [x19]\n" - "b 18f\n" - "17:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: Unset + "b 32f\n" + "31:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "18:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: End - "fmla v29.8h, v4.8h, v11.8h\n" - "add x19, x13, x8\n" - "tbz %x[n_channels], #1, 19f\n" + "32:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: End + "fmla v30.8h, v4.8h, v11.8h\n" + "add x19, x13, x7\n" + "tbz %x[n_channels], #2, 34f\n" + "ldr d16, [x19], #0x8\n" + "tbz %x[n_channels], #1, 33f\n" + "ld1 { v16.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 36f\n" + "ld1 { v16.h }[6], [x19]\n" + "b 36f\n" + "33:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 36f\n" + "ld1 { v16.h }[4], [x19]\n" + "b 36f\n" + "34:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 35f\n" "ldr s16, [x19], #0x4\n" - "tbz %x[n_channels], #0, 20f\n" + "tbz %x[n_channels], #0, 36f\n" "ld1 { v16.h }[2], [x19]\n" - "b 20f\n" - "19:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 1: Unset + "b 36f\n" + "35:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Unset: Bit 1: Unset "ldr h16, [x19, #0x0]\n" - "20:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 1: End - "fmla v31.8h, v7.8h, v16.8h\n" - "add x19, x12, x9\n" - "fmla v29.8h, v1.8h, v16.8h\n" - "tbz %x[n_channels], #1, 21f\n" + "36:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: End + "fmla v28.8h, v7.8h, v16.8h\n" + "fmla v30.8h, v1.8h, v16.8h\n" + "add x19, x11, x10\n" + "tbz %x[n_channels], #2, 38f\n" + "ldr d13, [x19], #0x8\n" + "tbz %x[n_channels], #1, 37f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 40f\n" + "ld1 { v13.h }[6], [x19]\n" + "b 40f\n" + "37:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 40f\n" + "ld1 { v13.h }[4], [x19]\n" + "b 40f\n" + "38:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 39f\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 22f\n" + "tbz %x[n_channels], #0, 40f\n" "ld1 { v13.h }[2], [x19]\n" - "b 22f\n" - "21:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: Unset + "b 40f\n" + "39:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset: Bit 1: Unset "ldr h13, [x19, #0x0]\n" - "22:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: End - "fmla v28.8h, v4.8h, v13.8h\n" - "add x19, x13, x9\n" - "tbz %x[n_channels], #1, 23f\n" + "40:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: End + "fmla v31.8h, v4.8h, v13.8h\n" + "add x19, x13, x10\n" + "tbz %x[n_channels], #2, 42f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 41f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 44f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 44f\n" + "41:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 44f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 44f\n" + "42:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 43f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 24f\n" + "tbz %x[n_channels], #0, 44f\n" "ld1 { v12.h }[2], [x19]\n" - "b 24f\n" - "23:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 1: Unset + "b 44f\n" + "43:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "24:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 1: End - "fmla v30.8h, v7.8h, v12.8h\n" - "add x19, x12, x28\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "tbz %x[n_channels], #1, 25f\n" + "44:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: End + "fmla v29.8h, v7.8h, v12.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "add x19, x11, x28\n" + "tbz %x[n_channels], #2, 46f\n" + "ldr d14, [x19], #0x8\n" + "tbz %x[n_channels], #1, 45f\n" + "ld1 { v14.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 48f\n" + "ld1 { v14.h }[6], [x19]\n" + "b 48f\n" + "45:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 48f\n" + "ld1 { v14.h }[4], [x19]\n" + "b 48f\n" + "46:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 47f\n" "ldr s14, [x19], #0x4\n" - "tbz %x[n_channels], #0, 26f\n" + "tbz %x[n_channels], #0, 48f\n" "ld1 { v14.h }[2], [x19]\n" - "b 26f\n" - "25:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 1: Unset + "b 48f\n" + "47:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Unset: Bit 1: Unset "ldr h14, [x19, #0x0]\n" - "26:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 1: End - "fmla v28.8h, v5.8h, v14.8h\n" - "add x19, x11, XZR\n" - "tbz %x[n_channels], #1, 27f\n" + "48:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: End + "fmla v31.8h, v5.8h, v14.8h\n" + "add x19, x9, XZR\n" + "tbz %x[n_channels], #2, 50f\n" + "ldr d15, [x19], #0x8\n" + "tbz %x[n_channels], #1, 49f\n" + "ld1 { v15.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 52f\n" + "ld1 { v15.h }[6], [x19]\n" + "b 52f\n" + "49:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 52f\n" + "ld1 { v15.h }[4], [x19]\n" + "b 52f\n" + "50:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 51f\n" "ldr s15, [x19], #0x4\n" - "tbz %x[n_channels], #0, 28f\n" + "tbz %x[n_channels], #0, 52f\n" "ld1 { v15.h }[2], [x19]\n" - "b 28f\n" - "27:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 1: Unset + "b 52f\n" + "51:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Unset: Bit 1: Unset "ldr h15, [x19, #0x0]\n" - "28:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 1: End - "fmla v29.8h, v6.8h, v15.8h\n" + "52:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: End + "fmla v30.8h, v6.8h, v15.8h\n" "add x19, x13, x28\n" - "tbz %x[n_channels], #1, 29f\n" + "tbz %x[n_channels], #2, 54f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 53f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 56f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 56f\n" + "53:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 56f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 56f\n" + "54:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 55f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 30f\n" + "tbz %x[n_channels], #0, 56f\n" "ld1 { v11.h }[2], [x19]\n" - "b 30f\n" - "29:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 1: Unset + "b 56f\n" + "55:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "30:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 1: End - "fmla v30.8h, v8.8h, v11.8h\n" - "add x19, x11, x8\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "tbz %x[n_channels], #1, 31f\n" + "56:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: End + "fmla v29.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "add x19, x9, x7\n" + "tbz %x[n_channels], #2, 58f\n" + "ldr d13, [x19], #0x8\n" + "tbz %x[n_channels], #1, 57f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 60f\n" + "ld1 { v13.h }[6], [x19]\n" + "b 60f\n" + "57:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 60f\n" + "ld1 { v13.h }[4], [x19]\n" + "b 60f\n" + "58:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 59f\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 32f\n" + "tbz %x[n_channels], #0, 60f\n" "ld1 { v13.h }[2], [x19]\n" - "b 32f\n" - "31:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 1: Unset + "b 60f\n" + "59:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Unset: Bit 1: Unset "ldr h13, [x19, #0x0]\n" - "32:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 1: End - "fmla v29.8h, v7.8h, v13.8h\n" - "add x19, x12, x10\n" - "tbz %x[n_channels], #1, 33f\n" + "60:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: End + "fmla v30.8h, v7.8h, v13.8h\n" + "add x19, x11, x12\n" + "tbz %x[n_channels], #2, 62f\n" + "ldr d16, [x19], #0x8\n" + "tbz %x[n_channels], #1, 61f\n" + "ld1 { v16.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 64f\n" + "ld1 { v16.h }[6], [x19]\n" + "b 64f\n" + "61:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 64f\n" + "ld1 { v16.h }[4], [x19]\n" + "b 64f\n" + "62:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 63f\n" "ldr s16, [x19], #0x4\n" - "tbz %x[n_channels], #0, 34f\n" + "tbz %x[n_channels], #0, 64f\n" "ld1 { v16.h }[2], [x19]\n" - "b 34f\n" - "33:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: Unset + "b 64f\n" + "63:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset: Bit 1: Unset "ldr h16, [x19, #0x0]\n" - "34:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: End - "fmla v29.8h, v5.8h, v16.8h\n" - "add x19, x11, x9\n" - "fmla v28.8h, v3.8h, v16.8h\n" - "tbz %x[n_channels], #1, 35f\n" + "64:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: End + "fmla v30.8h, v5.8h, v16.8h\n" + "fmla v31.8h, v3.8h, v16.8h\n" + "add x19, x9, x10\n" + "tbz %x[n_channels], #2, 66f\n" + "ldr d14, [x19], #0x8\n" + "tbz %x[n_channels], #1, 65f\n" + "ld1 { v14.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 68f\n" + "ld1 { v14.h }[6], [x19]\n" + "b 68f\n" + "65:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 68f\n" + "ld1 { v14.h }[4], [x19]\n" + "b 68f\n" + "66:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 67f\n" "ldr s14, [x19], #0x4\n" - "tbz %x[n_channels], #0, 36f\n" + "tbz %x[n_channels], #0, 68f\n" "ld1 { v14.h }[2], [x19]\n" - "b 36f\n" - "35:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 1: Unset + "b 68f\n" + "67:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Unset: Bit 1: Unset "ldr h14, [x19, #0x0]\n" - "36:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 1: End - "fmla v28.8h, v7.8h, v14.8h\n" - "add x19, x11, x10\n" - "tbz %x[n_channels], #1, 37f\n" + "68:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: End + "fmla v31.8h, v7.8h, v14.8h\n" + "add x19, x9, x12\n" + "tbz %x[n_channels], #2, 70f\n" + "ldr d15, [x19], #0x8\n" + "tbz %x[n_channels], #1, 69f\n" + "ld1 { v15.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 72f\n" + "ld1 { v15.h }[6], [x19]\n" + "b 72f\n" + "69:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 72f\n" + "ld1 { v15.h }[4], [x19]\n" + "b 72f\n" + "70:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 71f\n" "ldr s15, [x19], #0x4\n" - "tbz %x[n_channels], #0, 38f\n" + "tbz %x[n_channels], #0, 72f\n" "ld1 { v15.h }[2], [x19]\n" - "b 38f\n" - "37:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 1: Unset + "b 72f\n" + "71:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Unset: Bit 1: Unset "ldr h15, [x19, #0x0]\n" - "38:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 1: End - "fmla v29.8h, v8.8h, v15.8h\n" - "add x19, x11, x28\n" - "fmla v28.8h, v6.8h, v15.8h\n" - "tbz %x[n_channels], #1, 39f\n" + "72:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: End + "fmla v30.8h, v8.8h, v15.8h\n" + "fmla v31.8h, v6.8h, v15.8h\n" + "add x19, x9, x28\n" + "tbz %x[n_channels], #2, 74f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 73f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 76f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 76f\n" + "73:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 76f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 76f\n" + "74:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 75f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 40f\n" + "tbz %x[n_channels], #0, 76f\n" "ld1 { v11.h }[2], [x19]\n" - "b 40f\n" - "39:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 1: Unset + "b 76f\n" + "75:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "40:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 1: End - "fmla v28.8h, v8.8h, v11.8h\n" - "fmax v31.8h, v31.8h, v19.8h\n" - "fmax v30.8h, v30.8h, v19.8h\n" - "fmax v29.8h, v29.8h, v19.8h\n" - "fmin v31.8h, v31.8h, v18.8h\n" - "fmin v30.8h, v30.8h, v18.8h\n" - "fmin v29.8h, v29.8h, v18.8h\n" + "76:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: End + "fmla v31.8h, v8.8h, v11.8h\n" "fmax v28.8h, v28.8h, v19.8h\n" + "fmax v29.8h, v29.8h, v19.8h\n" + "fmax v30.8h, v30.8h, v19.8h\n" + "fmax v31.8h, v31.8h, v19.8h\n" "fmin v28.8h, v28.8h, v18.8h\n" - "tbz %x[n_channels], #1, 41f\n" - "mov x19, x15\n" - "st1 { v31.s }[0], [x19], x16\n" - "add x15, x15, #0x4\n" - "st1 { v30.s }[0], [x19]\n" + "fmin v29.8h, v29.8h, v18.8h\n" + "fmin v30.8h, v30.8h, v18.8h\n" + "fmin v31.8h, v31.8h, v18.8h\n" + "tbz %x[n_channels], #2, 78f\n" + "mov x20, x16\n" + "mov x19, x27\n" + "st1 { v28.d }[0], [x20], x8\n" + "add x16, x16, #0x8\n" + "add x27, x27, #0x8\n" + "st1 { v30.d }[0], [x19], x8\n" + "st1 { v29.d }[0], [x20]\n" + "st1 { v31.d }[0], [x19]\n" + "tbz %x[n_channels], #1, 77f\n" + "mov x20, x16\n" + "mov x19, x27\n" + "st1 { v28.s }[2], [x20], x8\n" + "add x16, x16, #0x4\n" + "add x27, x27, #0x4\n" + "st1 { v30.s }[2], [x19], x8\n" + "st1 { v29.s }[2], [x20]\n" + "st1 { v31.s }[2], [x19]\n" + "tbz %x[n_channels], #0, 80f\n" + "mov x20, x16\n" + "mov x19, x27\n" + "st1 { v28.h }[6], [x20], x8\n" + "st1 { v30.h }[6], [x19], x8\n" + "st1 { v29.h }[6], [x20]\n" + "st1 { v31.h }[6], [x19]\n" + "b 80f\n" + "77:" // Tile loop: Oddments: Store: Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 80f\n" + "mov x20, x16\n" + "mov x19, x27\n" + "st1 { v28.h }[4], [x20], x8\n" + "st1 { v30.h }[4], [x19], x8\n" + "st1 { v29.h }[4], [x20]\n" + "st1 { v31.h }[4], [x19]\n" + "b 80f\n" + "78:" // Tile loop: Oddments: Store: Bit 2: Unset + "tbz %x[n_channels], #1, 79f\n" + "mov x20, x16\n" "mov x19, x27\n" - "st1 { v29.s }[0], [x19], x16\n" + "st1 { v28.s }[0], [x20], x8\n" + "st1 { v30.s }[0], [x19], x8\n" + "add x16, x16, #0x4\n" "add x27, x27, #0x4\n" - "st1 { v28.s }[0], [x19]\n" - "tbz %x[n_channels], #0, 42f\n" - "mov x20, x15\n" - "st1 { v31.h }[2], [x20], x16\n" + "st1 { v29.s }[0], [x20]\n" + "st1 { v31.s }[0], [x19]\n" + "tbz %x[n_channels], #0, 80f\n" + "mov x20, x16\n" "mov x19, x27\n" - "st1 { v30.h }[2], [x20]\n" - "st1 { v29.h }[2], [x19], x16\n" - "st1 { v28.h }[2], [x19]\n" - "b 42f\n" - "41:" // Tile loop: Oddments: Store: Bit 1: Unset - "mov x20, x15\n" - "st1 { v31.h }[0], [x20], x16\n" + "st1 { v28.h }[2], [x20], x8\n" + "st1 { v30.h }[2], [x19], x8\n" + "st1 { v29.h }[2], [x20]\n" + "st1 { v31.h }[2], [x19]\n" + "b 80f\n" + "79:" // Tile loop: Oddments: Store: Bit 2: Unset: Bit 1: Unset + "mov x20, x16\n" "mov x19, x27\n" - "st1 { v30.h }[0], [x20]\n" - "st1 { v29.h }[0], [x19], x16\n" - "st1 { v28.h }[0], [x19]\n" - "42:" // Tile loop: Oddments: Store: Bit 1: End + "st1 { v28.h }[0], [x20], x8\n" + "st1 { v30.h }[0], [x19], x8\n" + "st1 { v29.h }[0], [x20]\n" + "st1 { v31.h }[0], [x19]\n" + "80:" // Tile loop: Oddments: Store: Bit 2: End - "43:" // Tile loop: End - "ldr x6, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "add x21, x6, #0x1\n" - "ldr x27, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" - "add x27, x27, #0x1\n" + "81:" // Tile loop: End + "ldr x26, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x22, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "add x26, x26, #0x1\n" + "add x20, x22, #0x1\n" "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" - "cmp x27, x19\n" - "csel x27, x27, XZR, LT\n" - "csel x6, x6, x21, LT\n" - "cmp x6, x20\n" + "cmp x26, x19\n" + "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" + "csel x22, x22, x20, LT\n" + "csel x26, x26, XZR, LT\n" + "cmp x22, x19\n" "blt 1b\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v28", "v29", "v30", "v31", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" + : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v28", "v29", "v30", "v31", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" ); } diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp index f071e21979..4857077b05 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp @@ -88,275 +88,315 @@ void a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( __asm__ __volatile__( "ldr x21, [%x[params_struct], %[offsetof_args_outptrs]]\n" - "add x16, %x[params_struct], %[offsetof_Args_inptrs]\n" - "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" + "mov x16, #0x10\n" // cntb _, ALL, #1 + "lsr x15, %x[n_channels], #0x3\n" + "ldr x14, [%x[params_struct], %[offsetof_args_params]]\n" "add x20, %x[params_struct], %[offsetof_args_min]\n" "add x19, %x[params_struct], %[offsetof_args_max]\n" + "ldp x13, x12, [x21, #0x0]\n" + "ldp x11, x10, [x21, #0x10]\n" + "add x9, %x[params_struct], %[offsetof_Args_inptrs]\n" "ld1r { v19.8h }, [x20]\n" "ld1r { v18.8h }, [x19]\n" - "mov x14, #0x0\n" - "ldp x13, x12, [x21, #0x0]\n" - "mov x11, #0x10\n" // cntb _, ALL, #1 - "ldp x10, x9, [x21, #0x10]\n" - "sub x28, XZR, x11\n" - "lsr x27, %x[n_channels], #0x3\n" - "cbz x27, 3f\n" - "ldr q17, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "cmp x11, x27, LSL #4\n" - "ldr q1, [x15, #0x20]\n" - "ldr q2, [x15, #0x30]\n" - "ldr q3, [x15, #0x40]\n" - "ldr q4, [x15, #0x50]\n" - "ldr q5, [x15, #0x60]\n" - "ldr q6, [x15, #0x70]\n" - "ldr q7, [x15, #0x80]\n" - "ldr q8, [x15, #0x90]\n" - "add x15, x15, #0xa0\n" - "ldp x26, x25, [x16, #0x0]\n" - "ldp x24, x23, [x16, #0x10]\n" - "ldp x22, x21, [x16, #0x20]\n" - "ldr q9, [x26, x14]\n" - "ldr q10, [x25, x14]\n" - "ldr q11, [x24, x14]\n" - "ldr q12, [x23, x14]\n" - "ldr q13, [x22, x14]\n" - "ldr q14, [x21, x14]\n" - "ldp x20, x19, [x16, #0x30]\n" - "ldr q15, [x20, x14]\n" - "ldr q16, [x19, x14]\n" + "mov x28, #0x0\n" + "sub x27, XZR, x16\n" + "cbz x15, 3f\n" + "ldp x26, x25, [x9, #0x0]\n" + "ldp x24, x23, [x9, #0x10]\n" + "ldp x22, x21, [x9, #0x20]\n" + "ldp x20, x19, [x9, #0x30]\n" + "cmp x16, x15, LSL #4\n" + "ldr q17, [x14, #0x0]\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "ldr q2, [x14, #0x30]\n" + "ldr q3, [x14, #0x40]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "add x14, x14, #0xa0\n" + "ldr q9, [x26, x28]\n" + "ldr q10, [x25, x28]\n" + "ldr q11, [x24, x28]\n" + "ldr q12, [x23, x28]\n" + "ldr q13, [x22, x28]\n" + "ldr q14, [x21, x28]\n" + "ldr q15, [x20, x28]\n" + "ldr q16, [x19, x28]\n" "bge 2f\n" "1:" // Channel loop - "mov v31.16b, v17.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "ldr x26, [x16, #0x40]\n" - "add x28, x28, #0x10\n" - "mov v30.16b, v17.16b\n fmla v30.8h, v6.8h, v9.8h\n" - "ldr x25, [x16, #0x48]\n" - "mov v29.16b, v17.16b\n fmla v29.8h, v2.8h, v9.8h\n" - "ldr x24, [x16, #0x50]\n" - "mov v28.16b, v17.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "ldr x23, [x16, #0x58]\n" - "ldr x22, [x16, #0x60]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr x21, [x16, #0x68]\n" - "fmla v30.8h, v1.8h, v12.8h\n" - "ldr q12, [x25, x14]\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x26, x14]\n" - "ldr x20, [x16, #0x70]\n" - "fmla v30.8h, v2.8h, v13.8h\n" - "ldr q13, [x24, x14]\n" - "fmla v31.8h, v3.8h, v14.8h\n" - "ldr q14, [x23, x14]\n" - "ldr x19, [x16, #0x78]\n" - "fmla v30.8h, v0.8h, v16.8h\n" - "ldr x26, [x16, #0x80]\n" - "fmla v31.8h, v4.8h, v15.8h\n" - "ldr q15, [x22, x14]\n" - "fmla v29.8h, v3.8h, v14.8h\n" - "ldr x25, [x16, #0x88]\n" - "fmla v30.8h, v4.8h, v11.8h\n" - "ldr q11, [x21, x14]\n" - "ldr x24, [x16, #0x90]\n" - "fmla v31.8h, v2.8h, v16.8h\n" - "ldr q16, [x20, x14]\n" - "fmla v29.8h, v0.8h, v15.8h\n" - "ldr q14, [x25, x14]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr q12, [x26, x14]\n" - "ldr x23, [x16, #0x98]\n" - "fmla v31.8h, v5.8h, v13.8h\n" - "ldr x22, [x16, #0xa0]\n" + "mov v28.16b, v17.16b\n fmla v28.8h, v8.8h, v9.8h\n" + "mov v29.16b, v17.16b\n fmla v29.8h, v6.8h, v9.8h\n" + "ldr x26, [x9, #0x40]\n" + "ldr x25, [x9, #0x48]\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v1.8h, v12.8h\n" + "ldr q12, [x25, x28]\n" + "ldr x24, [x9, #0x50]\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v2.8h, v13.8h\n" + "ldr q11, [x26, x28]\n" + "ldr q13, [x24, x28]\n" + "fmla v28.8h, v3.8h, v14.8h\n" + "fmla v29.8h, v0.8h, v16.8h\n" + "ldr x23, [x9, #0x58]\n" + "ldr x19, [x9, #0x78]\n" + "fmla v28.8h, v4.8h, v15.8h\n" "fmla v29.8h, v4.8h, v11.8h\n" - "ldr q11, [x23, x14]\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "ldr q13, [x19, x14]\n" - "ldr x21, [x16, #0xa8]\n" - "fmla v31.8h, v6.8h, v15.8h\n" - "ldr q15, [x24, x14]\n" - "fmla v29.8h, v1.8h, v16.8h\n" - "ldr x20, [x16, #0xb0]\n" - "fmla v30.8h, v7.8h, v12.8h\n" - "ldr x19, [x16, #0xb8]\n" - "fmla v28.8h, v4.8h, v13.8h\n" - "ldr q13, [x22, x14]\n" - "ldr x26, [x16, #0xc0]\n" - "fmla v31.8h, v7.8h, v16.8h\n" - "fmla v29.8h, v6.8h, v15.8h\n" - "ldr q16, [x21, x14]\n" - "fmla v30.8h, v8.8h, v11.8h\n" - "ldr q15, [x19, x14]\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "ldr q17, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "fmla v29.8h, v7.8h, v13.8h\n" - "fmax v31.8h, v31.8h, v19.8h\n" - "ldr q1, [x15, #0x20]\n" - "fmax v30.8h, v30.8h, v19.8h\n" - "ldr q4, [x15, #0x50]\n" - "fmla v28.8h, v5.8h, v14.8h\n" - "ldr q14, [x20, x14]\n" - "fmin v31.8h, v31.8h, v18.8h\n" - "str q31, [x13, x28]\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v5.8h, v16.8h\n" - "ldr q11, [x26, x14]\n" - "add x14, x14, #0x10\n" - "fmin v30.8h, v30.8h, v18.8h\n" - "ldp x26, x25, [x16, #0x0]\n" - "ldp x24, x23, [x16, #0x10]\n" - "fmla v28.8h, v3.8h, v16.8h\n" - "ldp x22, x21, [x16, #0x20]\n" - "fmla v29.8h, v8.8h, v15.8h\n" - "ldr q9, [x26, x11]\n" - "ldr q10, [x25, x11]\n" - "fmla v28.8h, v7.8h, v14.8h\n" - "ldr q12, [x23, x11]\n" - "fmax v29.8h, v29.8h, v19.8h\n" - "ldr q13, [x22, x11]\n" - "ldr q14, [x21, x11]\n" - "fmin v29.8h, v29.8h, v18.8h\n" - "ldp x20, x19, [x16, #0x30]\n" - "str q30, [x12, x28]\n" + "ldr q14, [x23, x28]\n" + "ldr x22, [x9, #0x60]\n" + "fmla v28.8h, v2.8h, v16.8h\n" + "fmla v29.8h, v5.8h, v12.8h\n" + "ldr x26, [x9, #0x80]\n" + "ldr q15, [x22, x28]\n" + "mov v30.16b, v17.16b\n fmla v30.8h, v2.8h, v9.8h\n" + "mov v31.16b, v17.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "ldr q12, [x26, x28]\n" + "ldr x21, [x9, #0x68]\n" + "fmla v28.8h, v5.8h, v13.8h\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "ldr q13, [x19, x28]\n" + "ldr x25, [x9, #0x88]\n" + "fmla v30.8h, v3.8h, v14.8h\n" + "fmla v31.8h, v4.8h, v13.8h\n" + "ldr q11, [x21, x28]\n" + "ldr q14, [x25, x28]\n" + "fmla v30.8h, v0.8h, v15.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "ldr x20, [x9, #0x70]\n" + "ldr x23, [x9, #0x98]\n" + "fmla v30.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v14.8h\n" + "ldr q16, [x20, x28]\n" + "ldr q11, [x23, x28]\n" "fmla v28.8h, v6.8h, v15.8h\n" - "ldr q2, [x15, #0x30]\n" - "fmla v28.8h, v8.8h, v11.8h\n" - "ldr q11, [x24, x11]\n" - "ldr q15, [x20, x11]\n" + "ldr x24, [x9, #0x90]\n" + "ldr x21, [x9, #0xa8]\n" + "fmla v30.8h, v1.8h, v16.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "fmla v28.8h, v7.8h, v16.8h\n" + "ldr q15, [x24, x28]\n" + "ldr q16, [x21, x28]\n" + "ldr x22, [x9, #0xa0]\n" + "ldr x20, [x9, #0xb0]\n" + "fmla v30.8h, v6.8h, v15.8h\n" + "fmla v31.8h, v3.8h, v16.8h\n" + "ldr q13, [x22, x28]\n" + "ldr q14, [x20, x28]\n" + "fmla v30.8h, v7.8h, v13.8h\n" + "fmla v31.8h, v7.8h, v14.8h\n" + "ldr x19, [x9, #0xb8]\n" + "fmla v29.8h, v7.8h, v12.8h\n" + "ldr q15, [x19, x28]\n" + "fmla v30.8h, v5.8h, v16.8h\n" + "ldr x26, [x9, #0xc0]\n" + "fmla v31.8h, v6.8h, v15.8h\n" + "fmla v29.8h, v8.8h, v11.8h\n" + "ldr q11, [x26, x28]\n" + "fmla v30.8h, v8.8h, v15.8h\n" + "fmla v31.8h, v8.8h, v11.8h\n" + "ldp x26, x25, [x9, #0x0]\n" + "ldp x24, x23, [x9, #0x10]\n" + "ldp x22, x21, [x9, #0x20]\n" + "ldp x20, x19, [x9, #0x30]\n" "fmax v28.8h, v28.8h, v19.8h\n" - "ldr q16, [x19, x11]\n" - "add x11, x11, #0x10\n" + "fmax v29.8h, v29.8h, v19.8h\n" + "fmax v30.8h, v30.8h, v19.8h\n" + "fmax v31.8h, v31.8h, v19.8h\n" + "ldr q9, [x26, x16]\n" + "ldr q10, [x25, x16]\n" + "ldr q11, [x24, x16]\n" + "ldr q12, [x23, x16]\n" + "add x27, x27, #0x10\n" "fmin v28.8h, v28.8h, v18.8h\n" - "str q29, [x10, x28]\n" - "cmp x11, x27, LSL #4\n" - "ldr q3, [x15, #0x40]\n" - "ldr q5, [x15, #0x60]\n" - "ldr q6, [x15, #0x70]\n" - "str q28, [x9, x28]\n" - "ldr q7, [x15, #0x80]\n" - "ldr q8, [x15, #0x90]\n" - "add x15, x15, #0xa0\n" + "ldr q13, [x22, x16]\n" + "ldr q14, [x21, x16]\n" + "fmin v29.8h, v29.8h, v18.8h\n" + "fmin v30.8h, v30.8h, v18.8h\n" + "ldr q15, [x20, x16]\n" + "ldr q16, [x19, x16]\n" + "add x16, x16, #0x10\n" + "cmp x16, x15, LSL #4\n" + "fmin v31.8h, v31.8h, v18.8h\n" + "add x28, x28, #0x10\n" + "str q28, [x13, x27]\n" + "ldr q17, [x14, #0x0]\n" + "str q29, [x12, x27]\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "str q30, [x11, x27]\n" + "ldr q2, [x14, #0x30]\n" + "ldr q3, [x14, #0x40]\n" + "str q31, [x10, x27]\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "add x14, x14, #0xa0\n" "blt 1b\n" "2:" // Channel tail - "mov v31.16b, v17.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "ldr x26, [x16, #0x40]\n" - "add x28, x28, #0x10\n" - "mov v30.16b, v17.16b\n fmla v30.8h, v6.8h, v9.8h\n" - "ldr x25, [x16, #0x48]\n" - "mov v29.16b, v17.16b\n fmla v29.8h, v2.8h, v9.8h\n" - "ldr x24, [x16, #0x50]\n" - "mov v28.16b, v17.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "ldr x23, [x16, #0x58]\n" - "ldr x22, [x16, #0x60]\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "ldr x21, [x16, #0x68]\n" - "fmla v30.8h, v1.8h, v12.8h\n" - "ldr q12, [x25, x14]\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x26, x14]\n" - "ldr x20, [x16, #0x70]\n" - "fmla v30.8h, v2.8h, v13.8h\n" - "ldr q13, [x24, x14]\n" - "fmla v31.8h, v3.8h, v14.8h\n" - "ldr q14, [x23, x14]\n" - "ldr x19, [x16, #0x78]\n" - "fmla v30.8h, v0.8h, v16.8h\n" - "ldr x26, [x16, #0x80]\n" - "fmla v31.8h, v4.8h, v15.8h\n" - "ldr q15, [x22, x14]\n" - "fmla v29.8h, v3.8h, v14.8h\n" - "ldr x25, [x16, #0x88]\n" - "fmla v30.8h, v4.8h, v11.8h\n" - "ldr q11, [x21, x14]\n" - "ldr x24, [x16, #0x90]\n" - "fmla v31.8h, v2.8h, v16.8h\n" - "ldr q16, [x20, x14]\n" - "fmla v29.8h, v0.8h, v15.8h\n" - "ldr q14, [x25, x14]\n" - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr q12, [x26, x14]\n" - "ldr x23, [x16, #0x98]\n" - "fmla v31.8h, v5.8h, v13.8h\n" - "ldr x22, [x16, #0xa0]\n" + "mov v28.16b, v17.16b\n fmla v28.8h, v8.8h, v9.8h\n" + "mov v29.16b, v17.16b\n fmla v29.8h, v6.8h, v9.8h\n" + "ldr x26, [x9, #0x40]\n" + "ldr x25, [x9, #0x48]\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "fmla v29.8h, v1.8h, v12.8h\n" + "ldr q12, [x25, x28]\n" + "ldr x24, [x9, #0x50]\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v2.8h, v13.8h\n" + "ldr q11, [x26, x28]\n" + "ldr q13, [x24, x28]\n" + "fmla v28.8h, v3.8h, v14.8h\n" + "fmla v29.8h, v0.8h, v16.8h\n" + "ldr x23, [x9, #0x58]\n" + "ldr x19, [x9, #0x78]\n" + "fmla v28.8h, v4.8h, v15.8h\n" "fmla v29.8h, v4.8h, v11.8h\n" - "ldr q11, [x23, x14]\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "ldr q13, [x19, x14]\n" - "ldr x21, [x16, #0xa8]\n" - "fmla v31.8h, v6.8h, v15.8h\n" - "ldr q15, [x24, x14]\n" - "fmla v29.8h, v1.8h, v16.8h\n" - "ldr x20, [x16, #0xb0]\n" - "fmla v30.8h, v7.8h, v12.8h\n" - "ldr x19, [x16, #0xb8]\n" - "fmla v28.8h, v4.8h, v13.8h\n" - "ldr q13, [x22, x14]\n" - "ldr x26, [x16, #0xc0]\n" - "fmla v31.8h, v7.8h, v16.8h\n" - "fmla v29.8h, v6.8h, v15.8h\n" - "ldr q16, [x21, x14]\n" - "fmla v30.8h, v8.8h, v11.8h\n" - "ldr q15, [x19, x14]\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "fmla v29.8h, v7.8h, v13.8h\n" - "fmax v31.8h, v31.8h, v19.8h\n" - "fmax v30.8h, v30.8h, v19.8h\n" - "fmla v28.8h, v5.8h, v14.8h\n" - "ldr q14, [x20, x14]\n" - "fmin v31.8h, v31.8h, v18.8h\n" - "str q31, [x13, x28]\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v5.8h, v16.8h\n" - "ldr q11, [x26, x14]\n" - "add x14, x14, #0x10\n" - "fmin v30.8h, v30.8h, v18.8h\n" - "str q30, [x12, x28]\n" - "fmla v28.8h, v3.8h, v16.8h\n" - "fmla v29.8h, v8.8h, v15.8h\n" - "fmla v28.8h, v7.8h, v14.8h\n" - "fmax v29.8h, v29.8h, v19.8h\n" - "fmin v29.8h, v29.8h, v18.8h\n" - "str q29, [x10, x28]\n" + "ldr q14, [x23, x28]\n" + "ldr x22, [x9, #0x60]\n" + "fmla v28.8h, v2.8h, v16.8h\n" + "fmla v29.8h, v5.8h, v12.8h\n" + "ldr x26, [x9, #0x80]\n" + "ldr q15, [x22, x28]\n" + "mov v30.16b, v17.16b\n fmla v30.8h, v2.8h, v9.8h\n" + "mov v31.16b, v17.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "ldr q12, [x26, x28]\n" + "ldr x21, [x9, #0x68]\n" + "fmla v28.8h, v5.8h, v13.8h\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "ldr q13, [x19, x28]\n" + "ldr x25, [x9, #0x88]\n" + "fmla v30.8h, v3.8h, v14.8h\n" + "fmla v31.8h, v4.8h, v13.8h\n" + "ldr q11, [x21, x28]\n" + "ldr q14, [x25, x28]\n" + "fmla v30.8h, v0.8h, v15.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "ldr x20, [x9, #0x70]\n" + "ldr x23, [x9, #0x98]\n" + "fmla v30.8h, v4.8h, v11.8h\n" + "fmla v31.8h, v5.8h, v14.8h\n" + "ldr q16, [x20, x28]\n" + "ldr q11, [x23, x28]\n" "fmla v28.8h, v6.8h, v15.8h\n" - "fmla v28.8h, v8.8h, v11.8h\n" + "ldr x24, [x9, #0x90]\n" + "ldr x21, [x9, #0xa8]\n" + "fmla v30.8h, v1.8h, v16.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "fmla v28.8h, v7.8h, v16.8h\n" + "ldr q15, [x24, x28]\n" + "ldr q16, [x21, x28]\n" + "ldr x22, [x9, #0xa0]\n" + "ldr x20, [x9, #0xb0]\n" + "fmla v30.8h, v6.8h, v15.8h\n" + "fmla v31.8h, v3.8h, v16.8h\n" + "ldr q13, [x22, x28]\n" + "ldr q14, [x20, x28]\n" + "fmla v30.8h, v7.8h, v13.8h\n" + "fmla v31.8h, v7.8h, v14.8h\n" + "ldr x19, [x9, #0xb8]\n" + "fmla v29.8h, v7.8h, v12.8h\n" + "ldr q15, [x19, x28]\n" + "fmla v30.8h, v5.8h, v16.8h\n" + "ldr x26, [x9, #0xc0]\n" + "fmla v31.8h, v6.8h, v15.8h\n" + "fmla v29.8h, v8.8h, v11.8h\n" + "ldr q11, [x26, x28]\n" + "fmla v30.8h, v8.8h, v15.8h\n" + "fmla v31.8h, v8.8h, v11.8h\n" "fmax v28.8h, v28.8h, v19.8h\n" + "add x27, x27, #0x10\n" + "fmax v29.8h, v29.8h, v19.8h\n" + "fmax v30.8h, v30.8h, v19.8h\n" + "add x28, x28, #0x10\n" + "fmax v31.8h, v31.8h, v19.8h\n" "fmin v28.8h, v28.8h, v18.8h\n" - "str q28, [x9, x28]\n" + "str q28, [x13, x27]\n" + "fmin v29.8h, v29.8h, v18.8h\n" + "fmin v30.8h, v30.8h, v18.8h\n" + "str q29, [x12, x27]\n" + "fmin v31.8h, v31.8h, v18.8h\n" + "str q30, [x11, x27]\n" + "str q31, [x10, x27]\n" "3:" // Oddments - "tst %x[n_channels], #0x1\n" - "beq 42f\n" - "ldr q17, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "mov x28, x14\n" - "ldr q1, [x15, #0x20]\n" - "add x13, x13, x28\n" - "ldr q2, [x15, #0x30]\n" - "add x12, x12, x28\n" - "ldr q3, [x15, #0x40]\n" - "add x10, x10, x28\n" - "ldr q4, [x15, #0x50]\n" - "add x9, x9, x28\n" - "ldr q5, [x15, #0x60]\n" - "ldr q6, [x15, #0x70]\n" - "ldr q7, [x15, #0x80]\n" - "ldr q8, [x15, #0x90]\n" - "ldr x26, [x16, #0x0]\n" - "ldr x25, [x16, #0x8]\n" - "ldr x24, [x16, #0x10]\n" - "add x26, x26, x14\n" - "ldr x23, [x16, #0x18]\n" - "add x25, x25, x14\n" - "ldr x22, [x16, #0x20]\n" - "add x24, x24, x14\n" - "ldr x21, [x16, #0x28]\n" - "add x23, x23, x14\n" - "ldr x20, [x16, #0x30]\n" - "add x22, x22, x14\n" - "ldr x19, [x16, #0x38]\n" - "add x21, x21, x14\n" - "add x20, x20, x14\n" - "add x19, x19, x14\n" + "tst %x[n_channels], #0x7\n" + "beq 80f\n" + "mov x27, x28\n" + "ldr x26, [x9, #0x0]\n" + "ldr x25, [x9, #0x8]\n" + "ldr x24, [x9, #0x10]\n" + "add x13, x13, x27\n" + "add x12, x12, x27\n" + "ldr x23, [x9, #0x18]\n" + "ldr x22, [x9, #0x20]\n" + "add x11, x11, x27\n" + "add x10, x10, x27\n" + "ldr x21, [x9, #0x28]\n" + "ldr x20, [x9, #0x30]\n" + "add x26, x26, x28\n" + "add x25, x25, x28\n" + "ldr x19, [x9, #0x38]\n" + "ldr q17, [x14, #0x0]\n" + "add x24, x24, x28\n" + "add x23, x23, x28\n" + "ldr q0, [x14, #0x10]\n" + "ldr q1, [x14, #0x20]\n" + "add x22, x22, x28\n" + "add x21, x21, x28\n" + "ldr q2, [x14, #0x30]\n" + "ldr q3, [x14, #0x40]\n" + "add x20, x20, x28\n" + "add x19, x19, x28\n" + "ldr q4, [x14, #0x50]\n" + "ldr q5, [x14, #0x60]\n" + "ldr q6, [x14, #0x70]\n" + "ldr q7, [x14, #0x80]\n" + "ldr q8, [x14, #0x90]\n" + "tbz %x[n_channels], #2, 5f\n" + "ld1 { v9.d }[0], [x26], #0x8\n" + "ld1 { v10.d }[0], [x25], #0x8\n" + "ld1 { v11.d }[0], [x24], #0x8\n" + "ld1 { v12.d }[0], [x23], #0x8\n" + "ld1 { v13.d }[0], [x22], #0x8\n" + "ld1 { v14.d }[0], [x21], #0x8\n" + "ld1 { v15.d }[0], [x20], #0x8\n" + "ld1 { v16.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 4f\n" + "ld1 { v9.s }[2], [x26], #0x4\n" + "ld1 { v10.s }[2], [x25], #0x4\n" + "ld1 { v11.s }[2], [x24], #0x4\n" + "ld1 { v12.s }[2], [x23], #0x4\n" + "ld1 { v13.s }[2], [x22], #0x4\n" + "ld1 { v14.s }[2], [x21], #0x4\n" + "ld1 { v15.s }[2], [x20], #0x4\n" + "ld1 { v16.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 7f\n" + "ld1 { v9.h }[6], [x26], #0x2\n" + "ld1 { v10.h }[6], [x25], #0x2\n" + "ld1 { v11.h }[6], [x24], #0x2\n" + "ld1 { v12.h }[6], [x23], #0x2\n" + "ld1 { v13.h }[6], [x22], #0x2\n" + "ld1 { v14.h }[6], [x21], #0x2\n" + "ld1 { v15.h }[6], [x20], #0x2\n" + "ld1 { v16.h }[6], [x19], #0x2\n" + "b 7f\n" + "4:" // Oddments: Load inputs (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 7f\n" + "ld1 { v9.h }[4], [x26], #0x2\n" + "ld1 { v10.h }[4], [x25], #0x2\n" + "ld1 { v11.h }[4], [x24], #0x2\n" + "ld1 { v12.h }[4], [x23], #0x2\n" + "ld1 { v13.h }[4], [x22], #0x2\n" + "ld1 { v14.h }[4], [x21], #0x2\n" + "ld1 { v15.h }[4], [x20], #0x2\n" + "ld1 { v16.h }[4], [x19], #0x2\n" + "b 7f\n" + "5:" // Oddments: Load inputs (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 6f\n" "ld1 { v9.s }[0], [x26], #0x4\n" "ld1 { v10.s }[0], [x25], #0x4\n" "ld1 { v11.s }[0], [x24], #0x4\n" @@ -365,7 +405,7 @@ void a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( "ld1 { v14.s }[0], [x21], #0x4\n" "ld1 { v15.s }[0], [x20], #0x4\n" "ld1 { v16.s }[0], [x19], #0x4\n" - "tbz %x[n_channels], #0, 5f\n" + "tbz %x[n_channels], #0, 7f\n" "ld1 { v9.h }[2], [x26], #0x2\n" "ld1 { v10.h }[2], [x25], #0x2\n" "ld1 { v11.h }[2], [x24], #0x2\n" @@ -374,8 +414,8 @@ void a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( "ld1 { v14.h }[2], [x21], #0x2\n" "ld1 { v15.h }[2], [x20], #0x2\n" "ld1 { v16.h }[2], [x19], #0x2\n" - "b 5f\n" - "4:" // Oddments: Load inputs (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 1: Unset + "b 7f\n" + "6:" // Oddments: Load inputs (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v9.h }[0], [x26], #0x2\n" "ld1 { v10.h }[0], [x25], #0x2\n" "ld1 { v11.h }[0], [x24], #0x2\n" @@ -384,240 +424,468 @@ void a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( "ld1 { v14.h }[0], [x21], #0x2\n" "ld1 { v15.h }[0], [x20], #0x2\n" "ld1 { v16.h }[0], [x19], #0x2\n" - "5:" // Oddments: Load inputs (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 1: End - "mov v31.16b, v17.16b\n fmla v31.8h, v8.8h, v9.8h\n" - "ldr x26, [x16, #0x40]\n" - "add x26, x26, x14\n" - "mov v30.16b, v17.16b\n fmla v30.8h, v6.8h, v9.8h\n" - "mov v29.16b, v17.16b\n fmla v29.8h, v2.8h, v9.8h\n" - "mov v28.16b, v17.16b\n fmla v28.8h, v0.8h, v9.8h\n" - "fmla v31.8h, v0.8h, v10.8h\n" - "fmla v30.8h, v1.8h, v12.8h\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "fmla v30.8h, v2.8h, v13.8h\n" - "fmla v31.8h, v3.8h, v14.8h\n" - "fmla v30.8h, v0.8h, v16.8h\n" - "fmla v31.8h, v4.8h, v15.8h\n" - "fmla v31.8h, v2.8h, v16.8h\n" - "tbz %x[n_channels], #1, 6f\n" + "7:" // Oddments: Load inputs (2, 2), (0, 0), (0, 1), (0, 3), (0, 4), (1, 0), (1, 1), (0, 2): Bit 2: End + "mov v28.16b, v17.16b\n fmla v28.8h, v8.8h, v9.8h\n" + "fmla v28.8h, v0.8h, v10.8h\n" + "ldr x26, [x9, #0x40]\n" + "add x26, x26, x28\n" + "mov v29.16b, v17.16b\n fmla v29.8h, v6.8h, v9.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "fmla v29.8h, v1.8h, v12.8h\n" + "fmla v28.8h, v3.8h, v14.8h\n" + "fmla v29.8h, v2.8h, v13.8h\n" + "fmla v28.8h, v4.8h, v15.8h\n" + "mov v30.16b, v17.16b\n fmla v30.8h, v2.8h, v9.8h\n" + "mov v31.16b, v17.16b\n fmla v31.8h, v0.8h, v9.8h\n" + "fmla v28.8h, v2.8h, v16.8h\n" + "fmla v29.8h, v0.8h, v16.8h\n" + "tbz %x[n_channels], #2, 9f\n" + "ld1 { v11.d }[0], [x26], #0x8\n" + "tbz %x[n_channels], #1, 8f\n" + "ld1 { v11.s }[2], [x26], #0x4\n" + "tbz %x[n_channels], #0, 11f\n" + "ld1 { v11.h }[6], [x26], #0x2\n" + "b 11f\n" + "8:" // Oddments: Load input (1, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 11f\n" + "ld1 { v11.h }[4], [x26], #0x2\n" + "b 11f\n" + "9:" // Oddments: Load input (1, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 10f\n" "ld1 { v11.s }[0], [x26], #0x4\n" - "tbz %x[n_channels], #0, 7f\n" + "tbz %x[n_channels], #0, 11f\n" "ld1 { v11.h }[2], [x26], #0x2\n" - "b 7f\n" - "6:" // Oddments: Load input (1, 3): Bit 1: Unset + "b 11f\n" + "10:" // Oddments: Load input (1, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x26], #0x2\n" - "7:" // Oddments: Load input (1, 3): Bit 1: End - "fmla v30.8h, v4.8h, v11.8h\n" - "ldr x25, [x16, #0x48]\n" - "add x25, x25, x14\n" - "tbz %x[n_channels], #1, 8f\n" + "11:" // Oddments: Load input (1, 3): Bit 2: End + "ldr x25, [x9, #0x48]\n" + "fmla v29.8h, v4.8h, v11.8h\n" + "add x25, x25, x28\n" + "tbz %x[n_channels], #2, 13f\n" + "ld1 { v12.d }[0], [x25], #0x8\n" + "tbz %x[n_channels], #1, 12f\n" + "ld1 { v12.s }[2], [x25], #0x4\n" + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v12.h }[6], [x25], #0x2\n" + "b 15f\n" + "12:" // Oddments: Load input (1, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v12.h }[4], [x25], #0x2\n" + "b 15f\n" + "13:" // Oddments: Load input (1, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 14f\n" "ld1 { v12.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 9f\n" + "tbz %x[n_channels], #0, 15f\n" "ld1 { v12.h }[2], [x25], #0x2\n" - "b 9f\n" - "8:" // Oddments: Load input (1, 4): Bit 1: Unset + "b 15f\n" + "14:" // Oddments: Load input (1, 4): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x25], #0x2\n" - "9:" // Oddments: Load input (1, 4): Bit 1: End - "fmla v30.8h, v5.8h, v12.8h\n" - "ldr x24, [x16, #0x50]\n" - "add x24, x24, x14\n" - "tbz %x[n_channels], #1, 10f\n" + "15:" // Oddments: Load input (1, 4): Bit 2: End + "ldr x24, [x9, #0x50]\n" + "fmla v29.8h, v5.8h, v12.8h\n" + "add x24, x24, x28\n" + "tbz %x[n_channels], #2, 17f\n" + "ld1 { v13.d }[0], [x24], #0x8\n" + "tbz %x[n_channels], #1, 16f\n" + "ld1 { v13.s }[2], [x24], #0x4\n" + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v13.h }[6], [x24], #0x2\n" + "b 19f\n" + "16:" // Oddments: Load input (1, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v13.h }[4], [x24], #0x2\n" + "b 19f\n" + "17:" // Oddments: Load input (1, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 18f\n" "ld1 { v13.s }[0], [x24], #0x4\n" - "tbz %x[n_channels], #0, 11f\n" + "tbz %x[n_channels], #0, 19f\n" "ld1 { v13.h }[2], [x24], #0x2\n" - "b 11f\n" - "10:" // Oddments: Load input (1, 2): Bit 1: Unset + "b 19f\n" + "18:" // Oddments: Load input (1, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v13.h }[0], [x24], #0x2\n" - "11:" // Oddments: Load input (1, 2): Bit 1: End - "fmla v31.8h, v5.8h, v13.8h\n" - "ldr x23, [x16, #0x58]\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "add x23, x23, x14\n" - "tbz %x[n_channels], #1, 12f\n" + "19:" // Oddments: Load input (1, 2): Bit 2: End + "ldr x23, [x9, #0x58]\n" + "fmla v28.8h, v5.8h, v13.8h\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "add x23, x23, x28\n" + "tbz %x[n_channels], #2, 21f\n" + "ld1 { v14.d }[0], [x23], #0x8\n" + "tbz %x[n_channels], #1, 20f\n" + "ld1 { v14.s }[2], [x23], #0x4\n" + "tbz %x[n_channels], #0, 23f\n" + "ld1 { v14.h }[6], [x23], #0x2\n" + "b 23f\n" + "20:" // Oddments: Load input (3, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 23f\n" + "ld1 { v14.h }[4], [x23], #0x2\n" + "b 23f\n" + "21:" // Oddments: Load input (3, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 22f\n" "ld1 { v14.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 13f\n" + "tbz %x[n_channels], #0, 23f\n" "ld1 { v14.h }[2], [x23], #0x2\n" - "b 13f\n" - "12:" // Oddments: Load input (3, 0): Bit 1: Unset + "b 23f\n" + "22:" // Oddments: Load input (3, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v14.h }[0], [x23], #0x2\n" - "13:" // Oddments: Load input (3, 0): Bit 1: End - "fmla v29.8h, v3.8h, v14.8h\n" - "ldr x22, [x16, #0x60]\n" - "add x22, x22, x14\n" - "tbz %x[n_channels], #1, 14f\n" + "23:" // Oddments: Load input (3, 0): Bit 2: End + "ldr x22, [x9, #0x60]\n" + "fmla v30.8h, v3.8h, v14.8h\n" + "add x22, x22, x28\n" + "tbz %x[n_channels], #2, 25f\n" + "ld1 { v15.d }[0], [x22], #0x8\n" + "tbz %x[n_channels], #1, 24f\n" + "ld1 { v15.s }[2], [x22], #0x4\n" + "tbz %x[n_channels], #0, 27f\n" + "ld1 { v15.h }[6], [x22], #0x2\n" + "b 27f\n" + "24:" // Oddments: Load input (2, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 27f\n" + "ld1 { v15.h }[4], [x22], #0x2\n" + "b 27f\n" + "25:" // Oddments: Load input (2, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 26f\n" "ld1 { v15.s }[0], [x22], #0x4\n" - "tbz %x[n_channels], #0, 15f\n" + "tbz %x[n_channels], #0, 27f\n" "ld1 { v15.h }[2], [x22], #0x2\n" - "b 15f\n" - "14:" // Oddments: Load input (2, 0): Bit 1: Unset + "b 27f\n" + "26:" // Oddments: Load input (2, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v15.h }[0], [x22], #0x2\n" - "15:" // Oddments: Load input (2, 0): Bit 1: End - "fmla v31.8h, v6.8h, v15.8h\n" - "ldr x21, [x16, #0x68]\n" - "fmla v29.8h, v0.8h, v15.8h\n" - "add x21, x21, x14\n" - "tbz %x[n_channels], #1, 16f\n" + "27:" // Oddments: Load input (2, 0): Bit 2: End + "ldr x21, [x9, #0x68]\n" + "fmla v28.8h, v6.8h, v15.8h\n" + "fmla v30.8h, v0.8h, v15.8h\n" + "add x21, x21, x28\n" + "tbz %x[n_channels], #2, 29f\n" + "ld1 { v11.d }[0], [x21], #0x8\n" + "tbz %x[n_channels], #1, 28f\n" + "ld1 { v11.s }[2], [x21], #0x4\n" + "tbz %x[n_channels], #0, 31f\n" + "ld1 { v11.h }[6], [x21], #0x2\n" + "b 31f\n" + "28:" // Oddments: Load input (3, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 31f\n" + "ld1 { v11.h }[4], [x21], #0x2\n" + "b 31f\n" + "29:" // Oddments: Load input (3, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 30f\n" "ld1 { v11.s }[0], [x21], #0x4\n" - "tbz %x[n_channels], #0, 17f\n" + "tbz %x[n_channels], #0, 31f\n" "ld1 { v11.h }[2], [x21], #0x2\n" - "b 17f\n" - "16:" // Oddments: Load input (3, 1): Bit 1: Unset + "b 31f\n" + "30:" // Oddments: Load input (3, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x21], #0x2\n" - "17:" // Oddments: Load input (3, 1): Bit 1: End - "fmla v29.8h, v4.8h, v11.8h\n" - "ldr x20, [x16, #0x70]\n" - "add x20, x20, x14\n" - "tbz %x[n_channels], #1, 18f\n" + "31:" // Oddments: Load input (3, 1): Bit 2: End + "ldr x20, [x9, #0x70]\n" + "fmla v30.8h, v4.8h, v11.8h\n" + "add x20, x20, x28\n" + "tbz %x[n_channels], #2, 33f\n" + "ld1 { v16.d }[0], [x20], #0x8\n" + "tbz %x[n_channels], #1, 32f\n" + "ld1 { v16.s }[2], [x20], #0x4\n" + "tbz %x[n_channels], #0, 35f\n" + "ld1 { v16.h }[6], [x20], #0x2\n" + "b 35f\n" + "32:" // Oddments: Load input (2, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 35f\n" + "ld1 { v16.h }[4], [x20], #0x2\n" + "b 35f\n" + "33:" // Oddments: Load input (2, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 34f\n" "ld1 { v16.s }[0], [x20], #0x4\n" - "tbz %x[n_channels], #0, 19f\n" + "tbz %x[n_channels], #0, 35f\n" "ld1 { v16.h }[2], [x20], #0x2\n" - "b 19f\n" - "18:" // Oddments: Load input (2, 1): Bit 1: Unset + "b 35f\n" + "34:" // Oddments: Load input (2, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v16.h }[0], [x20], #0x2\n" - "19:" // Oddments: Load input (2, 1): Bit 1: End - "fmla v31.8h, v7.8h, v16.8h\n" - "ldr x19, [x16, #0x78]\n" - "fmla v29.8h, v1.8h, v16.8h\n" - "add x19, x19, x14\n" - "tbz %x[n_channels], #1, 20f\n" + "35:" // Oddments: Load input (2, 1): Bit 2: End + "ldr x19, [x9, #0x78]\n" + "fmla v28.8h, v7.8h, v16.8h\n" + "fmla v30.8h, v1.8h, v16.8h\n" + "add x19, x19, x28\n" + "tbz %x[n_channels], #2, 37f\n" + "ld1 { v13.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 36f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 39f\n" + "ld1 { v13.h }[6], [x19], #0x2\n" + "b 39f\n" + "36:" // Oddments: Load input (3, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 39f\n" + "ld1 { v13.h }[4], [x19], #0x2\n" + "b 39f\n" + "37:" // Oddments: Load input (3, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 38f\n" "ld1 { v13.s }[0], [x19], #0x4\n" - "tbz %x[n_channels], #0, 21f\n" + "tbz %x[n_channels], #0, 39f\n" "ld1 { v13.h }[2], [x19], #0x2\n" - "b 21f\n" - "20:" // Oddments: Load input (3, 3): Bit 1: Unset + "b 39f\n" + "38:" // Oddments: Load input (3, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v13.h }[0], [x19], #0x2\n" - "21:" // Oddments: Load input (3, 3): Bit 1: End - "fmla v28.8h, v4.8h, v13.8h\n" - "ldr x26, [x16, #0x80]\n" - "add x26, x26, x14\n" - "tbz %x[n_channels], #1, 22f\n" + "39:" // Oddments: Load input (3, 3): Bit 2: End + "ldr x26, [x9, #0x80]\n" + "fmla v31.8h, v4.8h, v13.8h\n" + "add x26, x26, x28\n" + "tbz %x[n_channels], #2, 41f\n" + "ld1 { v12.d }[0], [x26], #0x8\n" + "tbz %x[n_channels], #1, 40f\n" + "ld1 { v12.s }[2], [x26], #0x4\n" + "tbz %x[n_channels], #0, 43f\n" + "ld1 { v12.h }[6], [x26], #0x2\n" + "b 43f\n" + "40:" // Oddments: Load input (2, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 43f\n" + "ld1 { v12.h }[4], [x26], #0x2\n" + "b 43f\n" + "41:" // Oddments: Load input (2, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 42f\n" "ld1 { v12.s }[0], [x26], #0x4\n" - "tbz %x[n_channels], #0, 23f\n" + "tbz %x[n_channels], #0, 43f\n" "ld1 { v12.h }[2], [x26], #0x2\n" - "b 23f\n" - "22:" // Oddments: Load input (2, 3): Bit 1: Unset + "b 43f\n" + "42:" // Oddments: Load input (2, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v12.h }[0], [x26], #0x2\n" - "23:" // Oddments: Load input (2, 3): Bit 1: End - "fmla v30.8h, v7.8h, v12.8h\n" - "ldr x25, [x16, #0x88]\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "add x25, x25, x14\n" - "tbz %x[n_channels], #1, 24f\n" + "43:" // Oddments: Load input (2, 3): Bit 2: End + "ldr x25, [x9, #0x88]\n" + "fmla v29.8h, v7.8h, v12.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "add x25, x25, x28\n" + "tbz %x[n_channels], #2, 45f\n" + "ld1 { v14.d }[0], [x25], #0x8\n" + "tbz %x[n_channels], #1, 44f\n" + "ld1 { v14.s }[2], [x25], #0x4\n" + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v14.h }[6], [x25], #0x2\n" + "b 47f\n" + "44:" // Oddments: Load input (3, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v14.h }[4], [x25], #0x2\n" + "b 47f\n" + "45:" // Oddments: Load input (3, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 46f\n" "ld1 { v14.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 25f\n" + "tbz %x[n_channels], #0, 47f\n" "ld1 { v14.h }[2], [x25], #0x2\n" - "b 25f\n" - "24:" // Oddments: Load input (3, 4): Bit 1: Unset + "b 47f\n" + "46:" // Oddments: Load input (3, 4): Bit 2: Unset: Bit 1: Unset "ld1 { v14.h }[0], [x25], #0x2\n" - "25:" // Oddments: Load input (3, 4): Bit 1: End - "fmla v28.8h, v5.8h, v14.8h\n" - "ldr x24, [x16, #0x90]\n" - "add x24, x24, x14\n" - "tbz %x[n_channels], #1, 26f\n" + "47:" // Oddments: Load input (3, 4): Bit 2: End + "ldr x24, [x9, #0x90]\n" + "fmla v31.8h, v5.8h, v14.8h\n" + "add x24, x24, x28\n" + "tbz %x[n_channels], #2, 49f\n" + "ld1 { v15.d }[0], [x24], #0x8\n" + "tbz %x[n_channels], #1, 48f\n" + "ld1 { v15.s }[2], [x24], #0x4\n" + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v15.h }[6], [x24], #0x2\n" + "b 51f\n" + "48:" // Oddments: Load input (4, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v15.h }[4], [x24], #0x2\n" + "b 51f\n" + "49:" // Oddments: Load input (4, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 50f\n" "ld1 { v15.s }[0], [x24], #0x4\n" - "tbz %x[n_channels], #0, 27f\n" + "tbz %x[n_channels], #0, 51f\n" "ld1 { v15.h }[2], [x24], #0x2\n" - "b 27f\n" - "26:" // Oddments: Load input (4, 0): Bit 1: Unset + "b 51f\n" + "50:" // Oddments: Load input (4, 0): Bit 2: Unset: Bit 1: Unset "ld1 { v15.h }[0], [x24], #0x2\n" - "27:" // Oddments: Load input (4, 0): Bit 1: End - "fmla v29.8h, v6.8h, v15.8h\n" - "ldr x23, [x16, #0x98]\n" - "add x23, x23, x14\n" - "tbz %x[n_channels], #1, 28f\n" + "51:" // Oddments: Load input (4, 0): Bit 2: End + "ldr x23, [x9, #0x98]\n" + "fmla v30.8h, v6.8h, v15.8h\n" + "add x23, x23, x28\n" + "tbz %x[n_channels], #2, 53f\n" + "ld1 { v11.d }[0], [x23], #0x8\n" + "tbz %x[n_channels], #1, 52f\n" + "ld1 { v11.s }[2], [x23], #0x4\n" + "tbz %x[n_channels], #0, 55f\n" + "ld1 { v11.h }[6], [x23], #0x2\n" + "b 55f\n" + "52:" // Oddments: Load input (2, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 55f\n" + "ld1 { v11.h }[4], [x23], #0x2\n" + "b 55f\n" + "53:" // Oddments: Load input (2, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 54f\n" "ld1 { v11.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 29f\n" + "tbz %x[n_channels], #0, 55f\n" "ld1 { v11.h }[2], [x23], #0x2\n" - "b 29f\n" - "28:" // Oddments: Load input (2, 4): Bit 1: Unset + "b 55f\n" + "54:" // Oddments: Load input (2, 4): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x23], #0x2\n" - "29:" // Oddments: Load input (2, 4): Bit 1: End - "fmla v30.8h, v8.8h, v11.8h\n" - "ldr x22, [x16, #0xa0]\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "add x22, x22, x14\n" - "tbz %x[n_channels], #1, 30f\n" + "55:" // Oddments: Load input (2, 4): Bit 2: End + "ldr x22, [x9, #0xa0]\n" + "fmla v29.8h, v8.8h, v11.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "add x22, x22, x28\n" + "tbz %x[n_channels], #2, 57f\n" + "ld1 { v13.d }[0], [x22], #0x8\n" + "tbz %x[n_channels], #1, 56f\n" + "ld1 { v13.s }[2], [x22], #0x4\n" + "tbz %x[n_channels], #0, 59f\n" + "ld1 { v13.h }[6], [x22], #0x2\n" + "b 59f\n" + "56:" // Oddments: Load input (4, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 59f\n" + "ld1 { v13.h }[4], [x22], #0x2\n" + "b 59f\n" + "57:" // Oddments: Load input (4, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 58f\n" "ld1 { v13.s }[0], [x22], #0x4\n" - "tbz %x[n_channels], #0, 31f\n" + "tbz %x[n_channels], #0, 59f\n" "ld1 { v13.h }[2], [x22], #0x2\n" - "b 31f\n" - "30:" // Oddments: Load input (4, 1): Bit 1: Unset + "b 59f\n" + "58:" // Oddments: Load input (4, 1): Bit 2: Unset: Bit 1: Unset "ld1 { v13.h }[0], [x22], #0x2\n" - "31:" // Oddments: Load input (4, 1): Bit 1: End - "fmla v29.8h, v7.8h, v13.8h\n" - "ldr x21, [x16, #0xa8]\n" - "add x21, x21, x14\n" - "tbz %x[n_channels], #1, 32f\n" + "59:" // Oddments: Load input (4, 1): Bit 2: End + "ldr x21, [x9, #0xa8]\n" + "fmla v30.8h, v7.8h, v13.8h\n" + "add x21, x21, x28\n" + "tbz %x[n_channels], #2, 61f\n" + "ld1 { v16.d }[0], [x21], #0x8\n" + "tbz %x[n_channels], #1, 60f\n" + "ld1 { v16.s }[2], [x21], #0x4\n" + "tbz %x[n_channels], #0, 63f\n" + "ld1 { v16.h }[6], [x21], #0x2\n" + "b 63f\n" + "60:" // Oddments: Load input (3, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 63f\n" + "ld1 { v16.h }[4], [x21], #0x2\n" + "b 63f\n" + "61:" // Oddments: Load input (3, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 62f\n" "ld1 { v16.s }[0], [x21], #0x4\n" - "tbz %x[n_channels], #0, 33f\n" + "tbz %x[n_channels], #0, 63f\n" "ld1 { v16.h }[2], [x21], #0x2\n" - "b 33f\n" - "32:" // Oddments: Load input (3, 2): Bit 1: Unset + "b 63f\n" + "62:" // Oddments: Load input (3, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v16.h }[0], [x21], #0x2\n" - "33:" // Oddments: Load input (3, 2): Bit 1: End - "fmla v29.8h, v5.8h, v16.8h\n" - "ldr x20, [x16, #0xb0]\n" - "fmla v28.8h, v3.8h, v16.8h\n" - "add x20, x20, x14\n" - "tbz %x[n_channels], #1, 34f\n" + "63:" // Oddments: Load input (3, 2): Bit 2: End + "ldr x20, [x9, #0xb0]\n" + "fmla v30.8h, v5.8h, v16.8h\n" + "fmla v31.8h, v3.8h, v16.8h\n" + "add x20, x20, x28\n" + "tbz %x[n_channels], #2, 65f\n" + "ld1 { v14.d }[0], [x20], #0x8\n" + "tbz %x[n_channels], #1, 64f\n" + "ld1 { v14.s }[2], [x20], #0x4\n" + "tbz %x[n_channels], #0, 67f\n" + "ld1 { v14.h }[6], [x20], #0x2\n" + "b 67f\n" + "64:" // Oddments: Load input (4, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 67f\n" + "ld1 { v14.h }[4], [x20], #0x2\n" + "b 67f\n" + "65:" // Oddments: Load input (4, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 66f\n" "ld1 { v14.s }[0], [x20], #0x4\n" - "tbz %x[n_channels], #0, 35f\n" + "tbz %x[n_channels], #0, 67f\n" "ld1 { v14.h }[2], [x20], #0x2\n" - "b 35f\n" - "34:" // Oddments: Load input (4, 3): Bit 1: Unset + "b 67f\n" + "66:" // Oddments: Load input (4, 3): Bit 2: Unset: Bit 1: Unset "ld1 { v14.h }[0], [x20], #0x2\n" - "35:" // Oddments: Load input (4, 3): Bit 1: End - "fmla v28.8h, v7.8h, v14.8h\n" - "ldr x19, [x16, #0xb8]\n" - "add x19, x19, x14\n" - "tbz %x[n_channels], #1, 36f\n" + "67:" // Oddments: Load input (4, 3): Bit 2: End + "ldr x19, [x9, #0xb8]\n" + "fmla v31.8h, v7.8h, v14.8h\n" + "add x19, x19, x28\n" + "tbz %x[n_channels], #2, 69f\n" + "ld1 { v15.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 68f\n" + "ld1 { v15.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 71f\n" + "ld1 { v15.h }[6], [x19], #0x2\n" + "b 71f\n" + "68:" // Oddments: Load input (4, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 71f\n" + "ld1 { v15.h }[4], [x19], #0x2\n" + "b 71f\n" + "69:" // Oddments: Load input (4, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 70f\n" "ld1 { v15.s }[0], [x19], #0x4\n" - "tbz %x[n_channels], #0, 37f\n" + "tbz %x[n_channels], #0, 71f\n" "ld1 { v15.h }[2], [x19], #0x2\n" - "b 37f\n" - "36:" // Oddments: Load input (4, 2): Bit 1: Unset + "b 71f\n" + "70:" // Oddments: Load input (4, 2): Bit 2: Unset: Bit 1: Unset "ld1 { v15.h }[0], [x19], #0x2\n" - "37:" // Oddments: Load input (4, 2): Bit 1: End - "fmla v29.8h, v8.8h, v15.8h\n" - "ldr x26, [x16, #0xc0]\n" - "fmla v28.8h, v6.8h, v15.8h\n" - "add x26, x26, x14\n" - "tbz %x[n_channels], #1, 38f\n" + "71:" // Oddments: Load input (4, 2): Bit 2: End + "ldr x26, [x9, #0xc0]\n" + "fmla v30.8h, v8.8h, v15.8h\n" + "fmla v31.8h, v6.8h, v15.8h\n" + "add x26, x26, x28\n" + "tbz %x[n_channels], #2, 73f\n" + "ld1 { v11.d }[0], [x26], #0x8\n" + "tbz %x[n_channels], #1, 72f\n" + "ld1 { v11.s }[2], [x26], #0x4\n" + "tbz %x[n_channels], #0, 75f\n" + "ld1 { v11.h }[6], [x26], #0x2\n" + "b 75f\n" + "72:" // Oddments: Load input (4, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 75f\n" + "ld1 { v11.h }[4], [x26], #0x2\n" + "b 75f\n" + "73:" // Oddments: Load input (4, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 74f\n" "ld1 { v11.s }[0], [x26], #0x4\n" - "tbz %x[n_channels], #0, 39f\n" + "tbz %x[n_channels], #0, 75f\n" "ld1 { v11.h }[2], [x26], #0x2\n" - "b 39f\n" - "38:" // Oddments: Load input (4, 4): Bit 1: Unset + "b 75f\n" + "74:" // Oddments: Load input (4, 4): Bit 2: Unset: Bit 1: Unset "ld1 { v11.h }[0], [x26], #0x2\n" - "39:" // Oddments: Load input (4, 4): Bit 1: End - "fmla v28.8h, v8.8h, v11.8h\n" - "fmax v31.8h, v31.8h, v19.8h\n" - "fmax v30.8h, v30.8h, v19.8h\n" - "fmax v29.8h, v29.8h, v19.8h\n" - "fmin v31.8h, v31.8h, v18.8h\n" - "fmin v30.8h, v30.8h, v18.8h\n" - "fmin v29.8h, v29.8h, v18.8h\n" + "75:" // Oddments: Load input (4, 4): Bit 2: End + "fmla v31.8h, v8.8h, v11.8h\n" "fmax v28.8h, v28.8h, v19.8h\n" + "fmax v29.8h, v29.8h, v19.8h\n" + "fmax v30.8h, v30.8h, v19.8h\n" + "fmax v31.8h, v31.8h, v19.8h\n" "fmin v28.8h, v28.8h, v18.8h\n" - "tbz %x[n_channels], #1, 40f\n" - "st1 { v31.s }[0], [x13], #0x4\n" - "st1 { v30.s }[0], [x12], #0x4\n" - "st1 { v29.s }[0], [x10], #0x4\n" - "st1 { v28.s }[0], [x9], #0x4\n" - "tbz %x[n_channels], #0, 41f\n" - "st1 { v31.h }[2], [x13], #0x2\n" - "st1 { v30.h }[2], [x12], #0x2\n" - "st1 { v29.h }[2], [x10], #0x2\n" - "st1 { v28.h }[2], [x9], #0x2\n" - "b 41f\n" - "40:" // Oddments: Store: Bit 1: Unset - "st1 { v31.h }[0], [x13], #0x2\n" - "st1 { v30.h }[0], [x12], #0x2\n" - "st1 { v29.h }[0], [x10], #0x2\n" - "st1 { v28.h }[0], [x9], #0x2\n" - "41:" // Oddments: Store: Bit 1: End + "fmin v29.8h, v29.8h, v18.8h\n" + "fmin v30.8h, v30.8h, v18.8h\n" + "fmin v31.8h, v31.8h, v18.8h\n" + "tbz %x[n_channels], #2, 77f\n" + "st1 { v28.d }[0], [x13], #0x8\n" + "st1 { v29.d }[0], [x12], #0x8\n" + "st1 { v30.d }[0], [x11], #0x8\n" + "st1 { v31.d }[0], [x10], #0x8\n" + "tbz %x[n_channels], #1, 76f\n" + "st1 { v28.s }[2], [x13], #0x4\n" + "st1 { v29.s }[2], [x12], #0x4\n" + "st1 { v30.s }[2], [x11], #0x4\n" + "st1 { v31.s }[2], [x10], #0x4\n" + "tbz %x[n_channels], #0, 79f\n" + "st1 { v28.h }[6], [x13], #0x2\n" + "st1 { v29.h }[6], [x12], #0x2\n" + "st1 { v30.h }[6], [x11], #0x2\n" + "st1 { v31.h }[6], [x10], #0x2\n" + "b 79f\n" + "76:" // Oddments: Store: Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 79f\n" + "st1 { v28.h }[4], [x13], #0x2\n" + "st1 { v29.h }[4], [x12], #0x2\n" + "st1 { v30.h }[4], [x11], #0x2\n" + "st1 { v31.h }[4], [x10], #0x2\n" + "b 79f\n" + "77:" // Oddments: Store: Bit 2: Unset + "tbz %x[n_channels], #1, 78f\n" + "st1 { v28.s }[0], [x13], #0x4\n" + "st1 { v29.s }[0], [x12], #0x4\n" + "st1 { v30.s }[0], [x11], #0x4\n" + "st1 { v31.s }[0], [x10], #0x4\n" + "tbz %x[n_channels], #0, 79f\n" + "st1 { v28.h }[2], [x13], #0x2\n" + "st1 { v29.h }[2], [x12], #0x2\n" + "st1 { v30.h }[2], [x11], #0x2\n" + "st1 { v31.h }[2], [x10], #0x2\n" + "b 79f\n" + "78:" // Oddments: Store: Bit 2: Unset: Bit 1: Unset + "st1 { v28.h }[0], [x13], #0x2\n" + "st1 { v29.h }[0], [x12], #0x2\n" + "st1 { v30.h }[0], [x11], #0x2\n" + "st1 { v31.h }[0], [x10], #0x2\n" + "79:" // Oddments: Store: Bit 2: End - "42:" // End + "80:" // End : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp index ec5f97ab6d..027fd7f4c7 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp @@ -87,446 +87,494 @@ void a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( ); __asm__ __volatile__( - "mov x28, #0x0\n" - "mov x27, #0x0\n" + "mov x26, #0x0\n" + "mov x25, #0x0\n" "1:" // Tile loop - "str x28, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "mov x26, #0x2\n" - "str x27, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "mov x25, #0x2\n" - "ldr x3, [%x[params_struct], %[offsetof_args_params]]\n" - "add x24, %x[params_struct], %[offsetof_args_min]\n" - "ldr x23, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" - "add x21, %x[params_struct], %[offsetof_args_max]\n" - "ldr x4, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" - "mov x22, #0x0\n" + "str x26, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "mov x22, #0x2\n" + "mov x21, #0x2\n" + "str x25, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x24, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" + "ldr x3, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" + "mul x20, x26, x24\n" // offset = tile_i * ld_input_row + "ldr x23, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" + "madd x20, x25, x3, x20\n" // offset += tile_j * ld_input_col + "ldr x4, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" + "lsl x3, x3, #0x1\n" + "mul x19, x26, x23\n" // offset = tile_i * ld_output_row "ldr x5, [%x[params_struct], %[offsetof_args_inptr]]\n" - "mul x19, x28, x23\n" // offset = tile_i * ld_input_row - "ldr x20, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" - "madd x19, x27, x4, x19\n" // offset += tile_j * ld_input_col - "ldr x6, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" - "mul x19, x19, x26\n" // offset *= kernel_stride * output_size - "ldr x7, [%x[params_struct], %[offsetof_args_outptr]]\n" - "add x5, x5, x19, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) - "ld1r { v18.8h }, [x24]\n" - "add x8, x5, x23, LSL #1\n" - "ld1r { v17.8h }, [x21]\n" - "add x17, x8, x23, LSL #1\n" + "ldr x6, [%x[params_struct], %[offsetof_args_outptr]]\n" + "add x7, x3, x3\n" + "mul x20, x20, x22\n" // offset *= kernel_stride * output_size + "add x5, x5, x20, LSL #1\n" // inptr[0] += offset * sizeof(__fp16) + "add x8, x5, x24, LSL #1\n" + "ldr x17, [%x[params_struct], %[offsetof_args_params]]\n" + "madd x19, x25, x4, x19\n" // offset += tile_j * ld_output_col + "add x16, x8, x24, LSL #1\n" + "mov x22, #0x10\n" // cntb _, ALL, #1 + "mul x19, x19, x21\n" // offset *= output_tile_size + "lsr x21, %x[n_channels], #0x3\n" + "add x15, x16, x24, LSL #1\n" + "add x14, x7, x3\n" + "add x13, x15, x24, LSL #1\n" + "add x12, x14, x3\n" + "add x6, x6, x19, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) + "add x20, %x[params_struct], %[offsetof_args_min]\n" + "add x19, %x[params_struct], %[offsetof_args_max]\n" + "ld1r { v18.8h }, [x20]\n" + "ld1r { v17.8h }, [x19]\n" + "add x11, x13, x24, LSL #1\n" + "add x10, x12, x3\n" + "add x9, x6, x23, LSL #1\n" "lsl x4, x4, #0x1\n" - "add x16, x17, x23, LSL #1\n" - "add x15, x16, x23, LSL #1\n" - "add x14, x15, x23, LSL #1\n" - "add x13, x4, x4\n" - "add x12, x13, x4\n" - "add x11, x12, x4\n" - "add x10, x11, x4\n" - "mul x19, x28, x20\n" // offset = tile_i * ld_output_row - "madd x19, x27, x6, x19\n" // offset += tile_j * ld_output_col - "mul x19, x19, x25\n" // offset *= output_tile_size - "add x7, x7, x19, LSL #1\n" // outptrs[0] += offset * sizeof(__fp16) - "add x9, x7, x20, LSL #1\n" - "lsl x6, x6, #0x1\n" - "mov x21, #0x10\n" // cntb _, ALL, #1 - "sub x20, XZR, x21\n" - "lsr x19, %x[n_channels], #0x3\n" - "cbz x19, 4f\n" - "ldr q16, [x3, #0x0]\n" - "ldr q0, [x3, #0x10]\n" - "cmp x21, x19, LSL #4\n" - "ldr q1, [x3, #0x20]\n" - "ldr q2, [x3, #0x30]\n" - "ldr q3, [x3, #0x40]\n" - "ldr q4, [x3, #0x50]\n" - "add x3, x3, #0x60\n" + "mov x20, #0x0\n" + "sub x19, XZR, x22\n" + "cbz x21, 4f\n" + "ldr q16, [x17, #0x0]\n" + "cmp x22, x21, LSL #4\n" + "ldr q0, [x17, #0x10]\n" + "ldr q1, [x17, #0x20]\n" + "ldr q2, [x17, #0x30]\n" + "ldr q3, [x17, #0x40]\n" + "ldr q4, [x17, #0x50]\n" "ld1 { v5.8h }, [x5]\n" - "ldr q6, [x5, x4]\n" + "add x17, x17, #0x60\n" + "ldr q6, [x5, x3]\n" "ld1 { v7.8h }, [x8]\n" - "ldr q8, [x8, x4]\n" - "ldr q9, [x5, x13]\n" - "ldr q13, [x8, x13]\n" - "ldr q11, [x5, x12]\n" - "ldr q12, [x5, x11]\n" + "ldr q8, [x8, x3]\n" + "ldr q9, [x5, x7]\n" + "ldr q13, [x8, x7]\n" + "ldr q11, [x5, x14]\n" + "ldr q12, [x5, x12]\n" "ldr q10, [x8, x10]\n" - "ld1 { v14.8h }, [x17]\n" + "ld1 { v14.8h }, [x16]\n" "bge 3f\n" "2:" // Tile loop: Channel loop - "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v5.8h\n" - "ldr q5, [x8, x12]\n" - "add x20, x20, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v6.8h\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v5.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v6.8h\n" + "ldr q5, [x8, x14]\n" "add x22, x22, #0x10\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v7.8h\n" - "add x21, x21, #0x10\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v8.8h\n" - "ldr q0, [x3, #0x0]\n" - "cmp x21, x19, LSL #4\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "ldr q6, [x8, x11]\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v7.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v8.8h\n" + "ldr q0, [x17, #0x0]\n" + "cmp x22, x21, LSL #4\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "ldr q6, [x8, x12]\n" "add x8, x8, #0x10\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "ldr q16, [x3, #0x140]\n" - "fmla v29.8h, v1.8h, v8.8h\n" - "fmla v28.8h, v1.8h, v13.8h\n" - "ldr q1, [x3, #0x10]\n" - "fmla v31.8h, v2.8h, v9.8h\n" + "fmla v30.8h, v1.8h, v8.8h\n" + "fmla v31.8h, v1.8h, v13.8h\n" + "ldr q1, [x17, #0x10]\n" + "add x19, x19, #0x10\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" "ldr q9, [x5, x10]\n" "add x5, x5, #0x10\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v13.8h\n" - "fmla v28.8h, v2.8h, v5.8h\n" - "ldr q2, [x3, #0x20]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x17, x4]\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v29.8h, v3.8h, v5.8h\n" - "fmla v28.8h, v3.8h, v6.8h\n" - "ldr q3, [x3, #0x30]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "ldr q12, [x17, x13]\n" - "fmla v30.8h, v4.8h, v9.8h\n" - "ldr q9, [x17, x12]\n" - "fmla v29.8h, v4.8h, v6.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "ldr q4, [x3, #0x40]\n" - "fmla v31.8h, v0.8h, v7.8h\n" + "fmla v30.8h, v2.8h, v13.8h\n" + "fmla v31.8h, v2.8h, v5.8h\n" + "ldr q2, [x17, #0x20]\n" + "add x20, x20, #0x10\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "ldr q11, [x16, x3]\n" + "ldr q16, [x17, #0x140]\n" + "fmla v30.8h, v3.8h, v5.8h\n" + "fmla v31.8h, v3.8h, v6.8h\n" + "ldr q3, [x17, #0x30]\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v9.8h\n" + "ldr q12, [x16, x7]\n" + "ldr q9, [x16, x14]\n" + "fmla v30.8h, v4.8h, v6.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "ldr q4, [x17, #0x40]\n" + "fmla v28.8h, v0.8h, v7.8h\n" + "fmla v29.8h, v0.8h, v8.8h\n" "ld1 { v7.8h }, [x8]\n" - "fmla v30.8h, v0.8h, v8.8h\n" - "fmla v29.8h, v0.8h, v14.8h\n" - "fmla v28.8h, v0.8h, v11.8h\n" - "ldr q0, [x3, #0x50]\n" - "fmla v31.8h, v1.8h, v8.8h\n" - "ldr q8, [x17, x10]\n" - "fmla v30.8h, v1.8h, v13.8h\n" - "fmla v29.8h, v1.8h, v11.8h\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "ldr q1, [x3, #0x60]\n" - "fmla v31.8h, v2.8h, v13.8h\n" - "ldr q13, [x17, x11]\n" - "add x17, x17, #0x10\n" - "fmla v30.8h, v2.8h, v5.8h\n" - "fmla v29.8h, v2.8h, v12.8h\n" - "fmla v28.8h, v2.8h, v9.8h\n" - "ldr q2, [x3, #0x70]\n" - "fmla v31.8h, v3.8h, v5.8h\n" - "ld1 { v5.8h }, [x16]\n" - "fmla v30.8h, v3.8h, v6.8h\n" - "fmla v29.8h, v3.8h, v9.8h\n" - "fmla v28.8h, v3.8h, v13.8h\n" - "ldr q3, [x3, #0x80]\n" - "fmla v31.8h, v4.8h, v6.8h\n" - "ldr q6, [x16, x4]\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "ldr q10, [x16, x13]\n" - "fmla v29.8h, v4.8h, v13.8h\n" - "fmla v28.8h, v4.8h, v8.8h\n" - "ldr q4, [x3, #0x90]\n" - "fmla v31.8h, v0.8h, v14.8h\n" - "ldr q14, [x16, x10]\n" - "fmla v30.8h, v0.8h, v11.8h\n" - "fmla v29.8h, v0.8h, v5.8h\n" - "fmla v28.8h, v0.8h, v6.8h\n" - "ldr q0, [x3, #0xa0]\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x16, x12]\n" - "fmla v30.8h, v1.8h, v12.8h\n" - "fmla v29.8h, v1.8h, v6.8h\n" - "fmla v28.8h, v1.8h, v10.8h\n" - "ldr q1, [x3, #0xb0]\n" - "fmla v31.8h, v2.8h, v12.8h\n" - "ldr q12, [x16, x11]\n" - "add x16, x16, #0x10\n" - "fmla v30.8h, v2.8h, v9.8h\n" - "fmla v29.8h, v2.8h, v10.8h\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "ldr q2, [x3, #0xc0]\n" - "fmla v31.8h, v3.8h, v9.8h\n" - "ld1 { v9.8h }, [x15]\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "ldr q3, [x3, #0xd0]\n" - "fmla v31.8h, v4.8h, v13.8h\n" - "ldr q13, [x15, x4]\n" - "fmla v30.8h, v4.8h, v8.8h\n" - "ldr q8, [x15, x11]\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "fmla v28.8h, v4.8h, v14.8h\n" - "ldr q4, [x3, #0xe0]\n" - "fmla v31.8h, v0.8h, v5.8h\n" - "ldr q5, [x15, x13]\n" - "fmla v30.8h, v0.8h, v6.8h\n" - "fmla v29.8h, v0.8h, v9.8h\n" - "fmla v28.8h, v0.8h, v13.8h\n" - "ldr q0, [x3, #0xf0]\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "ldr q6, [x15, x12]\n" - "fmla v30.8h, v1.8h, v10.8h\n" + "fmla v30.8h, v0.8h, v14.8h\n" + "fmla v31.8h, v0.8h, v11.8h\n" + "ldr q0, [x17, #0x50]\n" + "fmla v28.8h, v1.8h, v8.8h\n" "fmla v29.8h, v1.8h, v13.8h\n" - "fmla v28.8h, v1.8h, v5.8h\n" - "ldr q1, [x3, #0x100]\n" - "fmla v31.8h, v2.8h, v10.8h\n" - "ldr q10, [x15, x10]\n" - "add x15, x15, #0x10\n" - "fmla v30.8h, v2.8h, v11.8h\n" + "ldr q8, [x16, x10]\n" + "fmla v30.8h, v1.8h, v11.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "ldr q1, [x17, #0x60]\n" + "fmla v28.8h, v2.8h, v13.8h\n" "fmla v29.8h, v2.8h, v5.8h\n" - "fmla v28.8h, v2.8h, v6.8h\n" - "ldr q2, [x3, #0x110]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ld1 { v11.8h }, [x14]\n" - "fmla v30.8h, v3.8h, v12.8h\n" + "ldr q13, [x16, x12]\n" + "add x16, x16, #0x10\n" + "fmla v30.8h, v2.8h, v12.8h\n" + "fmla v31.8h, v2.8h, v9.8h\n" + "ldr q2, [x17, #0x70]\n" + "fmla v28.8h, v3.8h, v5.8h\n" "fmla v29.8h, v3.8h, v6.8h\n" - "fmla v28.8h, v3.8h, v8.8h\n" - "ldr q3, [x3, #0x120]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "ldr q12, [x14, x4]\n" - "fmla v30.8h, v4.8h, v14.8h\n" - "ld1 { v14.8h }, [x17]\n" - "fmla v29.8h, v4.8h, v8.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "ldr q4, [x3, #0x130]\n" - "fmla v31.8h, v0.8h, v9.8h\n" - "ldr q9, [x14, x13]\n" - "fmla v30.8h, v0.8h, v13.8h\n" + "ld1 { v5.8h }, [x15]\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "ldr q3, [x17, #0x80]\n" + "fmla v28.8h, v4.8h, v6.8h\n" + "fmla v29.8h, v4.8h, v10.8h\n" + "ldr q6, [x15, x3]\n" + "ldr q10, [x15, x7]\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "fmla v31.8h, v4.8h, v8.8h\n" + "ldr q4, [x17, #0x90]\n" + "fmla v28.8h, v0.8h, v14.8h\n" "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x14, x12]\n" - "fmla v28.8h, v0.8h, v12.8h\n" - "ldr q0, [x3, #0x150]\n" - "fmla v31.8h, v1.8h, v13.8h\n" - "ldr q13, [x8, x13]\n" - "fmla v30.8h, v1.8h, v5.8h\n" + "ldr q14, [x15, x10]\n" + "fmla v30.8h, v0.8h, v5.8h\n" + "fmla v31.8h, v0.8h, v6.8h\n" + "ldr q0, [x17, #0xa0]\n" + "fmla v28.8h, v1.8h, v11.8h\n" "fmla v29.8h, v1.8h, v12.8h\n" - "ldr q12, [x14, x11]\n" - "fmla v28.8h, v1.8h, v9.8h\n" - "ldr q1, [x3, #0x160]\n" - "fmla v31.8h, v2.8h, v5.8h\n" - "ld1 { v5.8h }, [x5]\n" - "fmla v30.8h, v2.8h, v6.8h\n" + "ldr q11, [x15, x14]\n" + "fmla v30.8h, v1.8h, v6.8h\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "ldr q1, [x17, #0xb0]\n" + "fmla v28.8h, v2.8h, v12.8h\n" "fmla v29.8h, v2.8h, v9.8h\n" - "ldr q9, [x14, x10]\n" - "add x14, x14, #0x10\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "ldr q2, [x3, #0x170]\n" - "fmla v31.8h, v3.8h, v6.8h\n" - "ldr q6, [x5, x4]\n" - "fmla v30.8h, v3.8h, v8.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" - "ldr q11, [x5, x12]\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "ldr q3, [x3, #0x180]\n" - "fmla v31.8h, v4.8h, v8.8h\n" - "ldr q8, [x8, x4]\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "ldr q10, [x8, x10]\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "ldr q12, [x5, x11]\n" - "fmla v28.8h, v4.8h, v9.8h\n" - "ldr q9, [x5, x13]\n" - "ldr q4, [x3, #0x190]\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "add x3, x3, #0x1a0\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "st1 { v31.8h }, [x7]\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "str q30, [x7, x6]\n" + "ldr q12, [x15, x12]\n" + "add x15, x15, #0x10\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "ldr q2, [x17, #0xc0]\n" + "fmla v28.8h, v3.8h, v9.8h\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "ld1 { v9.8h }, [x13]\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "ldr q3, [x17, #0xd0]\n" + "fmla v28.8h, v4.8h, v13.8h\n" + "fmla v29.8h, v4.8h, v8.8h\n" + "ldr q13, [x13, x3]\n" + "ldr q8, [x13, x12]\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "fmla v31.8h, v4.8h, v14.8h\n" + "ldr q4, [x17, #0xe0]\n" + "fmla v28.8h, v0.8h, v5.8h\n" + "fmla v29.8h, v0.8h, v6.8h\n" + "ldr q5, [x13, x7]\n" + "fmla v30.8h, v0.8h, v9.8h\n" + "fmla v31.8h, v0.8h, v13.8h\n" + "ldr q0, [x17, #0xf0]\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "fmla v29.8h, v1.8h, v10.8h\n" + "ldr q6, [x13, x14]\n" + "fmla v30.8h, v1.8h, v13.8h\n" + "fmla v31.8h, v1.8h, v5.8h\n" + "ldr q1, [x17, #0x100]\n" + "fmla v28.8h, v2.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "ldr q10, [x13, x10]\n" + "add x13, x13, #0x10\n" + "fmla v30.8h, v2.8h, v5.8h\n" + "fmla v31.8h, v2.8h, v6.8h\n" + "ldr q2, [x17, #0x110]\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "ld1 { v11.8h }, [x11]\n" + "fmla v30.8h, v3.8h, v6.8h\n" + "fmla v31.8h, v3.8h, v8.8h\n" + "ldr q3, [x17, #0x120]\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v14.8h\n" + "ldr q12, [x11, x3]\n" + "ld1 { v14.8h }, [x16]\n" + "fmla v30.8h, v4.8h, v8.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "ldr q4, [x17, #0x130]\n" + "fmla v28.8h, v0.8h, v9.8h\n" + "fmla v29.8h, v0.8h, v13.8h\n" + "ldr q9, [x11, x7]\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "fmla v31.8h, v0.8h, v12.8h\n" + "ldr q11, [x11, x14]\n" + "ldr q0, [x17, #0x150]\n" + "fmla v28.8h, v1.8h, v13.8h\n" + "fmla v29.8h, v1.8h, v5.8h\n" + "ldr q13, [x8, x7]\n" + "fmla v30.8h, v1.8h, v12.8h\n" + "fmla v31.8h, v1.8h, v9.8h\n" + "ldr q12, [x11, x12]\n" + "ldr q1, [x17, #0x160]\n" + "fmla v28.8h, v2.8h, v5.8h\n" + "fmla v29.8h, v2.8h, v6.8h\n" + "ld1 { v5.8h }, [x5]\n" + "fmla v30.8h, v2.8h, v9.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "ldr q9, [x11, x10]\n" + "add x11, x11, #0x10\n" + "fmla v28.8h, v3.8h, v6.8h\n" + "fmla v29.8h, v3.8h, v8.8h\n" + "ldr q6, [x5, x3]\n" + "ldr q2, [x17, #0x170]\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "ldr q11, [x5, x14]\n" + "ldr q3, [x17, #0x180]\n" + "fmla v28.8h, v4.8h, v8.8h\n" + "fmla v29.8h, v4.8h, v10.8h\n" "fmax v28.8h, v28.8h, v18.8h\n" - "add x7, x7, #0x10\n" + "ldr q8, [x8, x3]\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "fmla v31.8h, v4.8h, v9.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "ldr q9, [x5, x7]\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" + "ldr q12, [x5, x12]\n" + "ldr q10, [x8, x10]\n" "fmin v28.8h, v28.8h, v17.8h\n" - "st1 { v29.8h }, [x9]\n" - "str q28, [x9, x6]\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "st1 { v28.8h }, [x6]\n" + "ldr q4, [x17, #0x190]\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "str q29, [x6, x4]\n" + "add x6, x6, #0x10\n" + "st1 { v30.8h }, [x9]\n" + "add x17, x17, #0x1a0\n" + "str q31, [x9, x4]\n" "add x9, x9, #0x10\n" "blt 2b\n" "3:" // Tile loop: Channel tail - "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v5.8h\n" - "ldr q5, [x8, x12]\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v6.8h\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v7.8h\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v8.8h\n" - "ldr q0, [x3, #0x0]\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "ldr q6, [x8, x11]\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v5.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v6.8h\n" + "ldr q5, [x8, x14]\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v7.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v8.8h\n" + "ldr q0, [x17, #0x0]\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "ldr q6, [x8, x12]\n" "add x8, x8, #0x10\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "fmla v29.8h, v1.8h, v8.8h\n" - "fmla v28.8h, v1.8h, v13.8h\n" - "ldr q1, [x3, #0x10]\n" - "fmla v31.8h, v2.8h, v9.8h\n" + "fmla v30.8h, v1.8h, v8.8h\n" + "fmla v31.8h, v1.8h, v13.8h\n" + "ldr q1, [x17, #0x10]\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" "ldr q9, [x5, x10]\n" "add x5, x5, #0x10\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v13.8h\n" - "fmla v28.8h, v2.8h, v5.8h\n" - "ldr q2, [x3, #0x20]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x17, x4]\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v29.8h, v3.8h, v5.8h\n" - "fmla v28.8h, v3.8h, v6.8h\n" - "ldr q3, [x3, #0x30]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "ldr q12, [x17, x13]\n" - "fmla v30.8h, v4.8h, v9.8h\n" - "ldr q9, [x17, x12]\n" - "fmla v29.8h, v4.8h, v6.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "ldr q4, [x3, #0x40]\n" - "fmla v31.8h, v0.8h, v7.8h\n" - "fmla v30.8h, v0.8h, v8.8h\n" - "fmla v29.8h, v0.8h, v14.8h\n" - "fmla v28.8h, v0.8h, v11.8h\n" - "ldr q0, [x3, #0x50]\n" - "fmla v31.8h, v1.8h, v8.8h\n" - "ldr q8, [x17, x10]\n" - "fmla v30.8h, v1.8h, v13.8h\n" - "fmla v29.8h, v1.8h, v11.8h\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "ldr q1, [x3, #0x60]\n" - "fmla v31.8h, v2.8h, v13.8h\n" - "ldr q13, [x17, x11]\n" - "add x17, x17, #0x10\n" - "fmla v30.8h, v2.8h, v5.8h\n" - "fmla v29.8h, v2.8h, v12.8h\n" - "fmla v28.8h, v2.8h, v9.8h\n" - "ldr q2, [x3, #0x70]\n" - "fmla v31.8h, v3.8h, v5.8h\n" - "ld1 { v5.8h }, [x16]\n" - "fmla v30.8h, v3.8h, v6.8h\n" - "fmla v29.8h, v3.8h, v9.8h\n" - "fmla v28.8h, v3.8h, v13.8h\n" - "ldr q3, [x3, #0x80]\n" - "fmla v31.8h, v4.8h, v6.8h\n" - "ldr q6, [x16, x4]\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "ldr q10, [x16, x13]\n" - "fmla v29.8h, v4.8h, v13.8h\n" - "fmla v28.8h, v4.8h, v8.8h\n" - "ldr q4, [x3, #0x90]\n" - "fmla v31.8h, v0.8h, v14.8h\n" - "ldr q14, [x16, x10]\n" - "fmla v30.8h, v0.8h, v11.8h\n" - "fmla v29.8h, v0.8h, v5.8h\n" - "fmla v28.8h, v0.8h, v6.8h\n" - "ldr q0, [x3, #0xa0]\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x16, x12]\n" - "fmla v30.8h, v1.8h, v12.8h\n" - "fmla v29.8h, v1.8h, v6.8h\n" - "fmla v28.8h, v1.8h, v10.8h\n" - "ldr q1, [x3, #0xb0]\n" - "fmla v31.8h, v2.8h, v12.8h\n" - "ldr q12, [x16, x11]\n" - "add x16, x16, #0x10\n" - "fmla v30.8h, v2.8h, v9.8h\n" - "fmla v29.8h, v2.8h, v10.8h\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "ldr q2, [x3, #0xc0]\n" - "fmla v31.8h, v3.8h, v9.8h\n" - "ld1 { v9.8h }, [x15]\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "ldr q3, [x3, #0xd0]\n" - "fmla v31.8h, v4.8h, v13.8h\n" - "ldr q13, [x15, x4]\n" - "fmla v30.8h, v4.8h, v8.8h\n" - "ldr q8, [x15, x11]\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "fmla v28.8h, v4.8h, v14.8h\n" - "ldr q4, [x3, #0xe0]\n" - "fmla v31.8h, v0.8h, v5.8h\n" - "ldr q5, [x15, x13]\n" - "fmla v30.8h, v0.8h, v6.8h\n" - "fmla v29.8h, v0.8h, v9.8h\n" - "fmla v28.8h, v0.8h, v13.8h\n" - "ldr q0, [x3, #0xf0]\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "ldr q6, [x15, x12]\n" - "fmla v30.8h, v1.8h, v10.8h\n" + "fmla v30.8h, v2.8h, v13.8h\n" + "fmla v31.8h, v2.8h, v5.8h\n" + "ldr q2, [x17, #0x20]\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "ldr q11, [x16, x3]\n" + "fmla v30.8h, v3.8h, v5.8h\n" + "fmla v31.8h, v3.8h, v6.8h\n" + "ldr q3, [x17, #0x30]\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v9.8h\n" + "ldr q12, [x16, x7]\n" + "ldr q9, [x16, x14]\n" + "fmla v30.8h, v4.8h, v6.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "ldr q4, [x17, #0x40]\n" + "fmla v28.8h, v0.8h, v7.8h\n" + "fmla v29.8h, v0.8h, v8.8h\n" + "fmla v30.8h, v0.8h, v14.8h\n" + "fmla v31.8h, v0.8h, v11.8h\n" + "ldr q0, [x17, #0x50]\n" + "fmla v28.8h, v1.8h, v8.8h\n" "fmla v29.8h, v1.8h, v13.8h\n" - "fmla v28.8h, v1.8h, v5.8h\n" - "ldr q1, [x3, #0x100]\n" - "fmla v31.8h, v2.8h, v10.8h\n" - "ldr q10, [x15, x10]\n" - "add x15, x15, #0x10\n" - "fmla v30.8h, v2.8h, v11.8h\n" + "ldr q8, [x16, x10]\n" + "fmla v30.8h, v1.8h, v11.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "ldr q1, [x17, #0x60]\n" + "fmla v28.8h, v2.8h, v13.8h\n" "fmla v29.8h, v2.8h, v5.8h\n" - "fmla v28.8h, v2.8h, v6.8h\n" - "ldr q2, [x3, #0x110]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ld1 { v11.8h }, [x14]\n" - "fmla v30.8h, v3.8h, v12.8h\n" + "ldr q13, [x16, x12]\n" + "add x16, x16, #0x10\n" + "fmla v30.8h, v2.8h, v12.8h\n" + "fmla v31.8h, v2.8h, v9.8h\n" + "ldr q2, [x17, #0x70]\n" + "fmla v28.8h, v3.8h, v5.8h\n" "fmla v29.8h, v3.8h, v6.8h\n" - "fmla v28.8h, v3.8h, v8.8h\n" - "ldr q3, [x3, #0x120]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "ldr q12, [x14, x4]\n" - "fmla v30.8h, v4.8h, v14.8h\n" - "fmla v29.8h, v4.8h, v8.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "ldr q4, [x3, #0x130]\n" - "add x3, x3, #0x140\n" - "fmla v31.8h, v0.8h, v9.8h\n" - "ldr q9, [x14, x13]\n" - "fmla v30.8h, v0.8h, v13.8h\n" + "ld1 { v5.8h }, [x15]\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "ldr q3, [x17, #0x80]\n" + "fmla v28.8h, v4.8h, v6.8h\n" + "fmla v29.8h, v4.8h, v10.8h\n" + "ldr q6, [x15, x3]\n" + "ldr q10, [x15, x7]\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "fmla v31.8h, v4.8h, v8.8h\n" + "ldr q4, [x17, #0x90]\n" + "fmla v28.8h, v0.8h, v14.8h\n" "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x14, x12]\n" - "fmla v28.8h, v0.8h, v12.8h\n" - "fmla v31.8h, v1.8h, v13.8h\n" - "fmla v30.8h, v1.8h, v5.8h\n" + "ldr q14, [x15, x10]\n" + "fmla v30.8h, v0.8h, v5.8h\n" + "fmla v31.8h, v0.8h, v6.8h\n" + "ldr q0, [x17, #0xa0]\n" + "fmla v28.8h, v1.8h, v11.8h\n" "fmla v29.8h, v1.8h, v12.8h\n" - "ldr q12, [x14, x11]\n" - "fmla v28.8h, v1.8h, v9.8h\n" - "fmla v31.8h, v2.8h, v5.8h\n" - "fmla v30.8h, v2.8h, v6.8h\n" + "ldr q11, [x15, x14]\n" + "fmla v30.8h, v1.8h, v6.8h\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "ldr q1, [x17, #0xb0]\n" + "fmla v28.8h, v2.8h, v12.8h\n" "fmla v29.8h, v2.8h, v9.8h\n" - "ldr q9, [x14, x10]\n" - "add x14, x14, #0x10\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "fmla v31.8h, v3.8h, v6.8h\n" - "fmla v30.8h, v3.8h, v8.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "fmla v31.8h, v4.8h, v8.8h\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "fmla v28.8h, v4.8h, v9.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "st1 { v31.8h }, [x7]\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "str q30, [x7, x6]\n" + "ldr q12, [x15, x12]\n" + "add x15, x15, #0x10\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "ldr q2, [x17, #0xc0]\n" + "fmla v28.8h, v3.8h, v9.8h\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "ld1 { v9.8h }, [x13]\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "ldr q3, [x17, #0xd0]\n" + "fmla v28.8h, v4.8h, v13.8h\n" + "fmla v29.8h, v4.8h, v8.8h\n" + "ldr q13, [x13, x3]\n" + "ldr q8, [x13, x12]\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "fmla v31.8h, v4.8h, v14.8h\n" + "ldr q4, [x17, #0xe0]\n" + "fmla v28.8h, v0.8h, v5.8h\n" + "fmla v29.8h, v0.8h, v6.8h\n" + "ldr q5, [x13, x7]\n" + "fmla v30.8h, v0.8h, v9.8h\n" + "fmla v31.8h, v0.8h, v13.8h\n" + "ldr q0, [x17, #0xf0]\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "fmla v29.8h, v1.8h, v10.8h\n" + "ldr q6, [x13, x14]\n" + "fmla v30.8h, v1.8h, v13.8h\n" + "fmla v31.8h, v1.8h, v5.8h\n" + "ldr q1, [x17, #0x100]\n" + "fmla v28.8h, v2.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "ldr q10, [x13, x10]\n" + "add x13, x13, #0x10\n" + "fmla v30.8h, v2.8h, v5.8h\n" + "fmla v31.8h, v2.8h, v6.8h\n" + "ldr q2, [x17, #0x110]\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "ld1 { v11.8h }, [x11]\n" + "fmla v30.8h, v3.8h, v6.8h\n" + "fmla v31.8h, v3.8h, v8.8h\n" + "ldr q3, [x17, #0x120]\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v14.8h\n" + "ldr q12, [x11, x3]\n" + "fmla v30.8h, v4.8h, v8.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "ldr q4, [x17, #0x130]\n" + "add x17, x17, #0x140\n" + "fmla v28.8h, v0.8h, v9.8h\n" + "fmla v29.8h, v0.8h, v13.8h\n" + "ldr q9, [x11, x7]\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "fmla v31.8h, v0.8h, v12.8h\n" + "ldr q11, [x11, x14]\n" + "fmla v28.8h, v1.8h, v13.8h\n" + "fmla v29.8h, v1.8h, v5.8h\n" + "fmla v30.8h, v1.8h, v12.8h\n" + "fmla v31.8h, v1.8h, v9.8h\n" + "ldr q12, [x11, x12]\n" + "fmla v28.8h, v2.8h, v5.8h\n" + "fmla v29.8h, v2.8h, v6.8h\n" + "fmla v30.8h, v2.8h, v9.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "ldr q9, [x11, x10]\n" + "add x11, x11, #0x10\n" + "fmla v28.8h, v3.8h, v6.8h\n" + "fmla v29.8h, v3.8h, v8.8h\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "fmla v28.8h, v4.8h, v8.8h\n" + "fmla v29.8h, v4.8h, v10.8h\n" "fmax v28.8h, v28.8h, v18.8h\n" - "add x7, x7, #0x10\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "fmla v31.8h, v4.8h, v9.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" "fmin v28.8h, v28.8h, v17.8h\n" - "st1 { v29.8h }, [x9]\n" - "str q28, [x9, x6]\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "st1 { v28.8h }, [x6]\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "str q29, [x6, x4]\n" + "add x6, x6, #0x10\n" + "st1 { v30.8h }, [x9]\n" + "str q31, [x9, x4]\n" "add x9, x9, #0x10\n" "4:" // Tile loop: Oddments - "tst %x[n_channels], #0x1\n" - "beq 61f\n" - "ldr q16, [x3, #0x0]\n" - "ldr q0, [x3, #0x10]\n" + "tst %x[n_channels], #0x7\n" + "beq 117f\n" + "ldr q16, [x17, #0x0]\n" + "ldr q0, [x17, #0x10]\n" + "ldr q1, [x17, #0x20]\n" + "ldr q2, [x17, #0x30]\n" "add x28, x5, XZR\n" - "ldr q1, [x3, #0x20]\n" - "add x27, x5, x4\n" - "ldr q2, [x3, #0x30]\n" + "add x27, x5, x3\n" + "ldr q3, [x17, #0x40]\n" + "ldr q4, [x17, #0x50]\n" "add x26, x8, XZR\n" - "ldr q3, [x3, #0x40]\n" - "add x25, x8, x4\n" - "ldr q4, [x3, #0x50]\n" - "add x24, x5, x13\n" - "add x23, x8, x13\n" - "add x22, x5, x12\n" - "add x21, x5, x11\n" + "add x25, x8, x3\n" + "add x24, x5, x7\n" + "add x23, x8, x7\n" + "add x22, x5, x14\n" + "add x21, x5, x12\n" "add x20, x8, x10\n" - "add x19, x17, XZR\n" - "add x3, x3, #0x60\n" + "add x19, x16, XZR\n" + "add x17, x17, #0x60\n" + "tbz %x[n_channels], #2, 6f\n" + "ldr d5, [x28], #0x8\n" + "ldr d6, [x27], #0x8\n" + "ldr d7, [x26], #0x8\n" + "ldr d8, [x25], #0x8\n" + "ldr d9, [x24], #0x8\n" + "ldr d13, [x23], #0x8\n" + "ldr d11, [x22], #0x8\n" + "ldr d12, [x21], #0x8\n" + "ldr d10, [x20], #0x8\n" + "ldr d14, [x19], #0x8\n" "tbz %x[n_channels], #1, 5f\n" + "ld1 { v5.s }[2], [x28], #0x4\n" + "ld1 { v6.s }[2], [x27], #0x4\n" + "ld1 { v7.s }[2], [x26], #0x4\n" + "ld1 { v8.s }[2], [x25], #0x4\n" + "ld1 { v9.s }[2], [x24], #0x4\n" + "ld1 { v13.s }[2], [x23], #0x4\n" + "ld1 { v11.s }[2], [x22], #0x4\n" + "ld1 { v12.s }[2], [x21], #0x4\n" + "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v14.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 8f\n" + "ld1 { v5.h }[6], [x28]\n" + "ld1 { v6.h }[6], [x27]\n" + "ld1 { v7.h }[6], [x26]\n" + "ld1 { v8.h }[6], [x25]\n" + "ld1 { v9.h }[6], [x24]\n" + "ld1 { v13.h }[6], [x23]\n" + "ld1 { v11.h }[6], [x22]\n" + "ld1 { v12.h }[6], [x21]\n" + "ld1 { v10.h }[6], [x20]\n" + "ld1 { v14.h }[6], [x19]\n" + "b 8f\n" + "5:" // Tile loop: Oddments: Load inputs: (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 8f\n" + "ld1 { v5.h }[4], [x28]\n" + "ld1 { v6.h }[4], [x27]\n" + "ld1 { v7.h }[4], [x26]\n" + "ld1 { v8.h }[4], [x25]\n" + "ld1 { v9.h }[4], [x24]\n" + "ld1 { v13.h }[4], [x23]\n" + "ld1 { v11.h }[4], [x22]\n" + "ld1 { v12.h }[4], [x21]\n" + "ld1 { v10.h }[4], [x20]\n" + "ld1 { v14.h }[4], [x19]\n" + "b 8f\n" + "6:" // Tile loop: Oddments: Load inputs: (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 7f\n" "ldr s5, [x28], #0x4\n" "ldr s6, [x27], #0x4\n" "ldr s7, [x26], #0x4\n" @@ -537,7 +585,7 @@ void a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "ldr s12, [x21], #0x4\n" "ldr s10, [x20], #0x4\n" "ldr s14, [x19], #0x4\n" - "tbz %x[n_channels], #0, 6f\n" + "tbz %x[n_channels], #0, 8f\n" "ld1 { v5.h }[2], [x28]\n" "ld1 { v6.h }[2], [x27]\n" "ld1 { v7.h }[2], [x26]\n" @@ -548,8 +596,8 @@ void a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "ld1 { v12.h }[2], [x21]\n" "ld1 { v10.h }[2], [x20]\n" "ld1 { v14.h }[2], [x19]\n" - "b 6f\n" - "5:" // Tile loop: Oddments: Load inputs: (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 1: Unset + "b 8f\n" + "7:" // Tile loop: Oddments: Load inputs: (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 2: Unset: Bit 1: Unset "ldr h5, [x28, #0x0]\n" "ldr h6, [x27, #0x0]\n" "ldr h7, [x26, #0x0]\n" @@ -560,406 +608,773 @@ void a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "ldr h12, [x21, #0x0]\n" "ldr h10, [x20, #0x0]\n" "ldr h14, [x19, #0x0]\n" - "6:" // Tile loop: Oddments: Load inputs: (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 1: End - "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v5.8h\n" - "add x19, x8, x12\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v6.8h\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v7.8h\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v8.8h\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "fmla v29.8h, v1.8h, v8.8h\n" - "fmla v28.8h, v1.8h, v13.8h\n" - "fmla v31.8h, v2.8h, v9.8h\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v13.8h\n" - "tbz %x[n_channels], #1, 7f\n" + "8:" // Tile loop: Oddments: Load inputs: (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 2: End + "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v5.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v6.8h\n" + "add x19, x8, x14\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v7.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v8.8h\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "fmla v30.8h, v1.8h, v8.8h\n" + "fmla v31.8h, v1.8h, v13.8h\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "fmla v30.8h, v2.8h, v13.8h\n" + "tbz %x[n_channels], #2, 10f\n" + "ldr d5, [x19], #0x8\n" + "tbz %x[n_channels], #1, 9f\n" + "ld1 { v5.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 12f\n" + "ld1 { v5.h }[6], [x19]\n" + "b 12f\n" + "9:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 12f\n" + "ld1 { v5.h }[4], [x19]\n" + "b 12f\n" + "10:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 11f\n" "ldr s5, [x19], #0x4\n" - "tbz %x[n_channels], #0, 8f\n" + "tbz %x[n_channels], #0, 12f\n" "ld1 { v5.h }[2], [x19]\n" - "b 8f\n" - "7:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: Unset + "b 12f\n" + "11:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: Unset: Bit 1: Unset "ldr h5, [x19, #0x0]\n" - "8:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: End - "fmla v28.8h, v2.8h, v5.8h\n" - "add x19, x8, x11\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v29.8h, v3.8h, v5.8h\n" - "tbz %x[n_channels], #1, 9f\n" + "12:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 2: End + "fmla v31.8h, v2.8h, v5.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "add x19, x8, x12\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "fmla v30.8h, v3.8h, v5.8h\n" + "tbz %x[n_channels], #2, 14f\n" + "ldr d6, [x19], #0x8\n" + "tbz %x[n_channels], #1, 13f\n" + "ld1 { v6.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 16f\n" + "ld1 { v6.h }[6], [x19]\n" + "b 16f\n" + "13:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 16f\n" + "ld1 { v6.h }[4], [x19]\n" + "b 16f\n" + "14:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 15f\n" "ldr s6, [x19], #0x4\n" - "tbz %x[n_channels], #0, 10f\n" + "tbz %x[n_channels], #0, 16f\n" "ld1 { v6.h }[2], [x19]\n" - "b 10f\n" - "9:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 1: Unset + "b 16f\n" + "15:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: Unset: Bit 1: Unset "ldr h6, [x19, #0x0]\n" - "10:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 1: End - "fmla v28.8h, v3.8h, v6.8h\n" + "16:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 2: End + "fmla v31.8h, v3.8h, v6.8h\n" + "fmla v28.8h, v4.8h, v12.8h\n" "add x19, x5, x10\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "tbz %x[n_channels], #1, 11f\n" + "tbz %x[n_channels], #2, 18f\n" + "ldr d9, [x19], #0x8\n" + "tbz %x[n_channels], #1, 17f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 20f\n" + "ld1 { v9.h }[6], [x19]\n" + "b 20f\n" + "17:" // Tile loop: Oddments: Load inputs: (0, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 20f\n" + "ld1 { v9.h }[4], [x19]\n" + "b 20f\n" + "18:" // Tile loop: Oddments: Load inputs: (0, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 19f\n" "ldr s9, [x19], #0x4\n" - "tbz %x[n_channels], #0, 12f\n" + "tbz %x[n_channels], #0, 20f\n" "ld1 { v9.h }[2], [x19]\n" - "b 12f\n" - "11:" // Tile loop: Oddments: Load inputs: (0, 5): Bit 1: Unset + "b 20f\n" + "19:" // Tile loop: Oddments: Load inputs: (0, 5): Bit 2: Unset: Bit 1: Unset "ldr h9, [x19, #0x0]\n" - "12:" // Tile loop: Oddments: Load inputs: (0, 5): Bit 1: End - "fmla v30.8h, v4.8h, v9.8h\n" - "ldr h0, [x3, #0xc]\n" - "add x19, x17, x4\n" - "fmla v29.8h, v4.8h, v6.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "fmla v31.8h, v0.8h, v7.8h\n" - "fmla v30.8h, v0.8h, v8.8h\n" - "fmla v29.8h, v0.8h, v14.8h\n" - "tbz %x[n_channels], #1, 13f\n" + "20:" // Tile loop: Oddments: Load inputs: (0, 5): Bit 2: End + "fmla v29.8h, v4.8h, v9.8h\n" + "fmla v30.8h, v4.8h, v6.8h\n" + "ldr q0, [x17, #0x0]\n" + "add x19, x16, x3\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "fmla v28.8h, v0.8h, v7.8h\n" + "add x17, x17, #0x10\n" + "fmla v29.8h, v0.8h, v8.8h\n" + "fmla v30.8h, v0.8h, v14.8h\n" + "tbz %x[n_channels], #2, 22f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 21f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 24f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 24f\n" + "21:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 24f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 24f\n" + "22:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 23f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 14f\n" + "tbz %x[n_channels], #0, 24f\n" "ld1 { v11.h }[2], [x19]\n" - "b 14f\n" - "13:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 1: Unset + "b 24f\n" + "23:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "14:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 1: End - "fmla v28.8h, v0.8h, v11.8h\n" - "ldr h1, [x3, #0xe]\n" - "add x19, x17, x13\n" - "fmla v31.8h, v1.8h, v8.8h\n" - "fmla v30.8h, v1.8h, v13.8h\n" - "fmla v29.8h, v1.8h, v11.8h\n" - "tbz %x[n_channels], #1, 15f\n" + "24:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 2: End + "ldr q1, [x17, #0x0]\n" + "fmla v31.8h, v0.8h, v11.8h\n" + "fmla v28.8h, v1.8h, v8.8h\n" + "add x19, x16, x7\n" + "fmla v29.8h, v1.8h, v13.8h\n" + "fmla v30.8h, v1.8h, v11.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 26f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 25f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 28f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 28f\n" + "25:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 28f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 28f\n" + "26:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 27f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 16f\n" + "tbz %x[n_channels], #0, 28f\n" "ld1 { v12.h }[2], [x19]\n" - "b 16f\n" - "15:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 1: Unset + "b 28f\n" + "27:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "16:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 1: End - "fmla v28.8h, v1.8h, v12.8h\n" - "ldr h2, [x3, #0x10]\n" - "add x19, x17, x12\n" - "fmla v31.8h, v2.8h, v13.8h\n" - "fmla v30.8h, v2.8h, v5.8h\n" - "fmla v29.8h, v2.8h, v12.8h\n" - "tbz %x[n_channels], #1, 17f\n" + "28:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 2: End + "ldr q2, [x17, #0x0]\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "fmla v28.8h, v2.8h, v13.8h\n" + "add x19, x16, x14\n" + "fmla v29.8h, v2.8h, v5.8h\n" + "fmla v30.8h, v2.8h, v12.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 30f\n" + "ldr d9, [x19], #0x8\n" + "tbz %x[n_channels], #1, 29f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 32f\n" + "ld1 { v9.h }[6], [x19]\n" + "b 32f\n" + "29:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 32f\n" + "ld1 { v9.h }[4], [x19]\n" + "b 32f\n" + "30:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 31f\n" "ldr s9, [x19], #0x4\n" - "tbz %x[n_channels], #0, 18f\n" + "tbz %x[n_channels], #0, 32f\n" "ld1 { v9.h }[2], [x19]\n" - "b 18f\n" - "17:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 1: Unset + "b 32f\n" + "31:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: Unset: Bit 1: Unset "ldr h9, [x19, #0x0]\n" - "18:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 1: End - "fmla v28.8h, v2.8h, v9.8h\n" - "ldr h3, [x3, #0x12]\n" - "add x19, x17, x11\n" - "fmla v31.8h, v3.8h, v5.8h\n" - "fmla v30.8h, v3.8h, v6.8h\n" - "fmla v29.8h, v3.8h, v9.8h\n" - "tbz %x[n_channels], #1, 19f\n" + "32:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 2: End + "ldr q3, [x17, #0x0]\n" + "fmla v31.8h, v2.8h, v9.8h\n" + "fmla v28.8h, v3.8h, v5.8h\n" + "add x19, x16, x12\n" + "fmla v29.8h, v3.8h, v6.8h\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 34f\n" + "ldr d13, [x19], #0x8\n" + "tbz %x[n_channels], #1, 33f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 36f\n" + "ld1 { v13.h }[6], [x19]\n" + "b 36f\n" + "33:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 36f\n" + "ld1 { v13.h }[4], [x19]\n" + "b 36f\n" + "34:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 35f\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 20f\n" + "tbz %x[n_channels], #0, 36f\n" "ld1 { v13.h }[2], [x19]\n" - "b 20f\n" - "19:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 1: Unset + "b 36f\n" + "35:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: Unset: Bit 1: Unset "ldr h13, [x19, #0x0]\n" - "20:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 1: End - "fmla v28.8h, v3.8h, v13.8h\n" - "ldr h4, [x3, #0x14]\n" - "add x19, x17, x10\n" - "fmla v31.8h, v4.8h, v6.8h\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v4.8h, v13.8h\n" - "tbz %x[n_channels], #1, 21f\n" + "36:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 2: End + "ldr q4, [x17, #0x0]\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "fmla v28.8h, v4.8h, v6.8h\n" + "add x19, x16, x10\n" + "fmla v29.8h, v4.8h, v10.8h\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 38f\n" + "ldr d8, [x19], #0x8\n" + "tbz %x[n_channels], #1, 37f\n" + "ld1 { v8.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 40f\n" + "ld1 { v8.h }[6], [x19]\n" + "b 40f\n" + "37:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 40f\n" + "ld1 { v8.h }[4], [x19]\n" + "b 40f\n" + "38:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 39f\n" "ldr s8, [x19], #0x4\n" - "tbz %x[n_channels], #0, 22f\n" + "tbz %x[n_channels], #0, 40f\n" "ld1 { v8.h }[2], [x19]\n" - "b 22f\n" - "21:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 1: Unset + "b 40f\n" + "39:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: Unset: Bit 1: Unset "ldr h8, [x19, #0x0]\n" - "22:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 1: End - "fmla v28.8h, v4.8h, v8.8h\n" - "ldr h0, [x3, #0x16]\n" - "add x19, x16, XZR\n" - "fmla v31.8h, v0.8h, v14.8h\n" - "fmla v30.8h, v0.8h, v11.8h\n" - "tbz %x[n_channels], #1, 23f\n" + "40:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 2: End + "ldr q0, [x17, #0x0]\n" + "fmla v31.8h, v4.8h, v8.8h\n" + "fmla v28.8h, v0.8h, v14.8h\n" + "add x19, x15, XZR\n" + "fmla v29.8h, v0.8h, v11.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 42f\n" + "ldr d5, [x19], #0x8\n" + "tbz %x[n_channels], #1, 41f\n" + "ld1 { v5.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 44f\n" + "ld1 { v5.h }[6], [x19]\n" + "b 44f\n" + "41:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 44f\n" + "ld1 { v5.h }[4], [x19]\n" + "b 44f\n" + "42:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 43f\n" "ldr s5, [x19], #0x4\n" - "tbz %x[n_channels], #0, 24f\n" + "tbz %x[n_channels], #0, 44f\n" "ld1 { v5.h }[2], [x19]\n" - "b 24f\n" - "23:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: Unset + "b 44f\n" + "43:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: Unset: Bit 1: Unset "ldr h5, [x19, #0x0]\n" - "24:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: End - "fmla v29.8h, v0.8h, v5.8h\n" - "add x19, x16, x4\n" - "tbz %x[n_channels], #1, 25f\n" + "44:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 2: End + "fmla v30.8h, v0.8h, v5.8h\n" + "add x19, x15, x3\n" + "tbz %x[n_channels], #2, 46f\n" + "ldr d6, [x19], #0x8\n" + "tbz %x[n_channels], #1, 45f\n" + "ld1 { v6.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 48f\n" + "ld1 { v6.h }[6], [x19]\n" + "b 48f\n" + "45:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 48f\n" + "ld1 { v6.h }[4], [x19]\n" + "b 48f\n" + "46:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 47f\n" "ldr s6, [x19], #0x4\n" - "tbz %x[n_channels], #0, 26f\n" + "tbz %x[n_channels], #0, 48f\n" "ld1 { v6.h }[2], [x19]\n" - "b 26f\n" - "25:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: Unset + "b 48f\n" + "47:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: Unset: Bit 1: Unset "ldr h6, [x19, #0x0]\n" - "26:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: End - "fmla v28.8h, v0.8h, v6.8h\n" - "ldr h1, [x3, #0x18]\n" - "add x19, x16, x13\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "fmla v30.8h, v1.8h, v12.8h\n" - "fmla v29.8h, v1.8h, v6.8h\n" - "tbz %x[n_channels], #1, 27f\n" + "48:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 2: End + "ldr q1, [x17, #0x0]\n" + "fmla v31.8h, v0.8h, v6.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" + "add x19, x15, x7\n" + "fmla v29.8h, v1.8h, v12.8h\n" + "fmla v30.8h, v1.8h, v6.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 50f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 49f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 52f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 52f\n" + "49:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 52f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 52f\n" + "50:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 51f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 28f\n" + "tbz %x[n_channels], #0, 52f\n" "ld1 { v10.h }[2], [x19]\n" - "b 28f\n" - "27:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: Unset + "b 52f\n" + "51:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "28:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: End - "fmla v28.8h, v1.8h, v10.8h\n" - "ldr h2, [x3, #0x1a]\n" - "add x19, x16, x12\n" - "fmla v31.8h, v2.8h, v12.8h\n" - "fmla v30.8h, v2.8h, v9.8h\n" - "fmla v29.8h, v2.8h, v10.8h\n" - "tbz %x[n_channels], #1, 29f\n" + "52:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 2: End + "ldr q2, [x17, #0x0]\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "fmla v28.8h, v2.8h, v12.8h\n" + "add x19, x15, x14\n" + "fmla v29.8h, v2.8h, v9.8h\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 54f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 53f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 56f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 56f\n" + "53:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 56f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 56f\n" + "54:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 55f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 30f\n" + "tbz %x[n_channels], #0, 56f\n" "ld1 { v11.h }[2], [x19]\n" - "b 30f\n" - "29:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: Unset + "b 56f\n" + "55:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "30:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: End - "fmla v28.8h, v2.8h, v11.8h\n" - "ldr h3, [x3, #0x1c]\n" - "add x19, x16, x11\n" - "fmla v31.8h, v3.8h, v9.8h\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" - "tbz %x[n_channels], #1, 31f\n" + "56:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 2: End + "ldr q3, [x17, #0x0]\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v9.8h\n" + "add x19, x15, x12\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 58f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 57f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 60f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 60f\n" + "57:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 60f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 60f\n" + "58:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 59f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 32f\n" + "tbz %x[n_channels], #0, 60f\n" "ld1 { v12.h }[2], [x19]\n" - "b 32f\n" - "31:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 1: Unset + "b 60f\n" + "59:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "32:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 1: End - "fmla v28.8h, v3.8h, v12.8h\n" - "ldr h4, [x3, #0x1e]\n" - "add x19, x16, x10\n" - "fmla v31.8h, v4.8h, v13.8h\n" - "fmla v30.8h, v4.8h, v8.8h\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "tbz %x[n_channels], #1, 33f\n" + "60:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 2: End + "ldr q4, [x17, #0x0]\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "fmla v28.8h, v4.8h, v13.8h\n" + "add x19, x15, x10\n" + "fmla v29.8h, v4.8h, v8.8h\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 62f\n" + "ldr d14, [x19], #0x8\n" + "tbz %x[n_channels], #1, 61f\n" + "ld1 { v14.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 64f\n" + "ld1 { v14.h }[6], [x19]\n" + "b 64f\n" + "61:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 64f\n" + "ld1 { v14.h }[4], [x19]\n" + "b 64f\n" + "62:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 63f\n" "ldr s14, [x19], #0x4\n" - "tbz %x[n_channels], #0, 34f\n" + "tbz %x[n_channels], #0, 64f\n" "ld1 { v14.h }[2], [x19]\n" - "b 34f\n" - "33:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 1: Unset + "b 64f\n" + "63:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: Unset: Bit 1: Unset "ldr h14, [x19, #0x0]\n" - "34:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 1: End - "fmla v28.8h, v4.8h, v14.8h\n" - "ldr h0, [x3, #0x20]\n" - "add x19, x15, XZR\n" - "fmla v31.8h, v0.8h, v5.8h\n" - "fmla v30.8h, v0.8h, v6.8h\n" - "tbz %x[n_channels], #1, 35f\n" + "64:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 2: End + "ldr q0, [x17, #0x0]\n" + "fmla v31.8h, v4.8h, v14.8h\n" + "fmla v28.8h, v0.8h, v5.8h\n" + "add x19, x13, XZR\n" + "fmla v29.8h, v0.8h, v6.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 66f\n" + "ldr d9, [x19], #0x8\n" + "tbz %x[n_channels], #1, 65f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 68f\n" + "ld1 { v9.h }[6], [x19]\n" + "b 68f\n" + "65:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 68f\n" + "ld1 { v9.h }[4], [x19]\n" + "b 68f\n" + "66:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 67f\n" "ldr s9, [x19], #0x4\n" - "tbz %x[n_channels], #0, 36f\n" + "tbz %x[n_channels], #0, 68f\n" "ld1 { v9.h }[2], [x19]\n" - "b 36f\n" - "35:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 1: Unset + "b 68f\n" + "67:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: Unset: Bit 1: Unset "ldr h9, [x19, #0x0]\n" - "36:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 1: End - "fmla v29.8h, v0.8h, v9.8h\n" - "add x19, x15, x4\n" - "tbz %x[n_channels], #1, 37f\n" + "68:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 2: End + "fmla v30.8h, v0.8h, v9.8h\n" + "add x19, x13, x3\n" + "tbz %x[n_channels], #2, 70f\n" + "ldr d13, [x19], #0x8\n" + "tbz %x[n_channels], #1, 69f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 72f\n" + "ld1 { v13.h }[6], [x19]\n" + "b 72f\n" + "69:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 72f\n" + "ld1 { v13.h }[4], [x19]\n" + "b 72f\n" + "70:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 71f\n" "ldr s13, [x19], #0x4\n" - "tbz %x[n_channels], #0, 38f\n" + "tbz %x[n_channels], #0, 72f\n" "ld1 { v13.h }[2], [x19]\n" - "b 38f\n" - "37:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 1: Unset + "b 72f\n" + "71:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: Unset: Bit 1: Unset "ldr h13, [x19, #0x0]\n" - "38:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 1: End - "fmla v28.8h, v0.8h, v13.8h\n" - "ldr h1, [x3, #0x22]\n" - "add x19, x15, x13\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "fmla v30.8h, v1.8h, v10.8h\n" - "fmla v29.8h, v1.8h, v13.8h\n" - "tbz %x[n_channels], #1, 39f\n" + "72:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 2: End + "ldr q1, [x17, #0x0]\n" + "fmla v31.8h, v0.8h, v13.8h\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "add x19, x13, x7\n" + "fmla v29.8h, v1.8h, v10.8h\n" + "fmla v30.8h, v1.8h, v13.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 74f\n" + "ldr d5, [x19], #0x8\n" + "tbz %x[n_channels], #1, 73f\n" + "ld1 { v5.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 76f\n" + "ld1 { v5.h }[6], [x19]\n" + "b 76f\n" + "73:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 76f\n" + "ld1 { v5.h }[4], [x19]\n" + "b 76f\n" + "74:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 75f\n" "ldr s5, [x19], #0x4\n" - "tbz %x[n_channels], #0, 40f\n" + "tbz %x[n_channels], #0, 76f\n" "ld1 { v5.h }[2], [x19]\n" - "b 40f\n" - "39:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 1: Unset + "b 76f\n" + "75:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: Unset: Bit 1: Unset "ldr h5, [x19, #0x0]\n" - "40:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 1: End - "fmla v28.8h, v1.8h, v5.8h\n" - "ldr h2, [x3, #0x24]\n" - "add x19, x15, x12\n" - "fmla v31.8h, v2.8h, v10.8h\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v5.8h\n" - "tbz %x[n_channels], #1, 41f\n" + "76:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 2: End + "ldr q2, [x17, #0x0]\n" + "fmla v31.8h, v1.8h, v5.8h\n" + "fmla v28.8h, v2.8h, v10.8h\n" + "add x19, x13, x14\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "fmla v30.8h, v2.8h, v5.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 78f\n" + "ldr d6, [x19], #0x8\n" + "tbz %x[n_channels], #1, 77f\n" + "ld1 { v6.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 80f\n" + "ld1 { v6.h }[6], [x19]\n" + "b 80f\n" + "77:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 80f\n" + "ld1 { v6.h }[4], [x19]\n" + "b 80f\n" + "78:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 79f\n" "ldr s6, [x19], #0x4\n" - "tbz %x[n_channels], #0, 42f\n" + "tbz %x[n_channels], #0, 80f\n" "ld1 { v6.h }[2], [x19]\n" - "b 42f\n" - "41:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 1: Unset + "b 80f\n" + "79:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: Unset: Bit 1: Unset "ldr h6, [x19, #0x0]\n" - "42:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 1: End - "fmla v28.8h, v2.8h, v6.8h\n" - "ldr h3, [x3, #0x26]\n" - "add x19, x15, x11\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v29.8h, v3.8h, v6.8h\n" - "tbz %x[n_channels], #1, 43f\n" + "80:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 2: End + "ldr q3, [x17, #0x0]\n" + "fmla v31.8h, v2.8h, v6.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "add x19, x13, x12\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "fmla v30.8h, v3.8h, v6.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 82f\n" + "ldr d8, [x19], #0x8\n" + "tbz %x[n_channels], #1, 81f\n" + "ld1 { v8.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 84f\n" + "ld1 { v8.h }[6], [x19]\n" + "b 84f\n" + "81:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 84f\n" + "ld1 { v8.h }[4], [x19]\n" + "b 84f\n" + "82:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 83f\n" "ldr s8, [x19], #0x4\n" - "tbz %x[n_channels], #0, 44f\n" + "tbz %x[n_channels], #0, 84f\n" "ld1 { v8.h }[2], [x19]\n" - "b 44f\n" - "43:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 1: Unset + "b 84f\n" + "83:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: Unset: Bit 1: Unset "ldr h8, [x19, #0x0]\n" - "44:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 1: End - "fmla v28.8h, v3.8h, v8.8h\n" - "ldr h4, [x3, #0x28]\n" - "add x19, x15, x10\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "fmla v30.8h, v4.8h, v14.8h\n" - "fmla v29.8h, v4.8h, v8.8h\n" - "tbz %x[n_channels], #1, 45f\n" + "84:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 2: End + "ldr q4, [x17, #0x0]\n" + "fmla v31.8h, v3.8h, v8.8h\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "add x19, x13, x10\n" + "fmla v29.8h, v4.8h, v14.8h\n" + "fmla v30.8h, v4.8h, v8.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 86f\n" + "ldr d10, [x19], #0x8\n" + "tbz %x[n_channels], #1, 85f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 88f\n" + "ld1 { v10.h }[6], [x19]\n" + "b 88f\n" + "85:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 88f\n" + "ld1 { v10.h }[4], [x19]\n" + "b 88f\n" + "86:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 87f\n" "ldr s10, [x19], #0x4\n" - "tbz %x[n_channels], #0, 46f\n" + "tbz %x[n_channels], #0, 88f\n" "ld1 { v10.h }[2], [x19]\n" - "b 46f\n" - "45:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 1: Unset + "b 88f\n" + "87:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: Unset: Bit 1: Unset "ldr h10, [x19, #0x0]\n" - "46:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 1: End - "fmla v28.8h, v4.8h, v10.8h\n" - "ldr h0, [x3, #0x2a]\n" - "add x19, x14, XZR\n" - "fmla v31.8h, v0.8h, v9.8h\n" - "fmla v30.8h, v0.8h, v13.8h\n" - "tbz %x[n_channels], #1, 47f\n" + "88:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 2: End + "ldr q0, [x17, #0x0]\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "fmla v28.8h, v0.8h, v9.8h\n" + "add x19, x11, XZR\n" + "fmla v29.8h, v0.8h, v13.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 90f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 89f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 92f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 92f\n" + "89:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 92f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 92f\n" + "90:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 91f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 48f\n" + "tbz %x[n_channels], #0, 92f\n" "ld1 { v11.h }[2], [x19]\n" - "b 48f\n" - "47:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 1: Unset + "b 92f\n" + "91:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "48:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 1: End - "fmla v29.8h, v0.8h, v11.8h\n" - "add x19, x14, x4\n" - "tbz %x[n_channels], #1, 49f\n" + "92:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 2: End + "fmla v30.8h, v0.8h, v11.8h\n" + "add x19, x11, x3\n" + "tbz %x[n_channels], #2, 94f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 93f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 96f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 96f\n" + "93:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 96f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 96f\n" + "94:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 95f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 50f\n" + "tbz %x[n_channels], #0, 96f\n" "ld1 { v12.h }[2], [x19]\n" - "b 50f\n" - "49:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 1: Unset + "b 96f\n" + "95:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "50:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 1: End - "fmla v28.8h, v0.8h, v12.8h\n" - "ldr h1, [x3, #0x2c]\n" - "add x19, x14, x13\n" - "fmla v31.8h, v1.8h, v13.8h\n" - "fmla v30.8h, v1.8h, v5.8h\n" - "fmla v29.8h, v1.8h, v12.8h\n" - "tbz %x[n_channels], #1, 51f\n" + "96:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 2: End + "ldr q1, [x17, #0x0]\n" + "fmla v31.8h, v0.8h, v12.8h\n" + "fmla v28.8h, v1.8h, v13.8h\n" + "add x19, x11, x7\n" + "fmla v29.8h, v1.8h, v5.8h\n" + "fmla v30.8h, v1.8h, v12.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 98f\n" + "ldr d9, [x19], #0x8\n" + "tbz %x[n_channels], #1, 97f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 100f\n" + "ld1 { v9.h }[6], [x19]\n" + "b 100f\n" + "97:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 100f\n" + "ld1 { v9.h }[4], [x19]\n" + "b 100f\n" + "98:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 99f\n" "ldr s9, [x19], #0x4\n" - "tbz %x[n_channels], #0, 52f\n" + "tbz %x[n_channels], #0, 100f\n" "ld1 { v9.h }[2], [x19]\n" - "b 52f\n" - "51:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 1: Unset + "b 100f\n" + "99:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: Unset: Bit 1: Unset "ldr h9, [x19, #0x0]\n" - "52:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 1: End - "fmla v28.8h, v1.8h, v9.8h\n" - "ldr h2, [x3, #0x2e]\n" - "add x19, x14, x12\n" - "fmla v31.8h, v2.8h, v5.8h\n" - "fmla v30.8h, v2.8h, v6.8h\n" - "fmla v29.8h, v2.8h, v9.8h\n" - "tbz %x[n_channels], #1, 53f\n" + "100:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 2: End + "ldr q2, [x17, #0x0]\n" + "fmla v31.8h, v1.8h, v9.8h\n" + "fmla v28.8h, v2.8h, v5.8h\n" + "add x19, x11, x14\n" + "fmla v29.8h, v2.8h, v6.8h\n" + "fmla v30.8h, v2.8h, v9.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 102f\n" + "ldr d11, [x19], #0x8\n" + "tbz %x[n_channels], #1, 101f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 104f\n" + "ld1 { v11.h }[6], [x19]\n" + "b 104f\n" + "101:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 104f\n" + "ld1 { v11.h }[4], [x19]\n" + "b 104f\n" + "102:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 103f\n" "ldr s11, [x19], #0x4\n" - "tbz %x[n_channels], #0, 54f\n" + "tbz %x[n_channels], #0, 104f\n" "ld1 { v11.h }[2], [x19]\n" - "b 54f\n" - "53:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 1: Unset + "b 104f\n" + "103:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: Unset: Bit 1: Unset "ldr h11, [x19, #0x0]\n" - "54:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 1: End - "fmla v28.8h, v2.8h, v11.8h\n" - "ldr h3, [x3, #0x30]\n" - "add x19, x14, x11\n" - "fmla v31.8h, v3.8h, v6.8h\n" - "fmla v30.8h, v3.8h, v8.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" - "tbz %x[n_channels], #1, 55f\n" + "104:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 2: End + "ldr q3, [x17, #0x0]\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v6.8h\n" + "add x19, x11, x12\n" + "fmla v29.8h, v3.8h, v8.8h\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "add x17, x17, #0x10\n" + "tbz %x[n_channels], #2, 106f\n" + "ldr d12, [x19], #0x8\n" + "tbz %x[n_channels], #1, 105f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 108f\n" + "ld1 { v12.h }[6], [x19]\n" + "b 108f\n" + "105:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 108f\n" + "ld1 { v12.h }[4], [x19]\n" + "b 108f\n" + "106:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 107f\n" "ldr s12, [x19], #0x4\n" - "tbz %x[n_channels], #0, 56f\n" + "tbz %x[n_channels], #0, 108f\n" "ld1 { v12.h }[2], [x19]\n" - "b 56f\n" - "55:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 1: Unset + "b 108f\n" + "107:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: Unset: Bit 1: Unset "ldr h12, [x19, #0x0]\n" - "56:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 1: End - "fmla v28.8h, v3.8h, v12.8h\n" - "ldr h4, [x3, #0x32]\n" - "add x19, x14, x10\n" - "fmla v31.8h, v4.8h, v8.8h\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "tbz %x[n_channels], #1, 57f\n" + "108:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 2: End + "ldr q4, [x17, #0x0]\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "fmla v28.8h, v4.8h, v8.8h\n" + "add x19, x11, x10\n" + "fmla v29.8h, v4.8h, v10.8h\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "tbz %x[n_channels], #2, 110f\n" + "ldr d9, [x19], #0x8\n" + "tbz %x[n_channels], #1, 109f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 112f\n" + "ld1 { v9.h }[6], [x19]\n" + "b 112f\n" + "109:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 112f\n" + "ld1 { v9.h }[4], [x19]\n" + "b 112f\n" + "110:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 111f\n" "ldr s9, [x19], #0x4\n" - "tbz %x[n_channels], #0, 58f\n" + "tbz %x[n_channels], #0, 112f\n" "ld1 { v9.h }[2], [x19]\n" - "b 58f\n" - "57:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 1: Unset + "b 112f\n" + "111:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: Unset: Bit 1: Unset "ldr h9, [x19, #0x0]\n" - "58:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 1: End - "fmla v28.8h, v4.8h, v9.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmin v29.8h, v29.8h, v17.8h\n" + "112:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 2: End + "fmla v31.8h, v4.8h, v9.8h\n" "fmax v28.8h, v28.8h, v18.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" "fmin v28.8h, v28.8h, v17.8h\n" - "tbz %x[n_channels], #1, 59f\n" - "mov x19, x7\n" - "st1 { v31.s }[0], [x19], x6\n" - "add x7, x7, #0x4\n" - "st1 { v30.s }[0], [x19]\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "tbz %x[n_channels], #2, 114f\n" + "mov x20, x6\n" + "mov x19, x9\n" + "st1 { v28.d }[0], [x20], x4\n" + "add x6, x6, #0x8\n" + "add x9, x9, #0x8\n" + "st1 { v30.d }[0], [x19], x4\n" + "st1 { v29.d }[0], [x20]\n" + "st1 { v31.d }[0], [x19]\n" + "tbz %x[n_channels], #1, 113f\n" + "mov x20, x6\n" "mov x19, x9\n" - "st1 { v29.s }[0], [x19], x6\n" + "st1 { v28.s }[2], [x20], x4\n" + "add x6, x6, #0x4\n" "add x9, x9, #0x4\n" - "st1 { v28.s }[0], [x19]\n" - "tbz %x[n_channels], #0, 60f\n" - "mov x20, x7\n" - "st1 { v31.h }[2], [x20], x6\n" + "st1 { v30.s }[2], [x19], x4\n" + "st1 { v29.s }[2], [x20]\n" + "st1 { v31.s }[2], [x19]\n" + "tbz %x[n_channels], #0, 116f\n" + "mov x20, x6\n" "mov x19, x9\n" - "st1 { v30.h }[2], [x20]\n" - "st1 { v29.h }[2], [x19], x6\n" - "st1 { v28.h }[2], [x19]\n" - "b 60f\n" - "59:" // Tile loop: Oddments: Store: Bit 1: Unset - "mov x20, x7\n" - "st1 { v31.h }[0], [x20], x6\n" + "st1 { v28.h }[6], [x20], x4\n" + "st1 { v30.h }[6], [x19], x4\n" + "st1 { v29.h }[6], [x20]\n" + "st1 { v31.h }[6], [x19]\n" + "b 116f\n" + "113:" // Tile loop: Oddments: Store: Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 116f\n" + "mov x20, x6\n" + "mov x19, x9\n" + "st1 { v28.h }[4], [x20], x4\n" + "st1 { v30.h }[4], [x19], x4\n" + "st1 { v29.h }[4], [x20]\n" + "st1 { v31.h }[4], [x19]\n" + "b 116f\n" + "114:" // Tile loop: Oddments: Store: Bit 2: Unset + "tbz %x[n_channels], #1, 115f\n" + "mov x20, x6\n" + "mov x19, x9\n" + "st1 { v28.s }[0], [x20], x4\n" + "st1 { v30.s }[0], [x19], x4\n" + "add x6, x6, #0x4\n" + "add x9, x9, #0x4\n" + "st1 { v29.s }[0], [x20]\n" + "st1 { v31.s }[0], [x19]\n" + "tbz %x[n_channels], #0, 116f\n" + "mov x20, x6\n" + "mov x19, x9\n" + "st1 { v28.h }[2], [x20], x4\n" + "st1 { v30.h }[2], [x19], x4\n" + "st1 { v29.h }[2], [x20]\n" + "st1 { v31.h }[2], [x19]\n" + "b 116f\n" + "115:" // Tile loop: Oddments: Store: Bit 2: Unset: Bit 1: Unset + "mov x20, x6\n" "mov x19, x9\n" - "st1 { v30.h }[0], [x20]\n" - "st1 { v29.h }[0], [x19], x6\n" - "st1 { v28.h }[0], [x19]\n" - "60:" // Tile loop: Oddments: Store: Bit 1: End + "st1 { v28.h }[0], [x20], x4\n" + "st1 { v30.h }[0], [x19], x4\n" + "st1 { v29.h }[0], [x20]\n" + "st1 { v31.h }[0], [x19]\n" + "116:" // Tile loop: Oddments: Store: Bit 2: End - "61:" // Tile loop: End - "ldr x28, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "add x21, x28, #0x1\n" - "ldr x27, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" - "add x27, x27, #0x1\n" + "117:" // Tile loop: End + "ldr x25, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x26, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "add x25, x25, #0x1\n" + "add x20, x26, #0x1\n" "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" - "cmp x27, x19\n" - "csel x27, x27, XZR, LT\n" - "csel x28, x28, x21, LT\n" - "cmp x28, x20\n" + "cmp x25, x19\n" + "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" + "csel x26, x26, x20, LT\n" + "csel x25, x25, XZR, LT\n" + "cmp x26, x19\n" "blt 1b\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp index 96e1ae496e..43eac0e6bc 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp @@ -99,916 +99,1323 @@ void a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst_indirect_impl( __asm__ __volatile__( "ldr x21, [%x[params_struct], %[offsetof_args_outptrs]]\n" - "add x16, %x[params_struct], %[offsetof_Args_inptrs]\n" - "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" + "mov x28, #0x10\n" // cntb _, ALL, #1 + "lsr x27, %x[n_channels], #0x3\n" + "ldr x16, [%x[params_struct], %[offsetof_args_params]]\n" "add x20, %x[params_struct], %[offsetof_args_min]\n" "add x19, %x[params_struct], %[offsetof_args_max]\n" + "ldp x15, x14, [x21, #0x0]\n" + "ldp x13, x12, [x21, #0x10]\n" + "add x11, %x[params_struct], %[offsetof_Args_inptrs]\n" "ld1r { v18.8h }, [x20]\n" "ld1r { v17.8h }, [x19]\n" - "mov x14, #0x0\n" - "ldp x13, x12, [x21, #0x0]\n" - "mov x11, #0x10\n" // cntb _, ALL, #1 - "ldp x10, x9, [x21, #0x10]\n" - "sub x28, XZR, x11\n" - "lsr x27, %x[n_channels], #0x3\n" + "mov x10, #0x0\n" + "sub x9, XZR, x28\n" "cbz x27, 3f\n" - "ldr q16, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "cmp x11, x27, LSL #4\n" - "ldr q1, [x15, #0x20]\n" - "ldr q2, [x15, #0x30]\n" - "ldr q3, [x15, #0x40]\n" - "ldr q4, [x15, #0x50]\n" - "add x15, x15, #0x60\n" - "ldp x26, x25, [x16, #0x0]\n" - "ldp x24, x23, [x16, #0x10]\n" - "ldp x22, x21, [x16, #0x20]\n" - "ldr q5, [x26, x14]\n" - "ldr q6, [x25, x14]\n" - "ldr q7, [x24, x14]\n" - "ldr q8, [x23, x14]\n" - "ldr q9, [x22, x14]\n" - "ldr q13, [x21, x14]\n" - "ldp x20, x19, [x16, #0x30]\n" - "ldp x26, x25, [x16, #0x40]\n" - "ldr q11, [x20, x14]\n" - "ldr q12, [x19, x14]\n" - "ldr q10, [x26, x14]\n" - "ldr q14, [x25, x14]\n" + "ldp x26, x25, [x11, #0x0]\n" + "ldr q5, [x26, x10]\n" + "ldr q6, [x25, x10]\n" + "ldp x24, x23, [x11, #0x10]\n" + "cmp x28, x27, LSL #4\n" + "ldp x22, x21, [x11, #0x20]\n" + "ldp x20, x19, [x11, #0x30]\n" + "ldp x26, x25, [x11, #0x40]\n" + "ldr q16, [x16, #0x0]\n" + "ldr q0, [x16, #0x10]\n" + "ldr q1, [x16, #0x20]\n" + "ldr q2, [x16, #0x30]\n" + "ldr q3, [x16, #0x40]\n" + "ldr q4, [x16, #0x50]\n" + "ldr q7, [x24, x10]\n" + "add x16, x16, #0x60\n" + "ldr q8, [x23, x10]\n" + "ldr q9, [x22, x10]\n" + "ldr q13, [x21, x10]\n" + "ldr q11, [x20, x10]\n" + "ldr q12, [x19, x10]\n" + "ldr q10, [x26, x10]\n" + "ldr q14, [x25, x10]\n" "bge 2f\n" "1:" // Channel loop - "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v5.8h\n" - "ldr x24, [x16, #0x50]\n" - "add x28, x28, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v6.8h\n" - "ldr x23, [x16, #0x58]\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v7.8h\n" - "ldr x22, [x16, #0x60]\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v8.8h\n" - "ldr q5, [x24, x14]\n" - "ldr q0, [x15, #0x0]\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "ldr q6, [x23, x14]\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "fmla v29.8h, v1.8h, v8.8h\n" - "ldr x21, [x16, #0x68]\n" - "fmla v28.8h, v1.8h, v13.8h\n" - "ldr q1, [x15, #0x10]\n" - "ldr x20, [x16, #0x70]\n" - "fmla v31.8h, v2.8h, v9.8h\n" - "ldr q9, [x22, x14]\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v13.8h\n" - "ldr x19, [x16, #0x78]\n" - "fmla v28.8h, v2.8h, v5.8h\n" - "ldr q2, [x15, #0x20]\n" - "ldr x26, [x16, #0x80]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x21, x14]\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v29.8h, v3.8h, v5.8h\n" - "ldr x25, [x16, #0x88]\n" - "fmla v28.8h, v3.8h, v6.8h\n" - "ldr q3, [x15, #0x30]\n" - "ldr x24, [x16, #0x90]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "ldr q12, [x20, x14]\n" - "fmla v30.8h, v4.8h, v9.8h\n" - "fmla v29.8h, v4.8h, v6.8h\n" - "ldr q9, [x19, x14]\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "ldr q4, [x15, #0x40]\n" - "ldr x23, [x16, #0x98]\n" - "fmla v31.8h, v0.8h, v7.8h\n" - "ldr x22, [x16, #0xa0]\n" - "fmla v30.8h, v0.8h, v8.8h\n" - "fmla v29.8h, v0.8h, v14.8h\n" - "ldr x21, [x16, #0xa8]\n" - "fmla v28.8h, v0.8h, v11.8h\n" - "ldr q0, [x15, #0x50]\n" - "ldr x20, [x16, #0xb0]\n" - "fmla v31.8h, v1.8h, v8.8h\n" - "ldr q8, [x25, x14]\n" - "fmla v30.8h, v1.8h, v13.8h\n" - "fmla v29.8h, v1.8h, v11.8h\n" - "ldr x19, [x16, #0xb8]\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "ldr q1, [x15, #0x60]\n" - "ldr x25, [x16, #0xc8]\n" - "fmla v31.8h, v2.8h, v13.8h\n" - "ldr q13, [x26, x14]\n" - "fmla v30.8h, v2.8h, v5.8h\n" - "fmla v29.8h, v2.8h, v12.8h\n" - "ldr x26, [x16, #0xc0]\n" + "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v5.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v6.8h\n" + "ldr x24, [x11, #0x50]\n" + "ldr q5, [x24, x10]\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v7.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v8.8h\n" + "ldr x23, [x11, #0x58]\n" + "ldr x22, [x11, #0x60]\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "ldr q6, [x23, x10]\n" + "ldr x21, [x11, #0x68]\n" + "fmla v30.8h, v1.8h, v8.8h\n" + "fmla v31.8h, v1.8h, v13.8h\n" + "ldr q0, [x16, #0x0]\n" + "ldr x20, [x11, #0x70]\n" "fmla v28.8h, v2.8h, v9.8h\n" - "ldr q2, [x15, #0x70]\n" - "ldr q16, [x15, #0x140]\n" - "fmla v31.8h, v3.8h, v5.8h\n" - "ldr q5, [x24, x14]\n" - "fmla v30.8h, v3.8h, v6.8h\n" - "fmla v29.8h, v3.8h, v9.8h\n" - "ldr x24, [x16, #0xd0]\n" - "fmla v28.8h, v3.8h, v13.8h\n" - "ldr q3, [x15, #0x80]\n" - "fmla v31.8h, v4.8h, v6.8h\n" - "ldr q6, [x23, x14]\n" - "ldr x23, [x16, #0xd8]\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v4.8h, v13.8h\n" - "ldr q10, [x22, x14]\n" - "fmla v28.8h, v4.8h, v8.8h\n" - "ldr q4, [x15, #0x90]\n" - "ldr x22, [x16, #0xe0]\n" - "fmla v31.8h, v0.8h, v14.8h\n" - "ldr q14, [x19, x14]\n" - "fmla v30.8h, v0.8h, v11.8h\n" - "fmla v29.8h, v0.8h, v5.8h\n" - "ldr x19, [x16, #0xf8]\n" - "fmla v28.8h, v0.8h, v6.8h\n" - "ldr q0, [x15, #0xa0]\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x21, x14]\n" - "ldr x21, [x16, #0xe8]\n" - "fmla v30.8h, v1.8h, v12.8h\n" - "fmla v29.8h, v1.8h, v6.8h\n" - "fmla v28.8h, v1.8h, v10.8h\n" - "ldr q1, [x15, #0xb0]\n" - "fmla v31.8h, v2.8h, v12.8h\n" - "ldr q12, [x20, x14]\n" - "ldr x20, [x16, #0xf0]\n" - "fmla v30.8h, v2.8h, v9.8h\n" - "fmla v29.8h, v2.8h, v10.8h\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "ldr q2, [x15, #0xc0]\n" - "fmla v31.8h, v3.8h, v9.8h\n" - "ldr q9, [x26, x14]\n" - "ldr x26, [x16, #0x100]\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "ldr q3, [x15, #0xd0]\n" - "fmla v31.8h, v4.8h, v13.8h\n" - "ldr q13, [x25, x14]\n" - "ldr x25, [x16, #0x108]\n" - "fmla v30.8h, v4.8h, v8.8h\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "ldr q8, [x22, x14]\n" - "fmla v28.8h, v4.8h, v14.8h\n" - "ldr q4, [x15, #0xe0]\n" - "fmla v31.8h, v0.8h, v5.8h\n" - "ldr q5, [x24, x14]\n" - "ldr x24, [x16, #0x110]\n" - "fmla v30.8h, v0.8h, v6.8h\n" - "fmla v29.8h, v0.8h, v9.8h\n" - "fmla v28.8h, v0.8h, v13.8h\n" - "ldr q0, [x15, #0xf0]\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "ldr q6, [x23, x14]\n" - "ldr x23, [x16, #0x118]\n" - "fmla v30.8h, v1.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "ldr q9, [x22, x10]\n" + "ldr q1, [x16, #0x10]\n" + "fmla v30.8h, v2.8h, v13.8h\n" + "fmla v31.8h, v2.8h, v5.8h\n" + "ldr x19, [x11, #0x78]\n" + "ldr q2, [x16, #0x20]\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "ldr q11, [x21, x10]\n" + "ldr x26, [x11, #0x80]\n" + "fmla v30.8h, v3.8h, v5.8h\n" + "fmla v31.8h, v3.8h, v6.8h\n" + "ldr q3, [x16, #0x30]\n" + "ldr x25, [x11, #0x88]\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v9.8h\n" + "ldr q12, [x20, x10]\n" + "ldr q9, [x19, x10]\n" + "fmla v30.8h, v4.8h, v6.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "ldr q4, [x16, #0x40]\n" + "ldr x24, [x11, #0x90]\n" + "fmla v28.8h, v0.8h, v7.8h\n" + "fmla v29.8h, v0.8h, v8.8h\n" + "ldr x23, [x11, #0x98]\n" + "ldr x22, [x11, #0xa0]\n" + "fmla v30.8h, v0.8h, v14.8h\n" + "fmla v31.8h, v0.8h, v11.8h\n" + "ldr q0, [x16, #0x50]\n" + "ldr x21, [x11, #0xa8]\n" + "fmla v28.8h, v1.8h, v8.8h\n" "fmla v29.8h, v1.8h, v13.8h\n" - "fmla v28.8h, v1.8h, v5.8h\n" - "ldr q1, [x15, #0x100]\n" - "fmla v31.8h, v2.8h, v10.8h\n" - "ldr q10, [x21, x14]\n" - "fmla v30.8h, v2.8h, v11.8h\n" + "ldr q8, [x25, x10]\n" + "ldr x20, [x11, #0xb0]\n" + "fmla v30.8h, v1.8h, v11.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "ldr q1, [x16, #0x60]\n" + "ldr x19, [x11, #0xb8]\n" + "fmla v28.8h, v2.8h, v13.8h\n" "fmla v29.8h, v2.8h, v5.8h\n" - "fmla v28.8h, v2.8h, v6.8h\n" - "ldr q2, [x15, #0x110]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x20, x14]\n" - "fmla v30.8h, v3.8h, v12.8h\n" + "ldr q13, [x26, x10]\n" + "ldr x26, [x11, #0xc0]\n" + "fmla v30.8h, v2.8h, v12.8h\n" + "fmla v31.8h, v2.8h, v9.8h\n" + "ldr q2, [x16, #0x70]\n" + "ldr x25, [x11, #0xc8]\n" + "fmla v28.8h, v3.8h, v5.8h\n" "fmla v29.8h, v3.8h, v6.8h\n" - "fmla v28.8h, v3.8h, v8.8h\n" - "ldr q3, [x15, #0x120]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "ldr q12, [x19, x14]\n" - "fmla v30.8h, v4.8h, v14.8h\n" - "fmla v29.8h, v4.8h, v8.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "ldr q4, [x15, #0x130]\n" - "fmla v31.8h, v0.8h, v9.8h\n" - "ldr q9, [x26, x14]\n" - "fmla v30.8h, v0.8h, v13.8h\n" + "ldr q5, [x24, x10]\n" + "ldr x24, [x11, #0xd0]\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "ldr q3, [x16, #0x80]\n" + "add x9, x9, #0x10\n" + "fmla v28.8h, v4.8h, v6.8h\n" + "fmla v29.8h, v4.8h, v10.8h\n" + "ldr q6, [x23, x10]\n" + "ldr q10, [x22, x10]\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "fmla v31.8h, v4.8h, v8.8h\n" + "ldr q4, [x16, #0x90]\n" + "ldr x23, [x11, #0xd8]\n" + "fmla v28.8h, v0.8h, v14.8h\n" "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x25, x14]\n" - "fmla v28.8h, v0.8h, v12.8h\n" - "ldp x26, x25, [x16, #0x0]\n" - "ldr q0, [x15, #0x150]\n" - "fmla v31.8h, v1.8h, v13.8h\n" - "fmla v30.8h, v1.8h, v5.8h\n" + "ldr q14, [x19, x10]\n" + "ldr x22, [x11, #0xe0]\n" + "fmla v30.8h, v0.8h, v5.8h\n" + "fmla v31.8h, v0.8h, v6.8h\n" + "ldr q0, [x16, #0xa0]\n" + "ldr x19, [x11, #0xf8]\n" + "fmla v28.8h, v1.8h, v11.8h\n" "fmla v29.8h, v1.8h, v12.8h\n" - "ldr q12, [x24, x14]\n" - "fmla v28.8h, v1.8h, v9.8h\n" - "ldr q1, [x15, #0x160]\n" - "fmla v31.8h, v2.8h, v5.8h\n" - "ldr q5, [x26, x11]\n" - "fmla v30.8h, v2.8h, v6.8h\n" + "ldr q11, [x21, x10]\n" + "ldr x21, [x11, #0xe8]\n" + "fmla v30.8h, v1.8h, v6.8h\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "ldr q1, [x16, #0xb0]\n" + "ldr q16, [x16, #0x140]\n" + "fmla v28.8h, v2.8h, v12.8h\n" "fmla v29.8h, v2.8h, v9.8h\n" - "ldr q9, [x23, x14]\n" - "add x14, x14, #0x10\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "ldp x24, x23, [x16, #0x10]\n" - "ldp x22, x21, [x16, #0x20]\n" - "fmla v31.8h, v3.8h, v6.8h\n" - "ldr q6, [x25, x11]\n" - "fmla v30.8h, v3.8h, v8.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" - "ldr q7, [x24, x11]\n" - "ldr q13, [x21, x11]\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "ldp x20, x19, [x16, #0x30]\n" - "fmla v31.8h, v4.8h, v8.8h\n" - "ldr q8, [x23, x11]\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "ldr q11, [x20, x11]\n" - "ldr q12, [x19, x11]\n" - "fmla v28.8h, v4.8h, v9.8h\n" - "ldr q9, [x22, x11]\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "ldp x26, x25, [x16, #0x40]\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "ldr q2, [x15, #0x170]\n" - "ldr q3, [x15, #0x180]\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "fmax v28.8h, v28.8h, v18.8h\n" - "ldr q10, [x26, x11]\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "ldr q14, [x25, x11]\n" - "add x11, x11, #0x10\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "str q31, [x13, x28]\n" - "cmp x11, x27, LSL #4\n" - "fmin v28.8h, v28.8h, v17.8h\n" - "str q30, [x12, x28]\n" - "ldr q4, [x15, #0x190]\n" - "add x15, x15, #0x1a0\n" - "str q29, [x10, x28]\n" - "str q28, [x9, x28]\n" - "blt 1b\n" - "2:" // Channel tail - "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v5.8h\n" - "ldr x24, [x16, #0x50]\n" - "add x28, x28, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v6.8h\n" - "ldr x23, [x16, #0x58]\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v7.8h\n" - "ldr x22, [x16, #0x60]\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v8.8h\n" - "ldr q5, [x24, x14]\n" - "ldr q0, [x15, #0x0]\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "ldr q6, [x23, x14]\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "fmla v29.8h, v1.8h, v8.8h\n" - "ldr x21, [x16, #0x68]\n" - "fmla v28.8h, v1.8h, v13.8h\n" - "ldr q1, [x15, #0x10]\n" - "ldr x20, [x16, #0x70]\n" - "fmla v31.8h, v2.8h, v9.8h\n" - "ldr q9, [x22, x14]\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v13.8h\n" - "ldr x19, [x16, #0x78]\n" - "fmla v28.8h, v2.8h, v5.8h\n" - "ldr q2, [x15, #0x20]\n" - "ldr x26, [x16, #0x80]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x21, x14]\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v29.8h, v3.8h, v5.8h\n" - "ldr x25, [x16, #0x88]\n" - "fmla v28.8h, v3.8h, v6.8h\n" - "ldr q3, [x15, #0x30]\n" - "ldr x24, [x16, #0x90]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "ldr q12, [x20, x14]\n" - "fmla v30.8h, v4.8h, v9.8h\n" - "fmla v29.8h, v4.8h, v6.8h\n" - "ldr q9, [x19, x14]\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "ldr q4, [x15, #0x40]\n" - "ldr x23, [x16, #0x98]\n" - "fmla v31.8h, v0.8h, v7.8h\n" - "ldr x22, [x16, #0xa0]\n" - "fmla v30.8h, v0.8h, v8.8h\n" - "fmla v29.8h, v0.8h, v14.8h\n" - "ldr x21, [x16, #0xa8]\n" - "fmla v28.8h, v0.8h, v11.8h\n" - "ldr q0, [x15, #0x50]\n" - "ldr x20, [x16, #0xb0]\n" - "fmla v31.8h, v1.8h, v8.8h\n" - "ldr q8, [x25, x14]\n" + "ldr q12, [x20, x10]\n" + "ldr x20, [x11, #0xf0]\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "ldr q2, [x16, #0xc0]\n" + "fmla v28.8h, v3.8h, v9.8h\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "ldr q9, [x26, x10]\n" + "ldr x26, [x11, #0x100]\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "ldr q3, [x16, #0xd0]\n" + "fmla v28.8h, v4.8h, v13.8h\n" + "fmla v29.8h, v4.8h, v8.8h\n" + "ldr q13, [x25, x10]\n" + "ldr q8, [x22, x10]\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "fmla v31.8h, v4.8h, v14.8h\n" + "ldr q4, [x16, #0xe0]\n" + "ldr x25, [x11, #0x108]\n" + "fmla v28.8h, v0.8h, v5.8h\n" + "fmla v29.8h, v0.8h, v6.8h\n" + "ldr q5, [x24, x10]\n" + "ldr x24, [x11, #0x110]\n" + "fmla v30.8h, v0.8h, v9.8h\n" + "fmla v31.8h, v0.8h, v13.8h\n" + "ldr q0, [x16, #0xf0]\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "fmla v29.8h, v1.8h, v10.8h\n" + "ldr q6, [x23, x10]\n" + "ldr x23, [x11, #0x118]\n" "fmla v30.8h, v1.8h, v13.8h\n" - "fmla v29.8h, v1.8h, v11.8h\n" - "ldr x19, [x16, #0xb8]\n" - "fmla v28.8h, v1.8h, v12.8h\n" - "ldr q1, [x15, #0x60]\n" - "ldr x25, [x16, #0xc8]\n" - "fmla v31.8h, v2.8h, v13.8h\n" - "ldr q13, [x26, x14]\n" + "fmla v31.8h, v1.8h, v5.8h\n" + "ldr q1, [x16, #0x100]\n" + "fmla v28.8h, v2.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "ldr q10, [x21, x10]\n" "fmla v30.8h, v2.8h, v5.8h\n" - "fmla v29.8h, v2.8h, v12.8h\n" - "ldr x26, [x16, #0xc0]\n" - "fmla v28.8h, v2.8h, v9.8h\n" - "ldr q2, [x15, #0x70]\n" - "fmla v31.8h, v3.8h, v5.8h\n" - "ldr q5, [x24, x14]\n" - "ldr x24, [x16, #0xd0]\n" + "fmla v31.8h, v2.8h, v6.8h\n" + "ldr q2, [x16, #0x110]\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "ldr q11, [x20, x10]\n" "fmla v30.8h, v3.8h, v6.8h\n" - "fmla v29.8h, v3.8h, v9.8h\n" - "fmla v28.8h, v3.8h, v13.8h\n" - "ldr q3, [x15, #0x80]\n" - "fmla v31.8h, v4.8h, v6.8h\n" - "ldr q6, [x23, x14]\n" - "ldr x23, [x16, #0xd8]\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v4.8h, v13.8h\n" - "ldr q10, [x22, x14]\n" - "fmla v28.8h, v4.8h, v8.8h\n" - "ldr q4, [x15, #0x90]\n" - "ldr x22, [x16, #0xe0]\n" - "fmla v31.8h, v0.8h, v14.8h\n" - "ldr q14, [x19, x14]\n" + "fmla v31.8h, v3.8h, v8.8h\n" + "ldr q3, [x16, #0x120]\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v14.8h\n" + "ldr q12, [x19, x10]\n" + "fmla v30.8h, v4.8h, v8.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "ldr q4, [x16, #0x130]\n" + "fmla v28.8h, v0.8h, v9.8h\n" + "fmla v29.8h, v0.8h, v13.8h\n" + "ldr q9, [x26, x10]\n" "fmla v30.8h, v0.8h, v11.8h\n" - "fmla v29.8h, v0.8h, v5.8h\n" - "ldr x19, [x16, #0xf8]\n" - "fmla v28.8h, v0.8h, v6.8h\n" - "ldr q0, [x15, #0xa0]\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "ldr q11, [x21, x14]\n" - "ldr x21, [x16, #0xe8]\n" + "fmla v31.8h, v0.8h, v12.8h\n" + "ldr q11, [x25, x10]\n" + "ldp x26, x25, [x11, #0x0]\n" + "fmla v28.8h, v1.8h, v13.8h\n" + "fmla v29.8h, v1.8h, v5.8h\n" + "ldr q0, [x16, #0x150]\n" "fmla v30.8h, v1.8h, v12.8h\n" - "fmla v29.8h, v1.8h, v6.8h\n" - "fmla v28.8h, v1.8h, v10.8h\n" - "ldr q1, [x15, #0xb0]\n" - "fmla v31.8h, v2.8h, v12.8h\n" - "ldr q12, [x20, x14]\n" - "ldr x20, [x16, #0xf0]\n" + "fmla v31.8h, v1.8h, v9.8h\n" + "ldr q12, [x24, x10]\n" + "ldr q1, [x16, #0x160]\n" + "fmla v28.8h, v2.8h, v5.8h\n" + "fmla v29.8h, v2.8h, v6.8h\n" + "ldr q5, [x26, x28]\n" "fmla v30.8h, v2.8h, v9.8h\n" - "fmla v29.8h, v2.8h, v10.8h\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "ldr q2, [x15, #0xc0]\n" - "fmla v31.8h, v3.8h, v9.8h\n" - "ldr q9, [x26, x14]\n" - "ldr x26, [x16, #0x100]\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "ldr q3, [x15, #0xd0]\n" - "fmla v31.8h, v4.8h, v13.8h\n" - "ldr q13, [x25, x14]\n" - "ldr x25, [x16, #0x108]\n" - "fmla v30.8h, v4.8h, v8.8h\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "ldr q8, [x22, x14]\n" - "fmla v28.8h, v4.8h, v14.8h\n" - "ldr q4, [x15, #0xe0]\n" - "fmla v31.8h, v0.8h, v5.8h\n" - "ldr q5, [x24, x14]\n" - "ldr x24, [x16, #0x110]\n" - "fmla v30.8h, v0.8h, v6.8h\n" - "fmla v29.8h, v0.8h, v9.8h\n" - "fmla v28.8h, v0.8h, v13.8h\n" - "ldr q0, [x15, #0xf0]\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "ldr q6, [x23, x14]\n" - "ldr x23, [x16, #0x118]\n" - "fmla v30.8h, v1.8h, v10.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "ldr q9, [x23, x10]\n" + "ldp x24, x23, [x11, #0x10]\n" + "fmla v28.8h, v3.8h, v6.8h\n" + "fmla v29.8h, v3.8h, v8.8h\n" + "ldr q6, [x25, x28]\n" + "ldp x22, x21, [x11, #0x20]\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "ldp x20, x19, [x11, #0x30]\n" + "ldp x26, x25, [x11, #0x40]\n" + "fmla v28.8h, v4.8h, v8.8h\n" + "fmla v29.8h, v4.8h, v10.8h\n" + "fmax v28.8h, v28.8h, v18.8h\n" + "ldr q7, [x24, x28]\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "fmla v31.8h, v4.8h, v9.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "ldr q8, [x23, x28]\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" + "ldr q9, [x22, x28]\n" + "ldr q13, [x21, x28]\n" + "ldr q11, [x20, x28]\n" + "ldr q12, [x19, x28]\n" + "fmin v28.8h, v28.8h, v17.8h\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "ldr q10, [x26, x28]\n" + "ldr q14, [x25, x28]\n" + "add x28, x28, #0x10\n" + "cmp x28, x27, LSL #4\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "add x10, x10, #0x10\n" + "str q28, [x15, x9]\n" + "str q29, [x14, x9]\n" + "ldr q2, [x16, #0x170]\n" + "ldr q3, [x16, #0x180]\n" + "str q30, [x13, x9]\n" + "ldr q4, [x16, #0x190]\n" + "add x16, x16, #0x1a0\n" + "str q31, [x12, x9]\n" + "blt 1b\n" + "2:" // Channel tail + "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v5.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v6.8h\n" + "ldr x24, [x11, #0x50]\n" + "ldr q5, [x24, x10]\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v7.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v8.8h\n" + "ldr x23, [x11, #0x58]\n" + "ldr x22, [x11, #0x60]\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "ldr q6, [x23, x10]\n" + "ldr x21, [x11, #0x68]\n" + "fmla v30.8h, v1.8h, v8.8h\n" + "fmla v31.8h, v1.8h, v13.8h\n" + "ldr q0, [x16, #0x0]\n" + "ldr x20, [x11, #0x70]\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "ldr q9, [x22, x10]\n" + "ldr q1, [x16, #0x10]\n" + "fmla v30.8h, v2.8h, v13.8h\n" + "fmla v31.8h, v2.8h, v5.8h\n" + "ldr x19, [x11, #0x78]\n" + "ldr q2, [x16, #0x20]\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "ldr q11, [x21, x10]\n" + "ldr x26, [x11, #0x80]\n" + "fmla v30.8h, v3.8h, v5.8h\n" + "fmla v31.8h, v3.8h, v6.8h\n" + "ldr q3, [x16, #0x30]\n" + "ldr x25, [x11, #0x88]\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v9.8h\n" + "ldr q12, [x20, x10]\n" + "ldr q9, [x19, x10]\n" + "fmla v30.8h, v4.8h, v6.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "ldr q4, [x16, #0x40]\n" + "ldr x24, [x11, #0x90]\n" + "fmla v28.8h, v0.8h, v7.8h\n" + "fmla v29.8h, v0.8h, v8.8h\n" + "ldr x23, [x11, #0x98]\n" + "ldr x22, [x11, #0xa0]\n" + "fmla v30.8h, v0.8h, v14.8h\n" + "fmla v31.8h, v0.8h, v11.8h\n" + "ldr q0, [x16, #0x50]\n" + "ldr x21, [x11, #0xa8]\n" + "fmla v28.8h, v1.8h, v8.8h\n" "fmla v29.8h, v1.8h, v13.8h\n" - "fmla v28.8h, v1.8h, v5.8h\n" - "ldr q1, [x15, #0x100]\n" - "fmla v31.8h, v2.8h, v10.8h\n" - "ldr q10, [x21, x14]\n" - "fmla v30.8h, v2.8h, v11.8h\n" + "ldr q8, [x25, x10]\n" + "ldr x20, [x11, #0xb0]\n" + "fmla v30.8h, v1.8h, v11.8h\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "ldr q1, [x16, #0x60]\n" + "ldr x19, [x11, #0xb8]\n" + "fmla v28.8h, v2.8h, v13.8h\n" "fmla v29.8h, v2.8h, v5.8h\n" - "fmla v28.8h, v2.8h, v6.8h\n" - "ldr q2, [x15, #0x110]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr q11, [x20, x14]\n" - "fmla v30.8h, v3.8h, v12.8h\n" + "ldr q13, [x26, x10]\n" + "ldr x26, [x11, #0xc0]\n" + "fmla v30.8h, v2.8h, v12.8h\n" + "fmla v31.8h, v2.8h, v9.8h\n" + "ldr q2, [x16, #0x70]\n" + "ldr x25, [x11, #0xc8]\n" + "fmla v28.8h, v3.8h, v5.8h\n" "fmla v29.8h, v3.8h, v6.8h\n" - "fmla v28.8h, v3.8h, v8.8h\n" - "ldr q3, [x15, #0x120]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "ldr q12, [x19, x14]\n" - "fmla v30.8h, v4.8h, v14.8h\n" - "fmla v29.8h, v4.8h, v8.8h\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "ldr q4, [x15, #0x130]\n" - "add x15, x15, #0x140\n" - "fmla v31.8h, v0.8h, v9.8h\n" - "ldr q9, [x26, x14]\n" - "fmla v30.8h, v0.8h, v13.8h\n" + "ldr q5, [x24, x10]\n" + "ldr x24, [x11, #0xd0]\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "ldr q3, [x16, #0x80]\n" + "add x9, x9, #0x10\n" + "fmla v28.8h, v4.8h, v6.8h\n" + "fmla v29.8h, v4.8h, v10.8h\n" + "ldr q6, [x23, x10]\n" + "ldr q10, [x22, x10]\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "fmla v31.8h, v4.8h, v8.8h\n" + "ldr q4, [x16, #0x90]\n" + "ldr x23, [x11, #0xd8]\n" + "fmla v28.8h, v0.8h, v14.8h\n" "fmla v29.8h, v0.8h, v11.8h\n" - "ldr q11, [x25, x14]\n" - "fmla v28.8h, v0.8h, v12.8h\n" - "fmla v31.8h, v1.8h, v13.8h\n" - "fmla v30.8h, v1.8h, v5.8h\n" + "ldr q14, [x19, x10]\n" + "ldr x22, [x11, #0xe0]\n" + "fmla v30.8h, v0.8h, v5.8h\n" + "fmla v31.8h, v0.8h, v6.8h\n" + "ldr q0, [x16, #0xa0]\n" + "ldr x19, [x11, #0xf8]\n" + "fmla v28.8h, v1.8h, v11.8h\n" "fmla v29.8h, v1.8h, v12.8h\n" - "ldr q12, [x24, x14]\n" - "fmla v28.8h, v1.8h, v9.8h\n" - "fmla v31.8h, v2.8h, v5.8h\n" - "fmla v30.8h, v2.8h, v6.8h\n" + "ldr q11, [x21, x10]\n" + "ldr x21, [x11, #0xe8]\n" + "fmla v30.8h, v1.8h, v6.8h\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "ldr q1, [x16, #0xb0]\n" + "fmla v28.8h, v2.8h, v12.8h\n" "fmla v29.8h, v2.8h, v9.8h\n" - "ldr q9, [x23, x14]\n" - "add x14, x14, #0x10\n" - "fmla v28.8h, v2.8h, v11.8h\n" - "fmla v31.8h, v3.8h, v6.8h\n" - "fmla v30.8h, v3.8h, v8.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" - "fmla v28.8h, v3.8h, v12.8h\n" - "fmla v31.8h, v4.8h, v8.8h\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v4.8h, v12.8h\n" - "fmla v28.8h, v4.8h, v9.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "str q31, [x13, x28]\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "str q30, [x12, x28]\n" + "ldr q12, [x20, x10]\n" + "ldr x20, [x11, #0xf0]\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "ldr q2, [x16, #0xc0]\n" + "fmla v28.8h, v3.8h, v9.8h\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "ldr q9, [x26, x10]\n" + "ldr x26, [x11, #0x100]\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "ldr q3, [x16, #0xd0]\n" + "fmla v28.8h, v4.8h, v13.8h\n" + "fmla v29.8h, v4.8h, v8.8h\n" + "ldr q13, [x25, x10]\n" + "ldr q8, [x22, x10]\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "fmla v31.8h, v4.8h, v14.8h\n" + "ldr q4, [x16, #0xe0]\n" + "ldr x25, [x11, #0x108]\n" + "fmla v28.8h, v0.8h, v5.8h\n" + "fmla v29.8h, v0.8h, v6.8h\n" + "ldr q5, [x24, x10]\n" + "ldr x24, [x11, #0x110]\n" + "fmla v30.8h, v0.8h, v9.8h\n" + "fmla v31.8h, v0.8h, v13.8h\n" + "ldr q0, [x16, #0xf0]\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "fmla v29.8h, v1.8h, v10.8h\n" + "ldr q6, [x23, x10]\n" + "ldr x23, [x11, #0x118]\n" + "fmla v30.8h, v1.8h, v13.8h\n" + "fmla v31.8h, v1.8h, v5.8h\n" + "ldr q1, [x16, #0x100]\n" + "fmla v28.8h, v2.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "ldr q10, [x21, x10]\n" + "fmla v30.8h, v2.8h, v5.8h\n" + "fmla v31.8h, v2.8h, v6.8h\n" + "ldr q2, [x16, #0x110]\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "ldr q11, [x20, x10]\n" + "fmla v30.8h, v3.8h, v6.8h\n" + "fmla v31.8h, v3.8h, v8.8h\n" + "ldr q3, [x16, #0x120]\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v14.8h\n" + "ldr q12, [x19, x10]\n" + "fmla v30.8h, v4.8h, v8.8h\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "ldr q4, [x16, #0x130]\n" + "add x16, x16, #0x140\n" + "fmla v28.8h, v0.8h, v9.8h\n" + "fmla v29.8h, v0.8h, v13.8h\n" + "ldr q9, [x26, x10]\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "fmla v31.8h, v0.8h, v12.8h\n" + "ldr q11, [x25, x10]\n" + "fmla v28.8h, v1.8h, v13.8h\n" + "fmla v29.8h, v1.8h, v5.8h\n" + "fmla v30.8h, v1.8h, v12.8h\n" + "fmla v31.8h, v1.8h, v9.8h\n" + "ldr q12, [x24, x10]\n" + "fmla v28.8h, v2.8h, v5.8h\n" + "fmla v29.8h, v2.8h, v6.8h\n" + "fmla v30.8h, v2.8h, v9.8h\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "ldr q9, [x23, x10]\n" + "add x10, x10, #0x10\n" + "fmla v28.8h, v3.8h, v6.8h\n" + "fmla v29.8h, v3.8h, v8.8h\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "fmla v28.8h, v4.8h, v8.8h\n" + "fmla v29.8h, v4.8h, v10.8h\n" "fmax v28.8h, v28.8h, v18.8h\n" - "str q29, [x10, x28]\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "fmla v31.8h, v4.8h, v9.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" "fmin v28.8h, v28.8h, v17.8h\n" - "str q28, [x9, x28]\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "str q28, [x15, x9]\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "str q29, [x14, x9]\n" + "str q30, [x13, x9]\n" + "str q31, [x12, x9]\n" "3:" // Oddments - "tst %x[n_channels], #0x1\n" - "beq 60f\n" - "ldr q16, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "mov x28, x14\n" - "ldr q1, [x15, #0x20]\n" - "add x13, x13, x28\n" - "ldr q2, [x15, #0x30]\n" - "add x12, x12, x28\n" - "ldr q3, [x15, #0x40]\n" - "add x10, x10, x28\n" - "ldr q4, [x15, #0x50]\n" - "add x9, x9, x28\n" - "ldr x24, [x16, #0x10]\n" - "ldr x23, [x16, #0x18]\n" - "ldr x22, [x16, #0x20]\n" - "add x24, x24, x14\n" - "ldr x21, [x16, #0x28]\n" - "add x23, x23, x14\n" - "ldr x20, [x16, #0x30]\n" - "add x22, x22, x14\n" - "ldr x19, [x16, #0x38]\n" - "add x21, x21, x14\n" - "ldr x26, [x16, #0x40]\n" - "add x20, x20, x14\n" - "ldr x25, [x16, #0x48]\n" - "add x19, x19, x14\n" - "add x26, x26, x14\n" - "add x25, x25, x14\n" - "add x15, x15, #0x60\n" + "tst %x[n_channels], #0x7\n" + "beq 116f\n" + "mov x9, x10\n" + "ldr x28, [x11, #0x0]\n" + "ldr x27, [x11, #0x8]\n" + "ldr x26, [x11, #0x10]\n" + "add x15, x15, x9\n" + "add x14, x14, x9\n" + "ldr x25, [x11, #0x18]\n" + "ldr x24, [x11, #0x20]\n" + "add x13, x13, x9\n" + "add x12, x12, x9\n" + "ldr x23, [x11, #0x28]\n" + "ldr x22, [x11, #0x30]\n" + "add x28, x28, x10\n" + "add x27, x27, x10\n" + "ldr x21, [x11, #0x38]\n" + "ldr x20, [x11, #0x40]\n" + "add x26, x26, x10\n" + "add x25, x25, x10\n" + "ldr x19, [x11, #0x48]\n" + "ldr q16, [x16, #0x0]\n" + "add x24, x24, x10\n" + "add x23, x23, x10\n" + "ldr q0, [x16, #0x10]\n" + "ldr q1, [x16, #0x20]\n" + "add x22, x22, x10\n" + "add x21, x21, x10\n" + "ldr q2, [x16, #0x30]\n" + "ldr q3, [x16, #0x40]\n" + "add x20, x20, x10\n" + "add x19, x19, x10\n" + "ldr q4, [x16, #0x50]\n" + "add x16, x16, #0x60\n" + "tbz %x[n_channels], #2, 5f\n" + "ld1 { v5.d }[0], [x28], #0x8\n" + "ld1 { v6.d }[0], [x27], #0x8\n" + "ld1 { v7.d }[0], [x26], #0x8\n" + "ld1 { v8.d }[0], [x25], #0x8\n" + "ld1 { v9.d }[0], [x24], #0x8\n" + "ld1 { v13.d }[0], [x23], #0x8\n" + "ld1 { v11.d }[0], [x22], #0x8\n" + "ld1 { v12.d }[0], [x21], #0x8\n" + "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v14.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 4f\n" - "ld1 { v5.s }[0], [x26], #0x4\n" - "ld1 { v6.s }[0], [x25], #0x4\n" - "ld1 { v7.s }[0], [x24], #0x4\n" - "ld1 { v8.s }[0], [x23], #0x4\n" - "ld1 { v9.s }[0], [x22], #0x4\n" - "ld1 { v13.s }[0], [x21], #0x4\n" - "ld1 { v11.s }[0], [x20], #0x4\n" - "ld1 { v12.s }[0], [x19], #0x4\n" - "ld1 { v10.s }[0], [x26], #0x4\n" - "ld1 { v14.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 5f\n" - "ld1 { v7.h }[2], [x24], #0x2\n" - "ld1 { v8.h }[2], [x23], #0x2\n" - "ld1 { v5.h }[2], [x26], #0x2\n" - "ld1 { v6.h }[2], [x25], #0x2\n" - "ld1 { v9.h }[2], [x22], #0x2\n" - "ld1 { v13.h }[2], [x21], #0x2\n" - "ld1 { v11.h }[2], [x20], #0x2\n" - "ld1 { v12.h }[2], [x19], #0x2\n" - "ld1 { v10.h }[2], [x26], #0x2\n" - "ld1 { v14.h }[2], [x25], #0x2\n" - "b 5f\n" - "4:" // Oddments: Load inputs (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 1: Unset - "ld1 { v5.h }[0], [x26], #0x2\n" - "ld1 { v6.h }[0], [x25], #0x2\n" - "ld1 { v7.h }[0], [x24], #0x2\n" - "ld1 { v8.h }[0], [x23], #0x2\n" - "ld1 { v9.h }[0], [x22], #0x2\n" - "ld1 { v13.h }[0], [x21], #0x2\n" - "ld1 { v11.h }[0], [x20], #0x2\n" - "ld1 { v12.h }[0], [x19], #0x2\n" - "ld1 { v10.h }[0], [x26], #0x2\n" - "ld1 { v14.h }[0], [x25], #0x2\n" - "5:" // Oddments: Load inputs (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 1: End - "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v5.8h\n" - "ldr x24, [x16, #0x50]\n" - "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v6.8h\n" - "add x24, x24, x14\n" - "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v7.8h\n" - "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v8.8h\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "fmla v30.8h, v1.8h, v9.8h\n" - "fmla v29.8h, v1.8h, v8.8h\n" - "fmla v28.8h, v1.8h, v13.8h\n" - "fmla v31.8h, v2.8h, v9.8h\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v13.8h\n" + "ld1 { v5.s }[2], [x28], #0x4\n" + "ld1 { v6.s }[2], [x27], #0x4\n" + "ld1 { v7.s }[2], [x26], #0x4\n" + "ld1 { v8.s }[2], [x25], #0x4\n" + "ld1 { v9.s }[2], [x24], #0x4\n" + "ld1 { v13.s }[2], [x23], #0x4\n" + "ld1 { v11.s }[2], [x22], #0x4\n" + "ld1 { v12.s }[2], [x21], #0x4\n" + "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v14.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 7f\n" + "ld1 { v5.h }[6], [x28], #0x2\n" + "ld1 { v6.h }[6], [x27], #0x2\n" + "ld1 { v7.h }[6], [x26], #0x2\n" + "ld1 { v8.h }[6], [x25], #0x2\n" + "ld1 { v9.h }[6], [x24], #0x2\n" + "ld1 { v13.h }[6], [x23], #0x2\n" + "ld1 { v11.h }[6], [x22], #0x2\n" + "ld1 { v12.h }[6], [x21], #0x2\n" + "ld1 { v10.h }[6], [x20], #0x2\n" + "ld1 { v14.h }[6], [x19], #0x2\n" + "b 7f\n" + "4:" // Oddments: Load inputs (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 7f\n" + "ld1 { v5.h }[4], [x28], #0x2\n" + "ld1 { v6.h }[4], [x27], #0x2\n" + "ld1 { v7.h }[4], [x26], #0x2\n" + "ld1 { v8.h }[4], [x25], #0x2\n" + "ld1 { v9.h }[4], [x24], #0x2\n" + "ld1 { v13.h }[4], [x23], #0x2\n" + "ld1 { v11.h }[4], [x22], #0x2\n" + "ld1 { v12.h }[4], [x21], #0x2\n" + "ld1 { v10.h }[4], [x20], #0x2\n" + "ld1 { v14.h }[4], [x19], #0x2\n" + "b 7f\n" + "5:" // Oddments: Load inputs (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 2: Unset "tbz %x[n_channels], #1, 6f\n" - "ld1 { v5.s }[0], [x24], #0x4\n" + "ld1 { v5.s }[0], [x28], #0x4\n" + "ld1 { v6.s }[0], [x27], #0x4\n" + "ld1 { v7.s }[0], [x26], #0x4\n" + "ld1 { v8.s }[0], [x25], #0x4\n" + "ld1 { v9.s }[0], [x24], #0x4\n" + "ld1 { v13.s }[0], [x23], #0x4\n" + "ld1 { v11.s }[0], [x22], #0x4\n" + "ld1 { v12.s }[0], [x21], #0x4\n" + "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v14.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 7f\n" - "ld1 { v5.h }[2], [x24], #0x2\n" + "ld1 { v5.h }[2], [x28], #0x2\n" + "ld1 { v6.h }[2], [x27], #0x2\n" + "ld1 { v7.h }[2], [x26], #0x2\n" + "ld1 { v8.h }[2], [x25], #0x2\n" + "ld1 { v9.h }[2], [x24], #0x2\n" + "ld1 { v13.h }[2], [x23], #0x2\n" + "ld1 { v11.h }[2], [x22], #0x2\n" + "ld1 { v12.h }[2], [x21], #0x2\n" + "ld1 { v10.h }[2], [x20], #0x2\n" + "ld1 { v14.h }[2], [x19], #0x2\n" "b 7f\n" - "6:" // Oddments: Load input (1, 3): Bit 1: Unset - "ld1 { v5.h }[0], [x24], #0x2\n" - "7:" // Oddments: Load input (1, 3): Bit 1: End - "fmla v28.8h, v2.8h, v5.8h\n" - "ldr x23, [x16, #0x58]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "add x23, x23, x14\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v29.8h, v3.8h, v5.8h\n" + "6:" // Oddments: Load inputs (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 2: Unset: Bit 1: Unset + "ld1 { v5.h }[0], [x28], #0x2\n" + "ld1 { v6.h }[0], [x27], #0x2\n" + "ld1 { v7.h }[0], [x26], #0x2\n" + "ld1 { v8.h }[0], [x25], #0x2\n" + "ld1 { v9.h }[0], [x24], #0x2\n" + "ld1 { v13.h }[0], [x23], #0x2\n" + "ld1 { v11.h }[0], [x22], #0x2\n" + "ld1 { v12.h }[0], [x21], #0x2\n" + "ld1 { v10.h }[0], [x20], #0x2\n" + "ld1 { v14.h }[0], [x19], #0x2\n" + "7:" // Oddments: Load inputs (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 2: End + "mov v28.16b, v16.16b\n fmla v28.8h, v0.8h, v5.8h\n" + "mov v29.16b, v16.16b\n fmla v29.8h, v0.8h, v6.8h\n" + "ldr x19, [x11, #0x50]\n" + "add x19, x19, x10\n" + "mov v30.16b, v16.16b\n fmla v30.8h, v0.8h, v7.8h\n" + "mov v31.16b, v16.16b\n fmla v31.8h, v0.8h, v8.8h\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "fmla v29.8h, v1.8h, v9.8h\n" + "fmla v30.8h, v1.8h, v8.8h\n" + "fmla v31.8h, v1.8h, v13.8h\n" + "fmla v28.8h, v2.8h, v9.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "fmla v30.8h, v2.8h, v13.8h\n" + "tbz %x[n_channels], #2, 9f\n" + "ld1 { v5.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 8f\n" - "ld1 { v6.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 9f\n" - "ld1 { v6.h }[2], [x23], #0x2\n" - "b 9f\n" - "8:" // Oddments: Load input (1, 4): Bit 1: Unset - "ld1 { v6.h }[0], [x23], #0x2\n" - "9:" // Oddments: Load input (1, 4): Bit 1: End - "fmla v28.8h, v3.8h, v6.8h\n" - "ldr x22, [x16, #0x60]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "add x22, x22, x14\n" + "ld1 { v5.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 11f\n" + "ld1 { v5.h }[6], [x19], #0x2\n" + "b 11f\n" + "8:" // Oddments: Load input (1, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 11f\n" + "ld1 { v5.h }[4], [x19], #0x2\n" + "b 11f\n" + "9:" // Oddments: Load input (1, 3): Bit 2: Unset "tbz %x[n_channels], #1, 10f\n" - "ld1 { v9.s }[0], [x22], #0x4\n" + "ld1 { v5.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 11f\n" - "ld1 { v9.h }[2], [x22], #0x2\n" + "ld1 { v5.h }[2], [x19], #0x2\n" "b 11f\n" - "10:" // Oddments: Load input (0, 5): Bit 1: Unset - "ld1 { v9.h }[0], [x22], #0x2\n" - "11:" // Oddments: Load input (0, 5): Bit 1: End - "fmla v30.8h, v4.8h, v9.8h\n" - "ldr h0, [x15, #0xc]\n" - "fmla v29.8h, v4.8h, v6.8h\n" - "ldr x21, [x16, #0x68]\n" - "add x21, x21, x14\n" - "fmla v28.8h, v4.8h, v10.8h\n" - "fmla v31.8h, v0.8h, v7.8h\n" - "fmla v30.8h, v0.8h, v8.8h\n" - "fmla v29.8h, v0.8h, v14.8h\n" + "10:" // Oddments: Load input (1, 3): Bit 2: Unset: Bit 1: Unset + "ld1 { v5.h }[0], [x19], #0x2\n" + "11:" // Oddments: Load input (1, 3): Bit 2: End + "ldr x19, [x11, #0x58]\n" + "fmla v31.8h, v2.8h, v5.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "add x19, x19, x10\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "fmla v30.8h, v3.8h, v5.8h\n" + "tbz %x[n_channels], #2, 13f\n" + "ld1 { v6.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 12f\n" - "ld1 { v11.s }[0], [x21], #0x4\n" - "tbz %x[n_channels], #0, 13f\n" - "ld1 { v11.h }[2], [x21], #0x2\n" - "b 13f\n" - "12:" // Oddments: Load input (2, 1): Bit 1: Unset - "ld1 { v11.h }[0], [x21], #0x2\n" - "13:" // Oddments: Load input (2, 1): Bit 1: End - "fmla v28.8h, v0.8h, v11.8h\n" - "ldr h1, [x15, #0xe]\n" - "fmla v31.8h, v1.8h, v8.8h\n" - "ldr x20, [x16, #0x70]\n" - "add x20, x20, x14\n" - "fmla v30.8h, v1.8h, v13.8h\n" - "fmla v29.8h, v1.8h, v11.8h\n" + "ld1 { v6.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v6.h }[6], [x19], #0x2\n" + "b 15f\n" + "12:" // Oddments: Load input (1, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 15f\n" + "ld1 { v6.h }[4], [x19], #0x2\n" + "b 15f\n" + "13:" // Oddments: Load input (1, 4): Bit 2: Unset "tbz %x[n_channels], #1, 14f\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v6.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 15f\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v6.h }[2], [x19], #0x2\n" "b 15f\n" - "14:" // Oddments: Load input (2, 2): Bit 1: Unset - "ld1 { v12.h }[0], [x20], #0x2\n" - "15:" // Oddments: Load input (2, 2): Bit 1: End - "fmla v28.8h, v1.8h, v12.8h\n" - "ldr h2, [x15, #0x10]\n" - "fmla v31.8h, v2.8h, v13.8h\n" - "ldr x19, [x16, #0x78]\n" - "add x19, x19, x14\n" - "fmla v30.8h, v2.8h, v5.8h\n" - "fmla v29.8h, v2.8h, v12.8h\n" + "14:" // Oddments: Load input (1, 4): Bit 2: Unset: Bit 1: Unset + "ld1 { v6.h }[0], [x19], #0x2\n" + "15:" // Oddments: Load input (1, 4): Bit 2: End + "ldr x19, [x11, #0x60]\n" + "fmla v31.8h, v3.8h, v6.8h\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "add x19, x19, x10\n" + "tbz %x[n_channels], #2, 17f\n" + "ld1 { v9.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 16f\n" - "ld1 { v9.s }[0], [x19], #0x4\n" - "tbz %x[n_channels], #0, 17f\n" - "ld1 { v9.h }[2], [x19], #0x2\n" - "b 17f\n" - "16:" // Oddments: Load input (2, 3): Bit 1: Unset - "ld1 { v9.h }[0], [x19], #0x2\n" - "17:" // Oddments: Load input (2, 3): Bit 1: End - "fmla v28.8h, v2.8h, v9.8h\n" - "ldr h3, [x15, #0x12]\n" - "fmla v31.8h, v3.8h, v5.8h\n" - "ldr x26, [x16, #0x80]\n" - "add x26, x26, x14\n" - "fmla v30.8h, v3.8h, v6.8h\n" - "fmla v29.8h, v3.8h, v9.8h\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v9.h }[6], [x19], #0x2\n" + "b 19f\n" + "16:" // Oddments: Load input (0, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 19f\n" + "ld1 { v9.h }[4], [x19], #0x2\n" + "b 19f\n" + "17:" // Oddments: Load input (0, 5): Bit 2: Unset "tbz %x[n_channels], #1, 18f\n" - "ld1 { v13.s }[0], [x26], #0x4\n" + "ld1 { v9.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 19f\n" - "ld1 { v13.h }[2], [x26], #0x2\n" + "ld1 { v9.h }[2], [x19], #0x2\n" "b 19f\n" - "18:" // Oddments: Load input (2, 4): Bit 1: Unset - "ld1 { v13.h }[0], [x26], #0x2\n" - "19:" // Oddments: Load input (2, 4): Bit 1: End - "fmla v28.8h, v3.8h, v13.8h\n" - "ldr h4, [x15, #0x14]\n" - "fmla v31.8h, v4.8h, v6.8h\n" - "ldr x25, [x16, #0x88]\n" - "add x25, x25, x14\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v4.8h, v13.8h\n" + "18:" // Oddments: Load input (0, 5): Bit 2: Unset: Bit 1: Unset + "ld1 { v9.h }[0], [x19], #0x2\n" + "19:" // Oddments: Load input (0, 5): Bit 2: End + "fmla v29.8h, v4.8h, v9.8h\n" + "fmla v30.8h, v4.8h, v6.8h\n" + "ldr q0, [x16, #0x0]\n" + "ldr x19, [x11, #0x68]\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "fmla v28.8h, v0.8h, v7.8h\n" + "add x19, x19, x10\n" + "fmla v29.8h, v0.8h, v8.8h\n" + "fmla v30.8h, v0.8h, v14.8h\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 21f\n" + "ld1 { v11.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 20f\n" - "ld1 { v8.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 21f\n" - "ld1 { v8.h }[2], [x25], #0x2\n" - "b 21f\n" - "20:" // Oddments: Load input (2, 5): Bit 1: Unset - "ld1 { v8.h }[0], [x25], #0x2\n" - "21:" // Oddments: Load input (2, 5): Bit 1: End - "fmla v28.8h, v4.8h, v8.8h\n" - "ldr h0, [x15, #0x16]\n" - "fmla v31.8h, v0.8h, v14.8h\n" - "ldr x24, [x16, #0x90]\n" - "add x24, x24, x14\n" - "fmla v30.8h, v0.8h, v11.8h\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 23f\n" + "ld1 { v11.h }[6], [x19], #0x2\n" + "b 23f\n" + "20:" // Oddments: Load input (2, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 23f\n" + "ld1 { v11.h }[4], [x19], #0x2\n" + "b 23f\n" + "21:" // Oddments: Load input (2, 1): Bit 2: Unset "tbz %x[n_channels], #1, 22f\n" - "ld1 { v5.s }[0], [x24], #0x4\n" + "ld1 { v11.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 23f\n" - "ld1 { v5.h }[2], [x24], #0x2\n" + "ld1 { v11.h }[2], [x19], #0x2\n" "b 23f\n" - "22:" // Oddments: Load input (3, 0): Bit 1: Unset - "ld1 { v5.h }[0], [x24], #0x2\n" - "23:" // Oddments: Load input (3, 0): Bit 1: End - "fmla v29.8h, v0.8h, v5.8h\n" - "ldr x23, [x16, #0x98]\n" - "add x23, x23, x14\n" + "22:" // Oddments: Load input (2, 1): Bit 2: Unset: Bit 1: Unset + "ld1 { v11.h }[0], [x19], #0x2\n" + "23:" // Oddments: Load input (2, 1): Bit 2: End + "ldr q1, [x16, #0x0]\n" + "ldr x19, [x11, #0x70]\n" + "fmla v31.8h, v0.8h, v11.8h\n" + "fmla v28.8h, v1.8h, v8.8h\n" + "fmla v29.8h, v1.8h, v13.8h\n" + "fmla v30.8h, v1.8h, v11.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 25f\n" + "ld1 { v12.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 24f\n" - "ld1 { v6.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 25f\n" - "ld1 { v6.h }[2], [x23], #0x2\n" - "b 25f\n" - "24:" // Oddments: Load input (3, 1): Bit 1: Unset - "ld1 { v6.h }[0], [x23], #0x2\n" - "25:" // Oddments: Load input (3, 1): Bit 1: End - "fmla v28.8h, v0.8h, v6.8h\n" - "ldr h1, [x15, #0x18]\n" - "fmla v31.8h, v1.8h, v11.8h\n" - "ldr x22, [x16, #0xa0]\n" - "add x22, x22, x14\n" - "fmla v30.8h, v1.8h, v12.8h\n" - "fmla v29.8h, v1.8h, v6.8h\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 27f\n" + "ld1 { v12.h }[6], [x19], #0x2\n" + "b 27f\n" + "24:" // Oddments: Load input (2, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 27f\n" + "ld1 { v12.h }[4], [x19], #0x2\n" + "b 27f\n" + "25:" // Oddments: Load input (2, 2): Bit 2: Unset "tbz %x[n_channels], #1, 26f\n" - "ld1 { v10.s }[0], [x22], #0x4\n" + "ld1 { v12.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 27f\n" - "ld1 { v10.h }[2], [x22], #0x2\n" + "ld1 { v12.h }[2], [x19], #0x2\n" "b 27f\n" - "26:" // Oddments: Load input (3, 2): Bit 1: Unset - "ld1 { v10.h }[0], [x22], #0x2\n" - "27:" // Oddments: Load input (3, 2): Bit 1: End - "fmla v28.8h, v1.8h, v10.8h\n" - "ldr h2, [x15, #0x1a]\n" - "fmla v31.8h, v2.8h, v12.8h\n" - "ldr x21, [x16, #0xa8]\n" - "add x21, x21, x14\n" - "fmla v30.8h, v2.8h, v9.8h\n" - "fmla v29.8h, v2.8h, v10.8h\n" + "26:" // Oddments: Load input (2, 2): Bit 2: Unset: Bit 1: Unset + "ld1 { v12.h }[0], [x19], #0x2\n" + "27:" // Oddments: Load input (2, 2): Bit 2: End + "ldr q2, [x16, #0x0]\n" + "ldr x19, [x11, #0x78]\n" + "fmla v31.8h, v1.8h, v12.8h\n" + "fmla v28.8h, v2.8h, v13.8h\n" + "fmla v29.8h, v2.8h, v5.8h\n" + "fmla v30.8h, v2.8h, v12.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 29f\n" + "ld1 { v9.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 28f\n" - "ld1 { v11.s }[0], [x21], #0x4\n" - "tbz %x[n_channels], #0, 29f\n" - "ld1 { v11.h }[2], [x21], #0x2\n" - "b 29f\n" - "28:" // Oddments: Load input (3, 3): Bit 1: Unset - "ld1 { v11.h }[0], [x21], #0x2\n" - "29:" // Oddments: Load input (3, 3): Bit 1: End - "fmla v28.8h, v2.8h, v11.8h\n" - "ldr h3, [x15, #0x1c]\n" - "fmla v31.8h, v3.8h, v9.8h\n" - "ldr x20, [x16, #0xb0]\n" - "add x20, x20, x14\n" - "fmla v30.8h, v3.8h, v13.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 31f\n" + "ld1 { v9.h }[6], [x19], #0x2\n" + "b 31f\n" + "28:" // Oddments: Load input (2, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 31f\n" + "ld1 { v9.h }[4], [x19], #0x2\n" + "b 31f\n" + "29:" // Oddments: Load input (2, 3): Bit 2: Unset "tbz %x[n_channels], #1, 30f\n" - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v9.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 31f\n" - "ld1 { v12.h }[2], [x20], #0x2\n" + "ld1 { v9.h }[2], [x19], #0x2\n" "b 31f\n" - "30:" // Oddments: Load input (3, 4): Bit 1: Unset - "ld1 { v12.h }[0], [x20], #0x2\n" - "31:" // Oddments: Load input (3, 4): Bit 1: End - "fmla v28.8h, v3.8h, v12.8h\n" - "ldr h4, [x15, #0x1e]\n" - "fmla v31.8h, v4.8h, v13.8h\n" - "ldr x19, [x16, #0xb8]\n" - "add x19, x19, x14\n" - "fmla v30.8h, v4.8h, v8.8h\n" - "fmla v29.8h, v4.8h, v12.8h\n" + "30:" // Oddments: Load input (2, 3): Bit 2: Unset: Bit 1: Unset + "ld1 { v9.h }[0], [x19], #0x2\n" + "31:" // Oddments: Load input (2, 3): Bit 2: End + "ldr q3, [x16, #0x0]\n" + "ldr x19, [x11, #0x80]\n" + "fmla v31.8h, v2.8h, v9.8h\n" + "fmla v28.8h, v3.8h, v5.8h\n" + "fmla v29.8h, v3.8h, v6.8h\n" + "fmla v30.8h, v3.8h, v9.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 33f\n" + "ld1 { v13.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 32f\n" - "ld1 { v14.s }[0], [x19], #0x4\n" - "tbz %x[n_channels], #0, 33f\n" - "ld1 { v14.h }[2], [x19], #0x2\n" - "b 33f\n" - "32:" // Oddments: Load input (3, 5): Bit 1: Unset - "ld1 { v14.h }[0], [x19], #0x2\n" - "33:" // Oddments: Load input (3, 5): Bit 1: End - "fmla v28.8h, v4.8h, v14.8h\n" - "ldr h0, [x15, #0x20]\n" - "fmla v31.8h, v0.8h, v5.8h\n" - "ldr x26, [x16, #0xc0]\n" - "add x26, x26, x14\n" - "fmla v30.8h, v0.8h, v6.8h\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 35f\n" + "ld1 { v13.h }[6], [x19], #0x2\n" + "b 35f\n" + "32:" // Oddments: Load input (2, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 35f\n" + "ld1 { v13.h }[4], [x19], #0x2\n" + "b 35f\n" + "33:" // Oddments: Load input (2, 4): Bit 2: Unset "tbz %x[n_channels], #1, 34f\n" - "ld1 { v9.s }[0], [x26], #0x4\n" + "ld1 { v13.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 35f\n" - "ld1 { v9.h }[2], [x26], #0x2\n" + "ld1 { v13.h }[2], [x19], #0x2\n" "b 35f\n" - "34:" // Oddments: Load input (4, 0): Bit 1: Unset - "ld1 { v9.h }[0], [x26], #0x2\n" - "35:" // Oddments: Load input (4, 0): Bit 1: End - "fmla v29.8h, v0.8h, v9.8h\n" - "ldr x25, [x16, #0xc8]\n" - "add x25, x25, x14\n" + "34:" // Oddments: Load input (2, 4): Bit 2: Unset: Bit 1: Unset + "ld1 { v13.h }[0], [x19], #0x2\n" + "35:" // Oddments: Load input (2, 4): Bit 2: End + "ldr q4, [x16, #0x0]\n" + "ldr x19, [x11, #0x88]\n" + "fmla v31.8h, v3.8h, v13.8h\n" + "fmla v28.8h, v4.8h, v6.8h\n" + "fmla v29.8h, v4.8h, v10.8h\n" + "fmla v30.8h, v4.8h, v13.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 37f\n" + "ld1 { v8.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 36f\n" - "ld1 { v13.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 37f\n" - "ld1 { v13.h }[2], [x25], #0x2\n" - "b 37f\n" - "36:" // Oddments: Load input (4, 1): Bit 1: Unset - "ld1 { v13.h }[0], [x25], #0x2\n" - "37:" // Oddments: Load input (4, 1): Bit 1: End - "fmla v28.8h, v0.8h, v13.8h\n" - "ldr h1, [x15, #0x22]\n" - "fmla v31.8h, v1.8h, v6.8h\n" - "ldr x24, [x16, #0xd0]\n" - "add x24, x24, x14\n" - "fmla v30.8h, v1.8h, v10.8h\n" - "fmla v29.8h, v1.8h, v13.8h\n" + "ld1 { v8.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 39f\n" + "ld1 { v8.h }[6], [x19], #0x2\n" + "b 39f\n" + "36:" // Oddments: Load input (2, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 39f\n" + "ld1 { v8.h }[4], [x19], #0x2\n" + "b 39f\n" + "37:" // Oddments: Load input (2, 5): Bit 2: Unset "tbz %x[n_channels], #1, 38f\n" - "ld1 { v5.s }[0], [x24], #0x4\n" + "ld1 { v8.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 39f\n" - "ld1 { v5.h }[2], [x24], #0x2\n" + "ld1 { v8.h }[2], [x19], #0x2\n" "b 39f\n" - "38:" // Oddments: Load input (4, 2): Bit 1: Unset - "ld1 { v5.h }[0], [x24], #0x2\n" - "39:" // Oddments: Load input (4, 2): Bit 1: End - "fmla v28.8h, v1.8h, v5.8h\n" - "ldr h2, [x15, #0x24]\n" - "fmla v31.8h, v2.8h, v10.8h\n" - "ldr x23, [x16, #0xd8]\n" - "add x23, x23, x14\n" - "fmla v30.8h, v2.8h, v11.8h\n" - "fmla v29.8h, v2.8h, v5.8h\n" + "38:" // Oddments: Load input (2, 5): Bit 2: Unset: Bit 1: Unset + "ld1 { v8.h }[0], [x19], #0x2\n" + "39:" // Oddments: Load input (2, 5): Bit 2: End + "ldr q0, [x16, #0x0]\n" + "ldr x19, [x11, #0x90]\n" + "fmla v31.8h, v4.8h, v8.8h\n" + "fmla v28.8h, v0.8h, v14.8h\n" + "fmla v29.8h, v0.8h, v11.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 41f\n" + "ld1 { v5.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 40f\n" - "ld1 { v6.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 41f\n" - "ld1 { v6.h }[2], [x23], #0x2\n" - "b 41f\n" - "40:" // Oddments: Load input (4, 3): Bit 1: Unset - "ld1 { v6.h }[0], [x23], #0x2\n" - "41:" // Oddments: Load input (4, 3): Bit 1: End - "fmla v28.8h, v2.8h, v6.8h\n" - "ldr h3, [x15, #0x26]\n" - "fmla v31.8h, v3.8h, v11.8h\n" - "ldr x22, [x16, #0xe0]\n" - "add x22, x22, x14\n" - "fmla v30.8h, v3.8h, v12.8h\n" - "fmla v29.8h, v3.8h, v6.8h\n" + "ld1 { v5.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 43f\n" + "ld1 { v5.h }[6], [x19], #0x2\n" + "b 43f\n" + "40:" // Oddments: Load input (3, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 43f\n" + "ld1 { v5.h }[4], [x19], #0x2\n" + "b 43f\n" + "41:" // Oddments: Load input (3, 0): Bit 2: Unset "tbz %x[n_channels], #1, 42f\n" - "ld1 { v8.s }[0], [x22], #0x4\n" + "ld1 { v5.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 43f\n" - "ld1 { v8.h }[2], [x22], #0x2\n" + "ld1 { v5.h }[2], [x19], #0x2\n" "b 43f\n" - "42:" // Oddments: Load input (4, 4): Bit 1: Unset - "ld1 { v8.h }[0], [x22], #0x2\n" - "43:" // Oddments: Load input (4, 4): Bit 1: End - "fmla v28.8h, v3.8h, v8.8h\n" - "ldr h4, [x15, #0x28]\n" - "fmla v31.8h, v4.8h, v12.8h\n" - "ldr x21, [x16, #0xe8]\n" - "add x21, x21, x14\n" - "fmla v30.8h, v4.8h, v14.8h\n" - "fmla v29.8h, v4.8h, v8.8h\n" + "42:" // Oddments: Load input (3, 0): Bit 2: Unset: Bit 1: Unset + "ld1 { v5.h }[0], [x19], #0x2\n" + "43:" // Oddments: Load input (3, 0): Bit 2: End + "ldr x19, [x11, #0x98]\n" + "fmla v30.8h, v0.8h, v5.8h\n" + "add x19, x19, x10\n" + "tbz %x[n_channels], #2, 45f\n" + "ld1 { v6.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 44f\n" - "ld1 { v10.s }[0], [x21], #0x4\n" - "tbz %x[n_channels], #0, 45f\n" - "ld1 { v10.h }[2], [x21], #0x2\n" - "b 45f\n" - "44:" // Oddments: Load input (4, 5): Bit 1: Unset - "ld1 { v10.h }[0], [x21], #0x2\n" - "45:" // Oddments: Load input (4, 5): Bit 1: End - "fmla v28.8h, v4.8h, v10.8h\n" - "ldr h0, [x15, #0x2a]\n" - "fmla v31.8h, v0.8h, v9.8h\n" - "ldr x20, [x16, #0xf0]\n" - "add x20, x20, x14\n" - "fmla v30.8h, v0.8h, v13.8h\n" + "ld1 { v6.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v6.h }[6], [x19], #0x2\n" + "b 47f\n" + "44:" // Oddments: Load input (3, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 47f\n" + "ld1 { v6.h }[4], [x19], #0x2\n" + "b 47f\n" + "45:" // Oddments: Load input (3, 1): Bit 2: Unset "tbz %x[n_channels], #1, 46f\n" - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v6.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 47f\n" - "ld1 { v11.h }[2], [x20], #0x2\n" + "ld1 { v6.h }[2], [x19], #0x2\n" "b 47f\n" - "46:" // Oddments: Load input (5, 0): Bit 1: Unset - "ld1 { v11.h }[0], [x20], #0x2\n" - "47:" // Oddments: Load input (5, 0): Bit 1: End - "fmla v29.8h, v0.8h, v11.8h\n" - "ldr x19, [x16, #0xf8]\n" - "add x19, x19, x14\n" - "tbz %x[n_channels], #1, 48f\n" - "ld1 { v12.s }[0], [x19], #0x4\n" - "tbz %x[n_channels], #0, 49f\n" - "ld1 { v12.h }[2], [x19], #0x2\n" - "b 49f\n" - "48:" // Oddments: Load input (5, 1): Bit 1: Unset - "ld1 { v12.h }[0], [x19], #0x2\n" - "49:" // Oddments: Load input (5, 1): Bit 1: End - "fmla v28.8h, v0.8h, v12.8h\n" - "ldr h1, [x15, #0x2c]\n" - "fmla v31.8h, v1.8h, v13.8h\n" - "ldr x26, [x16, #0x100]\n" - "add x26, x26, x14\n" - "fmla v30.8h, v1.8h, v5.8h\n" + "46:" // Oddments: Load input (3, 1): Bit 2: Unset: Bit 1: Unset + "ld1 { v6.h }[0], [x19], #0x2\n" + "47:" // Oddments: Load input (3, 1): Bit 2: End + "ldr q1, [x16, #0x0]\n" + "ldr x19, [x11, #0xa0]\n" + "fmla v31.8h, v0.8h, v6.8h\n" + "fmla v28.8h, v1.8h, v11.8h\n" "fmla v29.8h, v1.8h, v12.8h\n" + "fmla v30.8h, v1.8h, v6.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 49f\n" + "ld1 { v10.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 48f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v10.h }[6], [x19], #0x2\n" + "b 51f\n" + "48:" // Oddments: Load input (3, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 51f\n" + "ld1 { v10.h }[4], [x19], #0x2\n" + "b 51f\n" + "49:" // Oddments: Load input (3, 2): Bit 2: Unset "tbz %x[n_channels], #1, 50f\n" - "ld1 { v9.s }[0], [x26], #0x4\n" + "ld1 { v10.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 51f\n" - "ld1 { v9.h }[2], [x26], #0x2\n" + "ld1 { v10.h }[2], [x19], #0x2\n" "b 51f\n" - "50:" // Oddments: Load input (5, 2): Bit 1: Unset - "ld1 { v9.h }[0], [x26], #0x2\n" - "51:" // Oddments: Load input (5, 2): Bit 1: End - "fmla v28.8h, v1.8h, v9.8h\n" - "ldr h2, [x15, #0x2e]\n" - "fmla v31.8h, v2.8h, v5.8h\n" - "ldr x25, [x16, #0x108]\n" - "add x25, x25, x14\n" - "fmla v30.8h, v2.8h, v6.8h\n" + "50:" // Oddments: Load input (3, 2): Bit 2: Unset: Bit 1: Unset + "ld1 { v10.h }[0], [x19], #0x2\n" + "51:" // Oddments: Load input (3, 2): Bit 2: End + "ldr q2, [x16, #0x0]\n" + "ldr x19, [x11, #0xa8]\n" + "fmla v31.8h, v1.8h, v10.8h\n" + "fmla v28.8h, v2.8h, v12.8h\n" "fmla v29.8h, v2.8h, v9.8h\n" + "fmla v30.8h, v2.8h, v10.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 53f\n" + "ld1 { v11.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 52f\n" - "ld1 { v11.s }[0], [x25], #0x4\n" - "tbz %x[n_channels], #0, 53f\n" - "ld1 { v11.h }[2], [x25], #0x2\n" - "b 53f\n" - "52:" // Oddments: Load input (5, 3): Bit 1: Unset - "ld1 { v11.h }[0], [x25], #0x2\n" - "53:" // Oddments: Load input (5, 3): Bit 1: End - "fmla v28.8h, v2.8h, v11.8h\n" - "ldr h3, [x15, #0x30]\n" - "fmla v31.8h, v3.8h, v6.8h\n" - "ldr x24, [x16, #0x110]\n" - "add x24, x24, x14\n" - "fmla v30.8h, v3.8h, v8.8h\n" - "fmla v29.8h, v3.8h, v11.8h\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 55f\n" + "ld1 { v11.h }[6], [x19], #0x2\n" + "b 55f\n" + "52:" // Oddments: Load input (3, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 55f\n" + "ld1 { v11.h }[4], [x19], #0x2\n" + "b 55f\n" + "53:" // Oddments: Load input (3, 3): Bit 2: Unset "tbz %x[n_channels], #1, 54f\n" - "ld1 { v12.s }[0], [x24], #0x4\n" + "ld1 { v11.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 55f\n" - "ld1 { v12.h }[2], [x24], #0x2\n" + "ld1 { v11.h }[2], [x19], #0x2\n" "b 55f\n" - "54:" // Oddments: Load input (5, 4): Bit 1: Unset - "ld1 { v12.h }[0], [x24], #0x2\n" - "55:" // Oddments: Load input (5, 4): Bit 1: End - "fmla v28.8h, v3.8h, v12.8h\n" - "ldr h4, [x15, #0x32]\n" - "fmla v31.8h, v4.8h, v8.8h\n" - "ldr x23, [x16, #0x118]\n" - "add x23, x23, x14\n" - "fmla v30.8h, v4.8h, v10.8h\n" - "fmla v29.8h, v4.8h, v12.8h\n" + "54:" // Oddments: Load input (3, 3): Bit 2: Unset: Bit 1: Unset + "ld1 { v11.h }[0], [x19], #0x2\n" + "55:" // Oddments: Load input (3, 3): Bit 2: End + "ldr q3, [x16, #0x0]\n" + "ldr x19, [x11, #0xb0]\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v9.8h\n" + "fmla v29.8h, v3.8h, v13.8h\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 57f\n" + "ld1 { v12.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #1, 56f\n" - "ld1 { v9.s }[0], [x23], #0x4\n" - "tbz %x[n_channels], #0, 57f\n" - "ld1 { v9.h }[2], [x23], #0x2\n" - "b 57f\n" - "56:" // Oddments: Load input (5, 5): Bit 1: Unset - "ld1 { v9.h }[0], [x23], #0x2\n" - "57:" // Oddments: Load input (5, 5): Bit 1: End - "fmla v28.8h, v4.8h, v9.8h\n" - "fmax v31.8h, v31.8h, v18.8h\n" - "fmax v30.8h, v30.8h, v18.8h\n" - "fmax v29.8h, v29.8h, v18.8h\n" - "fmin v31.8h, v31.8h, v17.8h\n" - "fmin v30.8h, v30.8h, v17.8h\n" - "fmin v29.8h, v29.8h, v17.8h\n" - "fmax v28.8h, v28.8h, v18.8h\n" - "fmin v28.8h, v28.8h, v17.8h\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 59f\n" + "ld1 { v12.h }[6], [x19], #0x2\n" + "b 59f\n" + "56:" // Oddments: Load input (3, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 59f\n" + "ld1 { v12.h }[4], [x19], #0x2\n" + "b 59f\n" + "57:" // Oddments: Load input (3, 4): Bit 2: Unset "tbz %x[n_channels], #1, 58f\n" - "st1 { v31.s }[0], [x13], #0x4\n" - "st1 { v30.s }[0], [x12], #0x4\n" - "st1 { v29.s }[0], [x10], #0x4\n" - "st1 { v28.s }[0], [x9], #0x4\n" + "ld1 { v12.s }[0], [x19], #0x4\n" "tbz %x[n_channels], #0, 59f\n" - "st1 { v31.h }[2], [x13], #0x2\n" - "st1 { v30.h }[2], [x12], #0x2\n" - "st1 { v29.h }[2], [x10], #0x2\n" - "st1 { v28.h }[2], [x9], #0x2\n" + "ld1 { v12.h }[2], [x19], #0x2\n" "b 59f\n" - "58:" // Oddments: Store: Bit 1: Unset - "st1 { v31.h }[0], [x13], #0x2\n" - "st1 { v30.h }[0], [x12], #0x2\n" - "st1 { v29.h }[0], [x10], #0x2\n" - "st1 { v28.h }[0], [x9], #0x2\n" - "59:" // Oddments: Store: Bit 1: End + "58:" // Oddments: Load input (3, 4): Bit 2: Unset: Bit 1: Unset + "ld1 { v12.h }[0], [x19], #0x2\n" + "59:" // Oddments: Load input (3, 4): Bit 2: End + "ldr q4, [x16, #0x0]\n" + "ldr x19, [x11, #0xb8]\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "fmla v28.8h, v4.8h, v13.8h\n" + "fmla v29.8h, v4.8h, v8.8h\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 61f\n" + "ld1 { v14.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 60f\n" + "ld1 { v14.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 63f\n" + "ld1 { v14.h }[6], [x19], #0x2\n" + "b 63f\n" + "60:" // Oddments: Load input (3, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 63f\n" + "ld1 { v14.h }[4], [x19], #0x2\n" + "b 63f\n" + "61:" // Oddments: Load input (3, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 62f\n" + "ld1 { v14.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 63f\n" + "ld1 { v14.h }[2], [x19], #0x2\n" + "b 63f\n" + "62:" // Oddments: Load input (3, 5): Bit 2: Unset: Bit 1: Unset + "ld1 { v14.h }[0], [x19], #0x2\n" + "63:" // Oddments: Load input (3, 5): Bit 2: End + "ldr q0, [x16, #0x0]\n" + "ldr x19, [x11, #0xc0]\n" + "fmla v31.8h, v4.8h, v14.8h\n" + "fmla v28.8h, v0.8h, v5.8h\n" + "fmla v29.8h, v0.8h, v6.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 65f\n" + "ld1 { v9.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 64f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 67f\n" + "ld1 { v9.h }[6], [x19], #0x2\n" + "b 67f\n" + "64:" // Oddments: Load input (4, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 67f\n" + "ld1 { v9.h }[4], [x19], #0x2\n" + "b 67f\n" + "65:" // Oddments: Load input (4, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 66f\n" + "ld1 { v9.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 67f\n" + "ld1 { v9.h }[2], [x19], #0x2\n" + "b 67f\n" + "66:" // Oddments: Load input (4, 0): Bit 2: Unset: Bit 1: Unset + "ld1 { v9.h }[0], [x19], #0x2\n" + "67:" // Oddments: Load input (4, 0): Bit 2: End + "ldr x19, [x11, #0xc8]\n" + "fmla v30.8h, v0.8h, v9.8h\n" + "add x19, x19, x10\n" + "tbz %x[n_channels], #2, 69f\n" + "ld1 { v13.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 68f\n" + "ld1 { v13.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 71f\n" + "ld1 { v13.h }[6], [x19], #0x2\n" + "b 71f\n" + "68:" // Oddments: Load input (4, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 71f\n" + "ld1 { v13.h }[4], [x19], #0x2\n" + "b 71f\n" + "69:" // Oddments: Load input (4, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 70f\n" + "ld1 { v13.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 71f\n" + "ld1 { v13.h }[2], [x19], #0x2\n" + "b 71f\n" + "70:" // Oddments: Load input (4, 1): Bit 2: Unset: Bit 1: Unset + "ld1 { v13.h }[0], [x19], #0x2\n" + "71:" // Oddments: Load input (4, 1): Bit 2: End + "ldr q1, [x16, #0x0]\n" + "ldr x19, [x11, #0xd0]\n" + "fmla v31.8h, v0.8h, v13.8h\n" + "fmla v28.8h, v1.8h, v6.8h\n" + "fmla v29.8h, v1.8h, v10.8h\n" + "fmla v30.8h, v1.8h, v13.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 73f\n" + "ld1 { v5.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 72f\n" + "ld1 { v5.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 75f\n" + "ld1 { v5.h }[6], [x19], #0x2\n" + "b 75f\n" + "72:" // Oddments: Load input (4, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 75f\n" + "ld1 { v5.h }[4], [x19], #0x2\n" + "b 75f\n" + "73:" // Oddments: Load input (4, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 74f\n" + "ld1 { v5.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 75f\n" + "ld1 { v5.h }[2], [x19], #0x2\n" + "b 75f\n" + "74:" // Oddments: Load input (4, 2): Bit 2: Unset: Bit 1: Unset + "ld1 { v5.h }[0], [x19], #0x2\n" + "75:" // Oddments: Load input (4, 2): Bit 2: End + "ldr q2, [x16, #0x0]\n" + "ldr x19, [x11, #0xd8]\n" + "fmla v31.8h, v1.8h, v5.8h\n" + "fmla v28.8h, v2.8h, v10.8h\n" + "fmla v29.8h, v2.8h, v11.8h\n" + "fmla v30.8h, v2.8h, v5.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 77f\n" + "ld1 { v6.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 76f\n" + "ld1 { v6.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 79f\n" + "ld1 { v6.h }[6], [x19], #0x2\n" + "b 79f\n" + "76:" // Oddments: Load input (4, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 79f\n" + "ld1 { v6.h }[4], [x19], #0x2\n" + "b 79f\n" + "77:" // Oddments: Load input (4, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 78f\n" + "ld1 { v6.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 79f\n" + "ld1 { v6.h }[2], [x19], #0x2\n" + "b 79f\n" + "78:" // Oddments: Load input (4, 3): Bit 2: Unset: Bit 1: Unset + "ld1 { v6.h }[0], [x19], #0x2\n" + "79:" // Oddments: Load input (4, 3): Bit 2: End + "ldr q3, [x16, #0x0]\n" + "ldr x19, [x11, #0xe0]\n" + "fmla v31.8h, v2.8h, v6.8h\n" + "fmla v28.8h, v3.8h, v11.8h\n" + "fmla v29.8h, v3.8h, v12.8h\n" + "fmla v30.8h, v3.8h, v6.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 81f\n" + "ld1 { v8.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 80f\n" + "ld1 { v8.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 83f\n" + "ld1 { v8.h }[6], [x19], #0x2\n" + "b 83f\n" + "80:" // Oddments: Load input (4, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 83f\n" + "ld1 { v8.h }[4], [x19], #0x2\n" + "b 83f\n" + "81:" // Oddments: Load input (4, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 82f\n" + "ld1 { v8.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 83f\n" + "ld1 { v8.h }[2], [x19], #0x2\n" + "b 83f\n" + "82:" // Oddments: Load input (4, 4): Bit 2: Unset: Bit 1: Unset + "ld1 { v8.h }[0], [x19], #0x2\n" + "83:" // Oddments: Load input (4, 4): Bit 2: End + "ldr q4, [x16, #0x0]\n" + "ldr x19, [x11, #0xe8]\n" + "fmla v31.8h, v3.8h, v8.8h\n" + "fmla v28.8h, v4.8h, v12.8h\n" + "fmla v29.8h, v4.8h, v14.8h\n" + "fmla v30.8h, v4.8h, v8.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 85f\n" + "ld1 { v10.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 84f\n" + "ld1 { v10.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 87f\n" + "ld1 { v10.h }[6], [x19], #0x2\n" + "b 87f\n" + "84:" // Oddments: Load input (4, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 87f\n" + "ld1 { v10.h }[4], [x19], #0x2\n" + "b 87f\n" + "85:" // Oddments: Load input (4, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 86f\n" + "ld1 { v10.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 87f\n" + "ld1 { v10.h }[2], [x19], #0x2\n" + "b 87f\n" + "86:" // Oddments: Load input (4, 5): Bit 2: Unset: Bit 1: Unset + "ld1 { v10.h }[0], [x19], #0x2\n" + "87:" // Oddments: Load input (4, 5): Bit 2: End + "ldr q0, [x16, #0x0]\n" + "ldr x19, [x11, #0xf0]\n" + "fmla v31.8h, v4.8h, v10.8h\n" + "fmla v28.8h, v0.8h, v9.8h\n" + "fmla v29.8h, v0.8h, v13.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 89f\n" + "ld1 { v11.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 88f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 91f\n" + "ld1 { v11.h }[6], [x19], #0x2\n" + "b 91f\n" + "88:" // Oddments: Load input (5, 0): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 91f\n" + "ld1 { v11.h }[4], [x19], #0x2\n" + "b 91f\n" + "89:" // Oddments: Load input (5, 0): Bit 2: Unset + "tbz %x[n_channels], #1, 90f\n" + "ld1 { v11.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 91f\n" + "ld1 { v11.h }[2], [x19], #0x2\n" + "b 91f\n" + "90:" // Oddments: Load input (5, 0): Bit 2: Unset: Bit 1: Unset + "ld1 { v11.h }[0], [x19], #0x2\n" + "91:" // Oddments: Load input (5, 0): Bit 2: End + "ldr x19, [x11, #0xf8]\n" + "fmla v30.8h, v0.8h, v11.8h\n" + "add x19, x19, x10\n" + "tbz %x[n_channels], #2, 93f\n" + "ld1 { v12.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 92f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 95f\n" + "ld1 { v12.h }[6], [x19], #0x2\n" + "b 95f\n" + "92:" // Oddments: Load input (5, 1): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 95f\n" + "ld1 { v12.h }[4], [x19], #0x2\n" + "b 95f\n" + "93:" // Oddments: Load input (5, 1): Bit 2: Unset + "tbz %x[n_channels], #1, 94f\n" + "ld1 { v12.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 95f\n" + "ld1 { v12.h }[2], [x19], #0x2\n" + "b 95f\n" + "94:" // Oddments: Load input (5, 1): Bit 2: Unset: Bit 1: Unset + "ld1 { v12.h }[0], [x19], #0x2\n" + "95:" // Oddments: Load input (5, 1): Bit 2: End + "ldr q1, [x16, #0x0]\n" + "ldr x19, [x11, #0x100]\n" + "fmla v31.8h, v0.8h, v12.8h\n" + "fmla v28.8h, v1.8h, v13.8h\n" + "fmla v29.8h, v1.8h, v5.8h\n" + "fmla v30.8h, v1.8h, v12.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 97f\n" + "ld1 { v9.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 96f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 99f\n" + "ld1 { v9.h }[6], [x19], #0x2\n" + "b 99f\n" + "96:" // Oddments: Load input (5, 2): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 99f\n" + "ld1 { v9.h }[4], [x19], #0x2\n" + "b 99f\n" + "97:" // Oddments: Load input (5, 2): Bit 2: Unset + "tbz %x[n_channels], #1, 98f\n" + "ld1 { v9.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 99f\n" + "ld1 { v9.h }[2], [x19], #0x2\n" + "b 99f\n" + "98:" // Oddments: Load input (5, 2): Bit 2: Unset: Bit 1: Unset + "ld1 { v9.h }[0], [x19], #0x2\n" + "99:" // Oddments: Load input (5, 2): Bit 2: End + "ldr q2, [x16, #0x0]\n" + "ldr x19, [x11, #0x108]\n" + "fmla v31.8h, v1.8h, v9.8h\n" + "fmla v28.8h, v2.8h, v5.8h\n" + "fmla v29.8h, v2.8h, v6.8h\n" + "fmla v30.8h, v2.8h, v9.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 101f\n" + "ld1 { v11.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 100f\n" + "ld1 { v11.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 103f\n" + "ld1 { v11.h }[6], [x19], #0x2\n" + "b 103f\n" + "100:" // Oddments: Load input (5, 3): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 103f\n" + "ld1 { v11.h }[4], [x19], #0x2\n" + "b 103f\n" + "101:" // Oddments: Load input (5, 3): Bit 2: Unset + "tbz %x[n_channels], #1, 102f\n" + "ld1 { v11.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 103f\n" + "ld1 { v11.h }[2], [x19], #0x2\n" + "b 103f\n" + "102:" // Oddments: Load input (5, 3): Bit 2: Unset: Bit 1: Unset + "ld1 { v11.h }[0], [x19], #0x2\n" + "103:" // Oddments: Load input (5, 3): Bit 2: End + "ldr q3, [x16, #0x0]\n" + "ldr x19, [x11, #0x110]\n" + "fmla v31.8h, v2.8h, v11.8h\n" + "fmla v28.8h, v3.8h, v6.8h\n" + "fmla v29.8h, v3.8h, v8.8h\n" + "fmla v30.8h, v3.8h, v11.8h\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" + "tbz %x[n_channels], #2, 105f\n" + "ld1 { v12.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 104f\n" + "ld1 { v12.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 107f\n" + "ld1 { v12.h }[6], [x19], #0x2\n" + "b 107f\n" + "104:" // Oddments: Load input (5, 4): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 107f\n" + "ld1 { v12.h }[4], [x19], #0x2\n" + "b 107f\n" + "105:" // Oddments: Load input (5, 4): Bit 2: Unset + "tbz %x[n_channels], #1, 106f\n" + "ld1 { v12.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 107f\n" + "ld1 { v12.h }[2], [x19], #0x2\n" + "b 107f\n" + "106:" // Oddments: Load input (5, 4): Bit 2: Unset: Bit 1: Unset + "ld1 { v12.h }[0], [x19], #0x2\n" + "107:" // Oddments: Load input (5, 4): Bit 2: End + "ldr q4, [x16, #0x0]\n" + "ldr x19, [x11, #0x118]\n" + "fmla v31.8h, v3.8h, v12.8h\n" + "fmla v28.8h, v4.8h, v8.8h\n" + "fmla v29.8h, v4.8h, v10.8h\n" + "fmla v30.8h, v4.8h, v12.8h\n" + "add x19, x19, x10\n" + "tbz %x[n_channels], #2, 109f\n" + "ld1 { v9.d }[0], [x19], #0x8\n" + "tbz %x[n_channels], #1, 108f\n" + "ld1 { v9.s }[2], [x19], #0x4\n" + "tbz %x[n_channels], #0, 111f\n" + "ld1 { v9.h }[6], [x19], #0x2\n" + "b 111f\n" + "108:" // Oddments: Load input (5, 5): Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 111f\n" + "ld1 { v9.h }[4], [x19], #0x2\n" + "b 111f\n" + "109:" // Oddments: Load input (5, 5): Bit 2: Unset + "tbz %x[n_channels], #1, 110f\n" + "ld1 { v9.s }[0], [x19], #0x4\n" + "tbz %x[n_channels], #0, 111f\n" + "ld1 { v9.h }[2], [x19], #0x2\n" + "b 111f\n" + "110:" // Oddments: Load input (5, 5): Bit 2: Unset: Bit 1: Unset + "ld1 { v9.h }[0], [x19], #0x2\n" + "111:" // Oddments: Load input (5, 5): Bit 2: End + "fmla v31.8h, v4.8h, v9.8h\n" + "fmax v28.8h, v28.8h, v18.8h\n" + "fmax v29.8h, v29.8h, v18.8h\n" + "fmax v30.8h, v30.8h, v18.8h\n" + "fmax v31.8h, v31.8h, v18.8h\n" + "fmin v28.8h, v28.8h, v17.8h\n" + "fmin v29.8h, v29.8h, v17.8h\n" + "fmin v30.8h, v30.8h, v17.8h\n" + "fmin v31.8h, v31.8h, v17.8h\n" + "tbz %x[n_channels], #2, 113f\n" + "st1 { v28.d }[0], [x15], #0x8\n" + "st1 { v29.d }[0], [x14], #0x8\n" + "st1 { v30.d }[0], [x13], #0x8\n" + "st1 { v31.d }[0], [x12], #0x8\n" + "tbz %x[n_channels], #1, 112f\n" + "st1 { v28.s }[2], [x15], #0x4\n" + "st1 { v29.s }[2], [x14], #0x4\n" + "st1 { v30.s }[2], [x13], #0x4\n" + "st1 { v31.s }[2], [x12], #0x4\n" + "tbz %x[n_channels], #0, 115f\n" + "st1 { v28.h }[6], [x15], #0x2\n" + "st1 { v29.h }[6], [x14], #0x2\n" + "st1 { v30.h }[6], [x13], #0x2\n" + "st1 { v31.h }[6], [x12], #0x2\n" + "b 115f\n" + "112:" // Oddments: Store: Bit 2: Bit 1: Unset + "tbz %x[n_channels], #0, 115f\n" + "st1 { v28.h }[4], [x15], #0x2\n" + "st1 { v29.h }[4], [x14], #0x2\n" + "st1 { v30.h }[4], [x13], #0x2\n" + "st1 { v31.h }[4], [x12], #0x2\n" + "b 115f\n" + "113:" // Oddments: Store: Bit 2: Unset + "tbz %x[n_channels], #1, 114f\n" + "st1 { v28.s }[0], [x15], #0x4\n" + "st1 { v29.s }[0], [x14], #0x4\n" + "st1 { v30.s }[0], [x13], #0x4\n" + "st1 { v31.s }[0], [x12], #0x4\n" + "tbz %x[n_channels], #0, 115f\n" + "st1 { v28.h }[2], [x15], #0x2\n" + "st1 { v29.h }[2], [x14], #0x2\n" + "st1 { v30.h }[2], [x13], #0x2\n" + "st1 { v31.h }[2], [x12], #0x2\n" + "b 115f\n" + "114:" // Oddments: Store: Bit 2: Unset: Bit 1: Unset + "st1 { v28.h }[0], [x15], #0x2\n" + "st1 { v29.h }[0], [x14], #0x2\n" + "st1 { v30.h }[0], [x13], #0x2\n" + "st1 { v31.h }[0], [x12], #0x2\n" + "115:" // Oddments: Store: Bit 2: End - "60:" // End + "116:" // End : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp index 170eb2267b..b74a3c9b7c 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp @@ -85,445 +85,445 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( ); __asm__ __volatile__( - "mov x28, #0x0\n" - "mov x27, #0x0\n" + "mov x26, #0x0\n" + "mov x25, #0x0\n" "1:" // Tile loop - "str x28, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "mov x26, #0x2\n" - "str x27, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "mov x25, #0x2\n" - "ldr x3, [%x[params_struct], %[offsetof_args_params]]\n" - "add x24, %x[params_struct], %[offsetof_args_min]\n" - "ldr x23, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" - "add x21, %x[params_struct], %[offsetof_args_max]\n" - "ldr x4, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" - "mov x22, #0x0\n" + "str x26, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "mov x22, #0x2\n" + "mov x21, #0x2\n" + "str x25, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x24, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" + "ldr x3, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" + "mul x20, x26, x24\n" // offset = tile_i * ld_input_row + "ldr x23, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" + "madd x20, x25, x3, x20\n" // offset += tile_j * ld_input_col + "ldr x4, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" + "lsl x3, x3, #0x2\n" + "mul x19, x26, x23\n" // offset = tile_i * ld_output_row "ldr x5, [%x[params_struct], %[offsetof_args_inptr]]\n" - "mul x19, x28, x23\n" // offset = tile_i * ld_input_row - "ldr x20, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" - "madd x19, x27, x4, x19\n" // offset += tile_j * ld_input_col - "ldr x6, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" - "mul x19, x19, x26\n" // offset *= kernel_stride * output_size - "ldr x7, [%x[params_struct], %[offsetof_args_outptr]]\n" - "add x5, x5, x19, LSL #2\n" // inptr[0] += offset * sizeof(float) - "ld1r { v18.4s }, [x24]\n" - "add x8, x5, x23, LSL #2\n" - "ld1r { v17.4s }, [x21]\n" - "add x17, x8, x23, LSL #2\n" + "ldr x6, [%x[params_struct], %[offsetof_args_outptr]]\n" + "add x7, x3, x3\n" + "mul x20, x20, x22\n" // offset *= kernel_stride * output_size + "add x5, x5, x20, LSL #2\n" // inptr[0] += offset * sizeof(float) + "add x8, x5, x24, LSL #2\n" + "ldr x17, [%x[params_struct], %[offsetof_args_params]]\n" + "madd x19, x25, x4, x19\n" // offset += tile_j * ld_output_col + "add x16, x8, x24, LSL #2\n" + "mov x22, #0x10\n" // cntb _, ALL, #1 + "mul x19, x19, x21\n" // offset *= output_tile_size + "lsr x21, %x[n_channels], #0x2\n" + "add x15, x16, x24, LSL #2\n" + "add x14, x7, x3\n" + "add x13, x15, x24, LSL #2\n" + "add x12, x14, x3\n" + "add x6, x6, x19, LSL #2\n" // outptrs[0] += offset * sizeof(float) + "add x20, %x[params_struct], %[offsetof_args_min]\n" + "add x19, %x[params_struct], %[offsetof_args_max]\n" + "ld1r { v18.4s }, [x20]\n" + "ld1r { v17.4s }, [x19]\n" + "add x11, x13, x24, LSL #2\n" + "add x10, x12, x3\n" + "add x9, x6, x23, LSL #2\n" "lsl x4, x4, #0x2\n" - "add x16, x17, x23, LSL #2\n" - "add x15, x16, x23, LSL #2\n" - "add x14, x15, x23, LSL #2\n" - "add x13, x4, x4\n" - "add x12, x13, x4\n" - "add x11, x12, x4\n" - "add x10, x11, x4\n" - "mul x19, x28, x20\n" // offset = tile_i * ld_output_row - "madd x19, x27, x6, x19\n" // offset += tile_j * ld_output_col - "mul x19, x19, x25\n" // offset *= output_tile_size - "add x7, x7, x19, LSL #2\n" // outptrs[0] += offset * sizeof(float) - "add x9, x7, x20, LSL #2\n" - "lsl x6, x6, #0x2\n" - "mov x21, #0x10\n" // cntb _, ALL, #1 - "sub x20, XZR, x21\n" - "lsr x19, %x[n_channels], #0x2\n" - "cbz x19, 4f\n" - "ldr q16, [x3, #0x0]\n" - "ldr q0, [x3, #0x10]\n" - "cmp x21, x19, LSL #4\n" - "ldr q1, [x3, #0x20]\n" - "ldr q2, [x3, #0x30]\n" - "ldr q3, [x3, #0x40]\n" - "ldr q4, [x3, #0x50]\n" - "add x3, x3, #0x60\n" + "mov x20, #0x0\n" + "sub x19, XZR, x22\n" + "cbz x21, 4f\n" + "ldr q16, [x17, #0x0]\n" + "cmp x22, x21, LSL #4\n" + "ldr q0, [x17, #0x10]\n" + "ldr q1, [x17, #0x20]\n" + "ldr q2, [x17, #0x30]\n" + "ldr q3, [x17, #0x40]\n" + "ldr q4, [x17, #0x50]\n" "ld1 { v5.4s }, [x5]\n" - "ldr q6, [x5, x4]\n" + "add x17, x17, #0x60\n" + "ldr q6, [x5, x3]\n" "ld1 { v7.4s }, [x8]\n" - "ldr q8, [x8, x4]\n" - "ldr q9, [x5, x13]\n" - "ldr q13, [x8, x13]\n" - "ldr q11, [x5, x12]\n" - "ldr q12, [x5, x11]\n" + "ldr q8, [x8, x3]\n" + "ldr q9, [x5, x7]\n" + "ldr q13, [x8, x7]\n" + "ldr q11, [x5, x14]\n" + "ldr q12, [x5, x12]\n" "ldr q10, [x8, x10]\n" - "ld1 { v14.4s }, [x17]\n" + "ld1 { v14.4s }, [x16]\n" "bge 3f\n" "2:" // Tile loop: Channel loop - "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v5.4s\n" - "ldr q5, [x8, x12]\n" - "add x20, x20, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v6.4s\n" + "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v5.4s\n" + "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v6.4s\n" + "ldr q5, [x8, x14]\n" "add x22, x22, #0x10\n" - "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v7.4s\n" - "add x21, x21, #0x10\n" - "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v8.4s\n" - "ldr q0, [x3, #0x0]\n" - "cmp x21, x19, LSL #4\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "ldr q6, [x8, x11]\n" + "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v7.4s\n" + "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v8.4s\n" + "ldr q0, [x17, #0x0]\n" + "cmp x22, x21, LSL #4\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "fmla v29.4s, v1.4s, v9.4s\n" + "ldr q6, [x8, x12]\n" "add x8, x8, #0x10\n" - "fmla v30.4s, v1.4s, v9.4s\n" - "ldr q16, [x3, #0x140]\n" - "fmla v29.4s, v1.4s, v8.4s\n" - "fmla v28.4s, v1.4s, v13.4s\n" - "ldr q1, [x3, #0x10]\n" - "fmla v31.4s, v2.4s, v9.4s\n" + "fmla v30.4s, v1.4s, v8.4s\n" + "fmla v31.4s, v1.4s, v13.4s\n" + "ldr q1, [x17, #0x10]\n" + "add x19, x19, #0x10\n" + "fmla v28.4s, v2.4s, v9.4s\n" + "fmla v29.4s, v2.4s, v11.4s\n" "ldr q9, [x5, x10]\n" "add x5, x5, #0x10\n" - "fmla v30.4s, v2.4s, v11.4s\n" - "fmla v29.4s, v2.4s, v13.4s\n" - "fmla v28.4s, v2.4s, v5.4s\n" - "ldr q2, [x3, #0x20]\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "ldr q11, [x17, x4]\n" - "fmla v30.4s, v3.4s, v12.4s\n" - "fmla v29.4s, v3.4s, v5.4s\n" - "fmla v28.4s, v3.4s, v6.4s\n" - "ldr q3, [x3, #0x30]\n" - "fmla v31.4s, v4.4s, v12.4s\n" - "ldr q12, [x17, x13]\n" - "fmla v30.4s, v4.4s, v9.4s\n" - "ldr q9, [x17, x12]\n" - "fmla v29.4s, v4.4s, v6.4s\n" - "fmla v28.4s, v4.4s, v10.4s\n" - "ldr q4, [x3, #0x40]\n" - "fmla v31.4s, v0.4s, v7.4s\n" + "fmla v30.4s, v2.4s, v13.4s\n" + "fmla v31.4s, v2.4s, v5.4s\n" + "ldr q2, [x17, #0x20]\n" + "add x20, x20, #0x10\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "ldr q11, [x16, x3]\n" + "ldr q16, [x17, #0x140]\n" + "fmla v30.4s, v3.4s, v5.4s\n" + "fmla v31.4s, v3.4s, v6.4s\n" + "ldr q3, [x17, #0x30]\n" + "fmla v28.4s, v4.4s, v12.4s\n" + "fmla v29.4s, v4.4s, v9.4s\n" + "ldr q12, [x16, x7]\n" + "ldr q9, [x16, x14]\n" + "fmla v30.4s, v4.4s, v6.4s\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "ldr q4, [x17, #0x40]\n" + "fmla v28.4s, v0.4s, v7.4s\n" + "fmla v29.4s, v0.4s, v8.4s\n" "ld1 { v7.4s }, [x8]\n" - "fmla v30.4s, v0.4s, v8.4s\n" - "fmla v29.4s, v0.4s, v14.4s\n" - "fmla v28.4s, v0.4s, v11.4s\n" - "ldr q0, [x3, #0x50]\n" - "fmla v31.4s, v1.4s, v8.4s\n" - "ldr q8, [x17, x10]\n" - "fmla v30.4s, v1.4s, v13.4s\n" - "fmla v29.4s, v1.4s, v11.4s\n" - "fmla v28.4s, v1.4s, v12.4s\n" - "ldr q1, [x3, #0x60]\n" - "fmla v31.4s, v2.4s, v13.4s\n" - "ldr q13, [x17, x11]\n" - "add x17, x17, #0x10\n" - "fmla v30.4s, v2.4s, v5.4s\n" - "fmla v29.4s, v2.4s, v12.4s\n" - "fmla v28.4s, v2.4s, v9.4s\n" - "ldr q2, [x3, #0x70]\n" - "fmla v31.4s, v3.4s, v5.4s\n" - "ld1 { v5.4s }, [x16]\n" - "fmla v30.4s, v3.4s, v6.4s\n" - "fmla v29.4s, v3.4s, v9.4s\n" - "fmla v28.4s, v3.4s, v13.4s\n" - "ldr q3, [x3, #0x80]\n" - "fmla v31.4s, v4.4s, v6.4s\n" - "ldr q6, [x16, x4]\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "ldr q10, [x16, x13]\n" - "fmla v29.4s, v4.4s, v13.4s\n" - "fmla v28.4s, v4.4s, v8.4s\n" - "ldr q4, [x3, #0x90]\n" - "fmla v31.4s, v0.4s, v14.4s\n" - "ldr q14, [x16, x10]\n" - "fmla v30.4s, v0.4s, v11.4s\n" - "fmla v29.4s, v0.4s, v5.4s\n" - "fmla v28.4s, v0.4s, v6.4s\n" - "ldr q0, [x3, #0xa0]\n" - "fmla v31.4s, v1.4s, v11.4s\n" - "ldr q11, [x16, x12]\n" - "fmla v30.4s, v1.4s, v12.4s\n" - "fmla v29.4s, v1.4s, v6.4s\n" - "fmla v28.4s, v1.4s, v10.4s\n" - "ldr q1, [x3, #0xb0]\n" - "fmla v31.4s, v2.4s, v12.4s\n" - "ldr q12, [x16, x11]\n" - "add x16, x16, #0x10\n" - "fmla v30.4s, v2.4s, v9.4s\n" - "fmla v29.4s, v2.4s, v10.4s\n" - "fmla v28.4s, v2.4s, v11.4s\n" - "ldr q2, [x3, #0xc0]\n" - "fmla v31.4s, v3.4s, v9.4s\n" - "ld1 { v9.4s }, [x15]\n" - "fmla v30.4s, v3.4s, v13.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" - "fmla v28.4s, v3.4s, v12.4s\n" - "ldr q3, [x3, #0xd0]\n" - "fmla v31.4s, v4.4s, v13.4s\n" - "ldr q13, [x15, x4]\n" - "fmla v30.4s, v4.4s, v8.4s\n" - "ldr q8, [x15, x11]\n" - "fmla v29.4s, v4.4s, v12.4s\n" - "fmla v28.4s, v4.4s, v14.4s\n" - "ldr q4, [x3, #0xe0]\n" - "fmla v31.4s, v0.4s, v5.4s\n" - "ldr q5, [x15, x13]\n" - "fmla v30.4s, v0.4s, v6.4s\n" - "fmla v29.4s, v0.4s, v9.4s\n" - "fmla v28.4s, v0.4s, v13.4s\n" - "ldr q0, [x3, #0xf0]\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "ldr q6, [x15, x12]\n" - "fmla v30.4s, v1.4s, v10.4s\n" + "fmla v30.4s, v0.4s, v14.4s\n" + "fmla v31.4s, v0.4s, v11.4s\n" + "ldr q0, [x17, #0x50]\n" + "fmla v28.4s, v1.4s, v8.4s\n" "fmla v29.4s, v1.4s, v13.4s\n" - "fmla v28.4s, v1.4s, v5.4s\n" - "ldr q1, [x3, #0x100]\n" - "fmla v31.4s, v2.4s, v10.4s\n" - "ldr q10, [x15, x10]\n" - "add x15, x15, #0x10\n" - "fmla v30.4s, v2.4s, v11.4s\n" + "ldr q8, [x16, x10]\n" + "fmla v30.4s, v1.4s, v11.4s\n" + "fmla v31.4s, v1.4s, v12.4s\n" + "ldr q1, [x17, #0x60]\n" + "fmla v28.4s, v2.4s, v13.4s\n" "fmla v29.4s, v2.4s, v5.4s\n" - "fmla v28.4s, v2.4s, v6.4s\n" - "ldr q2, [x3, #0x110]\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "ld1 { v11.4s }, [x14]\n" - "fmla v30.4s, v3.4s, v12.4s\n" + "ldr q13, [x16, x12]\n" + "add x16, x16, #0x10\n" + "fmla v30.4s, v2.4s, v12.4s\n" + "fmla v31.4s, v2.4s, v9.4s\n" + "ldr q2, [x17, #0x70]\n" + "fmla v28.4s, v3.4s, v5.4s\n" "fmla v29.4s, v3.4s, v6.4s\n" - "fmla v28.4s, v3.4s, v8.4s\n" - "ldr q3, [x3, #0x120]\n" - "fmla v31.4s, v4.4s, v12.4s\n" - "ldr q12, [x14, x4]\n" - "fmla v30.4s, v4.4s, v14.4s\n" - "ld1 { v14.4s }, [x17]\n" - "fmla v29.4s, v4.4s, v8.4s\n" - "fmla v28.4s, v4.4s, v10.4s\n" - "ldr q4, [x3, #0x130]\n" - "fmla v31.4s, v0.4s, v9.4s\n" - "ldr q9, [x14, x13]\n" - "fmla v30.4s, v0.4s, v13.4s\n" + "ld1 { v5.4s }, [x15]\n" + "fmla v30.4s, v3.4s, v9.4s\n" + "fmla v31.4s, v3.4s, v13.4s\n" + "ldr q3, [x17, #0x80]\n" + "fmla v28.4s, v4.4s, v6.4s\n" + "fmla v29.4s, v4.4s, v10.4s\n" + "ldr q6, [x15, x3]\n" + "ldr q10, [x15, x7]\n" + "fmla v30.4s, v4.4s, v13.4s\n" + "fmla v31.4s, v4.4s, v8.4s\n" + "ldr q4, [x17, #0x90]\n" + "fmla v28.4s, v0.4s, v14.4s\n" "fmla v29.4s, v0.4s, v11.4s\n" - "ldr q11, [x14, x12]\n" - "fmla v28.4s, v0.4s, v12.4s\n" - "ldr q0, [x3, #0x150]\n" - "fmla v31.4s, v1.4s, v13.4s\n" - "ldr q13, [x8, x13]\n" - "fmla v30.4s, v1.4s, v5.4s\n" + "ldr q14, [x15, x10]\n" + "fmla v30.4s, v0.4s, v5.4s\n" + "fmla v31.4s, v0.4s, v6.4s\n" + "ldr q0, [x17, #0xa0]\n" + "fmla v28.4s, v1.4s, v11.4s\n" "fmla v29.4s, v1.4s, v12.4s\n" - "ldr q12, [x14, x11]\n" - "fmla v28.4s, v1.4s, v9.4s\n" - "ldr q1, [x3, #0x160]\n" - "fmla v31.4s, v2.4s, v5.4s\n" - "ld1 { v5.4s }, [x5]\n" - "fmla v30.4s, v2.4s, v6.4s\n" + "ldr q11, [x15, x14]\n" + "fmla v30.4s, v1.4s, v6.4s\n" + "fmla v31.4s, v1.4s, v10.4s\n" + "ldr q1, [x17, #0xb0]\n" + "fmla v28.4s, v2.4s, v12.4s\n" "fmla v29.4s, v2.4s, v9.4s\n" - "ldr q9, [x14, x10]\n" - "add x14, x14, #0x10\n" - "fmla v28.4s, v2.4s, v11.4s\n" - "ldr q2, [x3, #0x170]\n" - "fmla v31.4s, v3.4s, v6.4s\n" - "ldr q6, [x5, x4]\n" - "fmla v30.4s, v3.4s, v8.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" - "ldr q11, [x5, x12]\n" - "fmla v28.4s, v3.4s, v12.4s\n" - "ldr q3, [x3, #0x180]\n" - "fmla v31.4s, v4.4s, v8.4s\n" - "ldr q8, [x8, x4]\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "ldr q10, [x8, x10]\n" - "fmla v29.4s, v4.4s, v12.4s\n" - "ldr q12, [x5, x11]\n" - "fmla v28.4s, v4.4s, v9.4s\n" - "ldr q9, [x5, x13]\n" - "ldr q4, [x3, #0x190]\n" - "fmax v31.4s, v31.4s, v18.4s\n" - "add x3, x3, #0x1a0\n" - "fmax v30.4s, v30.4s, v18.4s\n" - "fmax v29.4s, v29.4s, v18.4s\n" - "fmin v31.4s, v31.4s, v17.4s\n" - "st1 { v31.4s }, [x7]\n" - "fmin v30.4s, v30.4s, v17.4s\n" - "fmin v29.4s, v29.4s, v17.4s\n" - "str q30, [x7, x6]\n" + "ldr q12, [x15, x12]\n" + "add x15, x15, #0x10\n" + "fmla v30.4s, v2.4s, v10.4s\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "ldr q2, [x17, #0xc0]\n" + "fmla v28.4s, v3.4s, v9.4s\n" + "fmla v29.4s, v3.4s, v13.4s\n" + "ld1 { v9.4s }, [x13]\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "ldr q3, [x17, #0xd0]\n" + "fmla v28.4s, v4.4s, v13.4s\n" + "fmla v29.4s, v4.4s, v8.4s\n" + "ldr q13, [x13, x3]\n" + "ldr q8, [x13, x12]\n" + "fmla v30.4s, v4.4s, v12.4s\n" + "fmla v31.4s, v4.4s, v14.4s\n" + "ldr q4, [x17, #0xe0]\n" + "fmla v28.4s, v0.4s, v5.4s\n" + "fmla v29.4s, v0.4s, v6.4s\n" + "ldr q5, [x13, x7]\n" + "fmla v30.4s, v0.4s, v9.4s\n" + "fmla v31.4s, v0.4s, v13.4s\n" + "ldr q0, [x17, #0xf0]\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "fmla v29.4s, v1.4s, v10.4s\n" + "ldr q6, [x13, x14]\n" + "fmla v30.4s, v1.4s, v13.4s\n" + "fmla v31.4s, v1.4s, v5.4s\n" + "ldr q1, [x17, #0x100]\n" + "fmla v28.4s, v2.4s, v10.4s\n" + "fmla v29.4s, v2.4s, v11.4s\n" + "ldr q10, [x13, x10]\n" + "add x13, x13, #0x10\n" + "fmla v30.4s, v2.4s, v5.4s\n" + "fmla v31.4s, v2.4s, v6.4s\n" + "ldr q2, [x17, #0x110]\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "ld1 { v11.4s }, [x11]\n" + "fmla v30.4s, v3.4s, v6.4s\n" + "fmla v31.4s, v3.4s, v8.4s\n" + "ldr q3, [x17, #0x120]\n" + "fmla v28.4s, v4.4s, v12.4s\n" + "fmla v29.4s, v4.4s, v14.4s\n" + "ldr q12, [x11, x3]\n" + "ld1 { v14.4s }, [x16]\n" + "fmla v30.4s, v4.4s, v8.4s\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "ldr q4, [x17, #0x130]\n" + "fmla v28.4s, v0.4s, v9.4s\n" + "fmla v29.4s, v0.4s, v13.4s\n" + "ldr q9, [x11, x7]\n" + "fmla v30.4s, v0.4s, v11.4s\n" + "fmla v31.4s, v0.4s, v12.4s\n" + "ldr q11, [x11, x14]\n" + "ldr q0, [x17, #0x150]\n" + "fmla v28.4s, v1.4s, v13.4s\n" + "fmla v29.4s, v1.4s, v5.4s\n" + "ldr q13, [x8, x7]\n" + "fmla v30.4s, v1.4s, v12.4s\n" + "fmla v31.4s, v1.4s, v9.4s\n" + "ldr q12, [x11, x12]\n" + "ldr q1, [x17, #0x160]\n" + "fmla v28.4s, v2.4s, v5.4s\n" + "fmla v29.4s, v2.4s, v6.4s\n" + "ld1 { v5.4s }, [x5]\n" + "fmla v30.4s, v2.4s, v9.4s\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "ldr q9, [x11, x10]\n" + "add x11, x11, #0x10\n" + "fmla v28.4s, v3.4s, v6.4s\n" + "fmla v29.4s, v3.4s, v8.4s\n" + "ldr q6, [x5, x3]\n" + "ldr q2, [x17, #0x170]\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "ldr q11, [x5, x14]\n" + "ldr q3, [x17, #0x180]\n" + "fmla v28.4s, v4.4s, v8.4s\n" + "fmla v29.4s, v4.4s, v10.4s\n" "fmax v28.4s, v28.4s, v18.4s\n" - "add x7, x7, #0x10\n" + "ldr q8, [x8, x3]\n" + "fmla v30.4s, v4.4s, v12.4s\n" + "fmla v31.4s, v4.4s, v9.4s\n" + "fmax v29.4s, v29.4s, v18.4s\n" + "ldr q9, [x5, x7]\n" + "fmax v30.4s, v30.4s, v18.4s\n" + "fmax v31.4s, v31.4s, v18.4s\n" + "ldr q12, [x5, x12]\n" + "ldr q10, [x8, x10]\n" "fmin v28.4s, v28.4s, v17.4s\n" - "st1 { v29.4s }, [x9]\n" - "str q28, [x9, x6]\n" + "fmin v29.4s, v29.4s, v17.4s\n" + "st1 { v28.4s }, [x6]\n" + "ldr q4, [x17, #0x190]\n" + "fmin v30.4s, v30.4s, v17.4s\n" + "fmin v31.4s, v31.4s, v17.4s\n" + "str q29, [x6, x4]\n" + "add x6, x6, #0x10\n" + "st1 { v30.4s }, [x9]\n" + "add x17, x17, #0x1a0\n" + "str q31, [x9, x4]\n" "add x9, x9, #0x10\n" "blt 2b\n" "3:" // Tile loop: Channel tail - "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v5.4s\n" - "ldr q5, [x8, x12]\n" - "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v6.4s\n" - "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v7.4s\n" - "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v8.4s\n" - "ldr q0, [x3, #0x0]\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "ldr q6, [x8, x11]\n" + "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v5.4s\n" + "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v6.4s\n" + "ldr q5, [x8, x14]\n" + "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v7.4s\n" + "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v8.4s\n" + "ldr q0, [x17, #0x0]\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "fmla v29.4s, v1.4s, v9.4s\n" + "ldr q6, [x8, x12]\n" "add x8, x8, #0x10\n" - "fmla v30.4s, v1.4s, v9.4s\n" - "fmla v29.4s, v1.4s, v8.4s\n" - "fmla v28.4s, v1.4s, v13.4s\n" - "ldr q1, [x3, #0x10]\n" - "fmla v31.4s, v2.4s, v9.4s\n" + "fmla v30.4s, v1.4s, v8.4s\n" + "fmla v31.4s, v1.4s, v13.4s\n" + "ldr q1, [x17, #0x10]\n" + "fmla v28.4s, v2.4s, v9.4s\n" + "fmla v29.4s, v2.4s, v11.4s\n" "ldr q9, [x5, x10]\n" "add x5, x5, #0x10\n" - "fmla v30.4s, v2.4s, v11.4s\n" - "fmla v29.4s, v2.4s, v13.4s\n" - "fmla v28.4s, v2.4s, v5.4s\n" - "ldr q2, [x3, #0x20]\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "ldr q11, [x17, x4]\n" - "fmla v30.4s, v3.4s, v12.4s\n" - "fmla v29.4s, v3.4s, v5.4s\n" - "fmla v28.4s, v3.4s, v6.4s\n" - "ldr q3, [x3, #0x30]\n" - "fmla v31.4s, v4.4s, v12.4s\n" - "ldr q12, [x17, x13]\n" - "fmla v30.4s, v4.4s, v9.4s\n" - "ldr q9, [x17, x12]\n" - "fmla v29.4s, v4.4s, v6.4s\n" - "fmla v28.4s, v4.4s, v10.4s\n" - "ldr q4, [x3, #0x40]\n" - "fmla v31.4s, v0.4s, v7.4s\n" - "fmla v30.4s, v0.4s, v8.4s\n" - "fmla v29.4s, v0.4s, v14.4s\n" - "fmla v28.4s, v0.4s, v11.4s\n" - "ldr q0, [x3, #0x50]\n" - "fmla v31.4s, v1.4s, v8.4s\n" - "ldr q8, [x17, x10]\n" - "fmla v30.4s, v1.4s, v13.4s\n" - "fmla v29.4s, v1.4s, v11.4s\n" - "fmla v28.4s, v1.4s, v12.4s\n" - "ldr q1, [x3, #0x60]\n" - "fmla v31.4s, v2.4s, v13.4s\n" - "ldr q13, [x17, x11]\n" - "add x17, x17, #0x10\n" - "fmla v30.4s, v2.4s, v5.4s\n" - "fmla v29.4s, v2.4s, v12.4s\n" - "fmla v28.4s, v2.4s, v9.4s\n" - "ldr q2, [x3, #0x70]\n" - "fmla v31.4s, v3.4s, v5.4s\n" - "ld1 { v5.4s }, [x16]\n" - "fmla v30.4s, v3.4s, v6.4s\n" - "fmla v29.4s, v3.4s, v9.4s\n" - "fmla v28.4s, v3.4s, v13.4s\n" - "ldr q3, [x3, #0x80]\n" - "fmla v31.4s, v4.4s, v6.4s\n" - "ldr q6, [x16, x4]\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "ldr q10, [x16, x13]\n" - "fmla v29.4s, v4.4s, v13.4s\n" - "fmla v28.4s, v4.4s, v8.4s\n" - "ldr q4, [x3, #0x90]\n" - "fmla v31.4s, v0.4s, v14.4s\n" - "ldr q14, [x16, x10]\n" - "fmla v30.4s, v0.4s, v11.4s\n" - "fmla v29.4s, v0.4s, v5.4s\n" - "fmla v28.4s, v0.4s, v6.4s\n" - "ldr q0, [x3, #0xa0]\n" - "fmla v31.4s, v1.4s, v11.4s\n" - "ldr q11, [x16, x12]\n" - "fmla v30.4s, v1.4s, v12.4s\n" - "fmla v29.4s, v1.4s, v6.4s\n" - "fmla v28.4s, v1.4s, v10.4s\n" - "ldr q1, [x3, #0xb0]\n" - "fmla v31.4s, v2.4s, v12.4s\n" - "ldr q12, [x16, x11]\n" - "add x16, x16, #0x10\n" - "fmla v30.4s, v2.4s, v9.4s\n" - "fmla v29.4s, v2.4s, v10.4s\n" - "fmla v28.4s, v2.4s, v11.4s\n" - "ldr q2, [x3, #0xc0]\n" - "fmla v31.4s, v3.4s, v9.4s\n" - "ld1 { v9.4s }, [x15]\n" - "fmla v30.4s, v3.4s, v13.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" - "fmla v28.4s, v3.4s, v12.4s\n" - "ldr q3, [x3, #0xd0]\n" - "fmla v31.4s, v4.4s, v13.4s\n" - "ldr q13, [x15, x4]\n" - "fmla v30.4s, v4.4s, v8.4s\n" - "ldr q8, [x15, x11]\n" - "fmla v29.4s, v4.4s, v12.4s\n" - "fmla v28.4s, v4.4s, v14.4s\n" - "ldr q4, [x3, #0xe0]\n" - "fmla v31.4s, v0.4s, v5.4s\n" - "ldr q5, [x15, x13]\n" - "fmla v30.4s, v0.4s, v6.4s\n" - "fmla v29.4s, v0.4s, v9.4s\n" - "fmla v28.4s, v0.4s, v13.4s\n" - "ldr q0, [x3, #0xf0]\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "ldr q6, [x15, x12]\n" - "fmla v30.4s, v1.4s, v10.4s\n" + "fmla v30.4s, v2.4s, v13.4s\n" + "fmla v31.4s, v2.4s, v5.4s\n" + "ldr q2, [x17, #0x20]\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "ldr q11, [x16, x3]\n" + "fmla v30.4s, v3.4s, v5.4s\n" + "fmla v31.4s, v3.4s, v6.4s\n" + "ldr q3, [x17, #0x30]\n" + "fmla v28.4s, v4.4s, v12.4s\n" + "fmla v29.4s, v4.4s, v9.4s\n" + "ldr q12, [x16, x7]\n" + "ldr q9, [x16, x14]\n" + "fmla v30.4s, v4.4s, v6.4s\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "ldr q4, [x17, #0x40]\n" + "fmla v28.4s, v0.4s, v7.4s\n" + "fmla v29.4s, v0.4s, v8.4s\n" + "fmla v30.4s, v0.4s, v14.4s\n" + "fmla v31.4s, v0.4s, v11.4s\n" + "ldr q0, [x17, #0x50]\n" + "fmla v28.4s, v1.4s, v8.4s\n" "fmla v29.4s, v1.4s, v13.4s\n" - "fmla v28.4s, v1.4s, v5.4s\n" - "ldr q1, [x3, #0x100]\n" - "fmla v31.4s, v2.4s, v10.4s\n" - "ldr q10, [x15, x10]\n" - "add x15, x15, #0x10\n" - "fmla v30.4s, v2.4s, v11.4s\n" + "ldr q8, [x16, x10]\n" + "fmla v30.4s, v1.4s, v11.4s\n" + "fmla v31.4s, v1.4s, v12.4s\n" + "ldr q1, [x17, #0x60]\n" + "fmla v28.4s, v2.4s, v13.4s\n" "fmla v29.4s, v2.4s, v5.4s\n" - "fmla v28.4s, v2.4s, v6.4s\n" - "ldr q2, [x3, #0x110]\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "ld1 { v11.4s }, [x14]\n" - "fmla v30.4s, v3.4s, v12.4s\n" + "ldr q13, [x16, x12]\n" + "add x16, x16, #0x10\n" + "fmla v30.4s, v2.4s, v12.4s\n" + "fmla v31.4s, v2.4s, v9.4s\n" + "ldr q2, [x17, #0x70]\n" + "fmla v28.4s, v3.4s, v5.4s\n" "fmla v29.4s, v3.4s, v6.4s\n" - "fmla v28.4s, v3.4s, v8.4s\n" - "ldr q3, [x3, #0x120]\n" - "fmla v31.4s, v4.4s, v12.4s\n" - "ldr q12, [x14, x4]\n" - "fmla v30.4s, v4.4s, v14.4s\n" - "fmla v29.4s, v4.4s, v8.4s\n" - "fmla v28.4s, v4.4s, v10.4s\n" - "ldr q4, [x3, #0x130]\n" - "add x3, x3, #0x140\n" - "fmla v31.4s, v0.4s, v9.4s\n" - "ldr q9, [x14, x13]\n" - "fmla v30.4s, v0.4s, v13.4s\n" + "ld1 { v5.4s }, [x15]\n" + "fmla v30.4s, v3.4s, v9.4s\n" + "fmla v31.4s, v3.4s, v13.4s\n" + "ldr q3, [x17, #0x80]\n" + "fmla v28.4s, v4.4s, v6.4s\n" + "fmla v29.4s, v4.4s, v10.4s\n" + "ldr q6, [x15, x3]\n" + "ldr q10, [x15, x7]\n" + "fmla v30.4s, v4.4s, v13.4s\n" + "fmla v31.4s, v4.4s, v8.4s\n" + "ldr q4, [x17, #0x90]\n" + "fmla v28.4s, v0.4s, v14.4s\n" "fmla v29.4s, v0.4s, v11.4s\n" - "ldr q11, [x14, x12]\n" - "fmla v28.4s, v0.4s, v12.4s\n" - "fmla v31.4s, v1.4s, v13.4s\n" - "fmla v30.4s, v1.4s, v5.4s\n" + "ldr q14, [x15, x10]\n" + "fmla v30.4s, v0.4s, v5.4s\n" + "fmla v31.4s, v0.4s, v6.4s\n" + "ldr q0, [x17, #0xa0]\n" + "fmla v28.4s, v1.4s, v11.4s\n" "fmla v29.4s, v1.4s, v12.4s\n" - "ldr q12, [x14, x11]\n" - "fmla v28.4s, v1.4s, v9.4s\n" - "fmla v31.4s, v2.4s, v5.4s\n" - "fmla v30.4s, v2.4s, v6.4s\n" + "ldr q11, [x15, x14]\n" + "fmla v30.4s, v1.4s, v6.4s\n" + "fmla v31.4s, v1.4s, v10.4s\n" + "ldr q1, [x17, #0xb0]\n" + "fmla v28.4s, v2.4s, v12.4s\n" "fmla v29.4s, v2.4s, v9.4s\n" - "ldr q9, [x14, x10]\n" - "add x14, x14, #0x10\n" - "fmla v28.4s, v2.4s, v11.4s\n" - "fmla v31.4s, v3.4s, v6.4s\n" - "fmla v30.4s, v3.4s, v8.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" - "fmla v28.4s, v3.4s, v12.4s\n" - "fmla v31.4s, v4.4s, v8.4s\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "fmla v29.4s, v4.4s, v12.4s\n" - "fmla v28.4s, v4.4s, v9.4s\n" - "fmax v31.4s, v31.4s, v18.4s\n" - "fmax v30.4s, v30.4s, v18.4s\n" - "fmax v29.4s, v29.4s, v18.4s\n" - "fmin v31.4s, v31.4s, v17.4s\n" - "st1 { v31.4s }, [x7]\n" - "fmin v30.4s, v30.4s, v17.4s\n" - "fmin v29.4s, v29.4s, v17.4s\n" - "str q30, [x7, x6]\n" + "ldr q12, [x15, x12]\n" + "add x15, x15, #0x10\n" + "fmla v30.4s, v2.4s, v10.4s\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "ldr q2, [x17, #0xc0]\n" + "fmla v28.4s, v3.4s, v9.4s\n" + "fmla v29.4s, v3.4s, v13.4s\n" + "ld1 { v9.4s }, [x13]\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "ldr q3, [x17, #0xd0]\n" + "fmla v28.4s, v4.4s, v13.4s\n" + "fmla v29.4s, v4.4s, v8.4s\n" + "ldr q13, [x13, x3]\n" + "ldr q8, [x13, x12]\n" + "fmla v30.4s, v4.4s, v12.4s\n" + "fmla v31.4s, v4.4s, v14.4s\n" + "ldr q4, [x17, #0xe0]\n" + "fmla v28.4s, v0.4s, v5.4s\n" + "fmla v29.4s, v0.4s, v6.4s\n" + "ldr q5, [x13, x7]\n" + "fmla v30.4s, v0.4s, v9.4s\n" + "fmla v31.4s, v0.4s, v13.4s\n" + "ldr q0, [x17, #0xf0]\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "fmla v29.4s, v1.4s, v10.4s\n" + "ldr q6, [x13, x14]\n" + "fmla v30.4s, v1.4s, v13.4s\n" + "fmla v31.4s, v1.4s, v5.4s\n" + "ldr q1, [x17, #0x100]\n" + "fmla v28.4s, v2.4s, v10.4s\n" + "fmla v29.4s, v2.4s, v11.4s\n" + "ldr q10, [x13, x10]\n" + "add x13, x13, #0x10\n" + "fmla v30.4s, v2.4s, v5.4s\n" + "fmla v31.4s, v2.4s, v6.4s\n" + "ldr q2, [x17, #0x110]\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "ld1 { v11.4s }, [x11]\n" + "fmla v30.4s, v3.4s, v6.4s\n" + "fmla v31.4s, v3.4s, v8.4s\n" + "ldr q3, [x17, #0x120]\n" + "fmla v28.4s, v4.4s, v12.4s\n" + "fmla v29.4s, v4.4s, v14.4s\n" + "ldr q12, [x11, x3]\n" + "fmla v30.4s, v4.4s, v8.4s\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "ldr q4, [x17, #0x130]\n" + "add x17, x17, #0x140\n" + "fmla v28.4s, v0.4s, v9.4s\n" + "fmla v29.4s, v0.4s, v13.4s\n" + "ldr q9, [x11, x7]\n" + "fmla v30.4s, v0.4s, v11.4s\n" + "fmla v31.4s, v0.4s, v12.4s\n" + "ldr q11, [x11, x14]\n" + "fmla v28.4s, v1.4s, v13.4s\n" + "fmla v29.4s, v1.4s, v5.4s\n" + "fmla v30.4s, v1.4s, v12.4s\n" + "fmla v31.4s, v1.4s, v9.4s\n" + "ldr q12, [x11, x12]\n" + "fmla v28.4s, v2.4s, v5.4s\n" + "fmla v29.4s, v2.4s, v6.4s\n" + "fmla v30.4s, v2.4s, v9.4s\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "ldr q9, [x11, x10]\n" + "add x11, x11, #0x10\n" + "fmla v28.4s, v3.4s, v6.4s\n" + "fmla v29.4s, v3.4s, v8.4s\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "fmla v28.4s, v4.4s, v8.4s\n" + "fmla v29.4s, v4.4s, v10.4s\n" "fmax v28.4s, v28.4s, v18.4s\n" - "add x7, x7, #0x10\n" + "fmla v30.4s, v4.4s, v12.4s\n" + "fmla v31.4s, v4.4s, v9.4s\n" + "fmax v29.4s, v29.4s, v18.4s\n" + "fmax v30.4s, v30.4s, v18.4s\n" + "fmax v31.4s, v31.4s, v18.4s\n" "fmin v28.4s, v28.4s, v17.4s\n" - "st1 { v29.4s }, [x9]\n" - "str q28, [x9, x6]\n" + "fmin v29.4s, v29.4s, v17.4s\n" + "st1 { v28.4s }, [x6]\n" + "fmin v30.4s, v30.4s, v17.4s\n" + "fmin v31.4s, v31.4s, v17.4s\n" + "str q29, [x6, x4]\n" + "add x6, x6, #0x10\n" + "st1 { v30.4s }, [x9]\n" + "str q31, [x9, x4]\n" "add x9, x9, #0x10\n" "4:" // Tile loop: Oddments "tst %x[n_channels], #0x3\n" "beq 61f\n" - "ldr q16, [x3, #0x0]\n" - "ldr q0, [x3, #0x10]\n" + "ldr q16, [x17, #0x0]\n" + "ldr q0, [x17, #0x10]\n" + "ldr q1, [x17, #0x20]\n" + "ldr q2, [x17, #0x30]\n" "add x28, x5, XZR\n" - "ldr q1, [x3, #0x20]\n" - "add x27, x5, x4\n" - "ldr q2, [x3, #0x30]\n" + "add x27, x5, x3\n" + "ldr q3, [x17, #0x40]\n" + "ldr q4, [x17, #0x50]\n" "add x26, x8, XZR\n" - "ldr q3, [x3, #0x40]\n" - "add x25, x8, x4\n" - "ldr q4, [x3, #0x50]\n" - "add x24, x5, x13\n" - "add x23, x8, x13\n" - "add x22, x5, x12\n" - "add x21, x5, x11\n" + "add x25, x8, x3\n" + "add x24, x5, x7\n" + "add x23, x8, x7\n" + "add x22, x5, x14\n" + "add x21, x5, x12\n" "add x20, x8, x10\n" - "add x19, x17, XZR\n" - "add x3, x3, #0x60\n" + "add x19, x16, XZR\n" + "add x17, x17, #0x60\n" "tbz %x[n_channels], #1, 5f\n" "ldr d5, [x28], #0x8\n" "ldr d6, [x27], #0x8\n" @@ -559,18 +559,18 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "ldr s10, [x20, #0x0]\n" "ldr s14, [x19, #0x0]\n" "6:" // Tile loop: Oddments: Load inputs: (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 1: End - "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v5.4s\n" - "add x19, x8, x12\n" - "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v6.4s\n" - "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v7.4s\n" - "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v8.4s\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "fmla v30.4s, v1.4s, v9.4s\n" - "fmla v29.4s, v1.4s, v8.4s\n" - "fmla v28.4s, v1.4s, v13.4s\n" - "fmla v31.4s, v2.4s, v9.4s\n" - "fmla v30.4s, v2.4s, v11.4s\n" - "fmla v29.4s, v2.4s, v13.4s\n" + "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v5.4s\n" + "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v6.4s\n" + "add x19, x8, x14\n" + "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v7.4s\n" + "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v8.4s\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "fmla v29.4s, v1.4s, v9.4s\n" + "fmla v30.4s, v1.4s, v8.4s\n" + "fmla v31.4s, v1.4s, v13.4s\n" + "fmla v28.4s, v2.4s, v9.4s\n" + "fmla v29.4s, v2.4s, v11.4s\n" + "fmla v30.4s, v2.4s, v13.4s\n" "tbz %x[n_channels], #1, 7f\n" "ldr d5, [x19], #0x8\n" "tbz %x[n_channels], #0, 8f\n" @@ -579,11 +579,11 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "7:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: Unset "ldr s5, [x19, #0x0]\n" "8:" // Tile loop: Oddments: Load inputs: (1, 3): Bit 1: End - "fmla v28.4s, v2.4s, v5.4s\n" - "add x19, x8, x11\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "fmla v30.4s, v3.4s, v12.4s\n" - "fmla v29.4s, v3.4s, v5.4s\n" + "fmla v31.4s, v2.4s, v5.4s\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "add x19, x8, x12\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "fmla v30.4s, v3.4s, v5.4s\n" "tbz %x[n_channels], #1, 9f\n" "ldr d6, [x19], #0x8\n" "tbz %x[n_channels], #0, 10f\n" @@ -592,9 +592,9 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "9:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 1: Unset "ldr s6, [x19, #0x0]\n" "10:" // Tile loop: Oddments: Load inputs: (1, 4): Bit 1: End - "fmla v28.4s, v3.4s, v6.4s\n" + "fmla v31.4s, v3.4s, v6.4s\n" + "fmla v28.4s, v4.4s, v12.4s\n" "add x19, x5, x10\n" - "fmla v31.4s, v4.4s, v12.4s\n" "tbz %x[n_channels], #1, 11f\n" "ldr d9, [x19], #0x8\n" "tbz %x[n_channels], #0, 12f\n" @@ -603,14 +603,15 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "11:" // Tile loop: Oddments: Load inputs: (0, 5): Bit 1: Unset "ldr s9, [x19, #0x0]\n" "12:" // Tile loop: Oddments: Load inputs: (0, 5): Bit 1: End - "fmla v30.4s, v4.4s, v9.4s\n" - "ldr s0, [x3, #0x18]\n" - "add x19, x17, x4\n" - "fmla v29.4s, v4.4s, v6.4s\n" - "fmla v28.4s, v4.4s, v10.4s\n" - "fmla v31.4s, v0.4s, v7.4s\n" - "fmla v30.4s, v0.4s, v8.4s\n" - "fmla v29.4s, v0.4s, v14.4s\n" + "fmla v29.4s, v4.4s, v9.4s\n" + "fmla v30.4s, v4.4s, v6.4s\n" + "ldr q0, [x17, #0x0]\n" + "add x19, x16, x3\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "fmla v28.4s, v0.4s, v7.4s\n" + "add x17, x17, #0x10\n" + "fmla v29.4s, v0.4s, v8.4s\n" + "fmla v30.4s, v0.4s, v14.4s\n" "tbz %x[n_channels], #1, 13f\n" "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #0, 14f\n" @@ -619,12 +620,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "13:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 1: Unset "ldr s11, [x19, #0x0]\n" "14:" // Tile loop: Oddments: Load inputs: (2, 1): Bit 1: End - "fmla v28.4s, v0.4s, v11.4s\n" - "ldr s1, [x3, #0x1c]\n" - "add x19, x17, x13\n" - "fmla v31.4s, v1.4s, v8.4s\n" - "fmla v30.4s, v1.4s, v13.4s\n" - "fmla v29.4s, v1.4s, v11.4s\n" + "ldr q1, [x17, #0x0]\n" + "fmla v31.4s, v0.4s, v11.4s\n" + "fmla v28.4s, v1.4s, v8.4s\n" + "add x19, x16, x7\n" + "fmla v29.4s, v1.4s, v13.4s\n" + "fmla v30.4s, v1.4s, v11.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 15f\n" "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #0, 16f\n" @@ -633,12 +635,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "15:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 1: Unset "ldr s12, [x19, #0x0]\n" "16:" // Tile loop: Oddments: Load inputs: (2, 2): Bit 1: End - "fmla v28.4s, v1.4s, v12.4s\n" - "ldr s2, [x3, #0x20]\n" - "add x19, x17, x12\n" - "fmla v31.4s, v2.4s, v13.4s\n" - "fmla v30.4s, v2.4s, v5.4s\n" - "fmla v29.4s, v2.4s, v12.4s\n" + "ldr q2, [x17, #0x0]\n" + "fmla v31.4s, v1.4s, v12.4s\n" + "fmla v28.4s, v2.4s, v13.4s\n" + "add x19, x16, x14\n" + "fmla v29.4s, v2.4s, v5.4s\n" + "fmla v30.4s, v2.4s, v12.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 17f\n" "ldr d9, [x19], #0x8\n" "tbz %x[n_channels], #0, 18f\n" @@ -647,12 +650,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "17:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 1: Unset "ldr s9, [x19, #0x0]\n" "18:" // Tile loop: Oddments: Load inputs: (2, 3): Bit 1: End - "fmla v28.4s, v2.4s, v9.4s\n" - "ldr s3, [x3, #0x24]\n" - "add x19, x17, x11\n" - "fmla v31.4s, v3.4s, v5.4s\n" - "fmla v30.4s, v3.4s, v6.4s\n" - "fmla v29.4s, v3.4s, v9.4s\n" + "ldr q3, [x17, #0x0]\n" + "fmla v31.4s, v2.4s, v9.4s\n" + "fmla v28.4s, v3.4s, v5.4s\n" + "add x19, x16, x12\n" + "fmla v29.4s, v3.4s, v6.4s\n" + "fmla v30.4s, v3.4s, v9.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 19f\n" "ldr d13, [x19], #0x8\n" "tbz %x[n_channels], #0, 20f\n" @@ -661,12 +665,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "19:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 1: Unset "ldr s13, [x19, #0x0]\n" "20:" // Tile loop: Oddments: Load inputs: (2, 4): Bit 1: End - "fmla v28.4s, v3.4s, v13.4s\n" - "ldr s4, [x3, #0x28]\n" - "add x19, x17, x10\n" - "fmla v31.4s, v4.4s, v6.4s\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "fmla v29.4s, v4.4s, v13.4s\n" + "ldr q4, [x17, #0x0]\n" + "fmla v31.4s, v3.4s, v13.4s\n" + "fmla v28.4s, v4.4s, v6.4s\n" + "add x19, x16, x10\n" + "fmla v29.4s, v4.4s, v10.4s\n" + "fmla v30.4s, v4.4s, v13.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 21f\n" "ldr d8, [x19], #0x8\n" "tbz %x[n_channels], #0, 22f\n" @@ -675,11 +680,12 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "21:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 1: Unset "ldr s8, [x19, #0x0]\n" "22:" // Tile loop: Oddments: Load inputs: (2, 5): Bit 1: End - "fmla v28.4s, v4.4s, v8.4s\n" - "ldr s0, [x3, #0x2c]\n" - "add x19, x16, XZR\n" - "fmla v31.4s, v0.4s, v14.4s\n" - "fmla v30.4s, v0.4s, v11.4s\n" + "ldr q0, [x17, #0x0]\n" + "fmla v31.4s, v4.4s, v8.4s\n" + "fmla v28.4s, v0.4s, v14.4s\n" + "add x19, x15, XZR\n" + "fmla v29.4s, v0.4s, v11.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 23f\n" "ldr d5, [x19], #0x8\n" "tbz %x[n_channels], #0, 24f\n" @@ -688,8 +694,8 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "23:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: Unset "ldr s5, [x19, #0x0]\n" "24:" // Tile loop: Oddments: Load inputs: (3, 0): Bit 1: End - "fmla v29.4s, v0.4s, v5.4s\n" - "add x19, x16, x4\n" + "fmla v30.4s, v0.4s, v5.4s\n" + "add x19, x15, x3\n" "tbz %x[n_channels], #1, 25f\n" "ldr d6, [x19], #0x8\n" "tbz %x[n_channels], #0, 26f\n" @@ -698,12 +704,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "25:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: Unset "ldr s6, [x19, #0x0]\n" "26:" // Tile loop: Oddments: Load inputs: (3, 1): Bit 1: End - "fmla v28.4s, v0.4s, v6.4s\n" - "ldr s1, [x3, #0x30]\n" - "add x19, x16, x13\n" - "fmla v31.4s, v1.4s, v11.4s\n" - "fmla v30.4s, v1.4s, v12.4s\n" - "fmla v29.4s, v1.4s, v6.4s\n" + "ldr q1, [x17, #0x0]\n" + "fmla v31.4s, v0.4s, v6.4s\n" + "fmla v28.4s, v1.4s, v11.4s\n" + "add x19, x15, x7\n" + "fmla v29.4s, v1.4s, v12.4s\n" + "fmla v30.4s, v1.4s, v6.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 27f\n" "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #0, 28f\n" @@ -712,12 +719,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "27:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: Unset "ldr s10, [x19, #0x0]\n" "28:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: End - "fmla v28.4s, v1.4s, v10.4s\n" - "ldr s2, [x3, #0x34]\n" - "add x19, x16, x12\n" - "fmla v31.4s, v2.4s, v12.4s\n" - "fmla v30.4s, v2.4s, v9.4s\n" - "fmla v29.4s, v2.4s, v10.4s\n" + "ldr q2, [x17, #0x0]\n" + "fmla v31.4s, v1.4s, v10.4s\n" + "fmla v28.4s, v2.4s, v12.4s\n" + "add x19, x15, x14\n" + "fmla v29.4s, v2.4s, v9.4s\n" + "fmla v30.4s, v2.4s, v10.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 29f\n" "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #0, 30f\n" @@ -726,12 +734,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "29:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: Unset "ldr s11, [x19, #0x0]\n" "30:" // Tile loop: Oddments: Load inputs: (3, 3): Bit 1: End - "fmla v28.4s, v2.4s, v11.4s\n" - "ldr s3, [x3, #0x38]\n" - "add x19, x16, x11\n" - "fmla v31.4s, v3.4s, v9.4s\n" - "fmla v30.4s, v3.4s, v13.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" + "ldr q3, [x17, #0x0]\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "fmla v28.4s, v3.4s, v9.4s\n" + "add x19, x15, x12\n" + "fmla v29.4s, v3.4s, v13.4s\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 31f\n" "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #0, 32f\n" @@ -740,12 +749,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "31:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 1: Unset "ldr s12, [x19, #0x0]\n" "32:" // Tile loop: Oddments: Load inputs: (3, 4): Bit 1: End - "fmla v28.4s, v3.4s, v12.4s\n" - "ldr s4, [x3, #0x3c]\n" - "add x19, x16, x10\n" - "fmla v31.4s, v4.4s, v13.4s\n" - "fmla v30.4s, v4.4s, v8.4s\n" - "fmla v29.4s, v4.4s, v12.4s\n" + "ldr q4, [x17, #0x0]\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "fmla v28.4s, v4.4s, v13.4s\n" + "add x19, x15, x10\n" + "fmla v29.4s, v4.4s, v8.4s\n" + "fmla v30.4s, v4.4s, v12.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 33f\n" "ldr d14, [x19], #0x8\n" "tbz %x[n_channels], #0, 34f\n" @@ -754,11 +764,12 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "33:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 1: Unset "ldr s14, [x19, #0x0]\n" "34:" // Tile loop: Oddments: Load inputs: (3, 5): Bit 1: End - "fmla v28.4s, v4.4s, v14.4s\n" - "ldr s0, [x3, #0x40]\n" - "add x19, x15, XZR\n" - "fmla v31.4s, v0.4s, v5.4s\n" - "fmla v30.4s, v0.4s, v6.4s\n" + "ldr q0, [x17, #0x0]\n" + "fmla v31.4s, v4.4s, v14.4s\n" + "fmla v28.4s, v0.4s, v5.4s\n" + "add x19, x13, XZR\n" + "fmla v29.4s, v0.4s, v6.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 35f\n" "ldr d9, [x19], #0x8\n" "tbz %x[n_channels], #0, 36f\n" @@ -767,8 +778,8 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "35:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 1: Unset "ldr s9, [x19, #0x0]\n" "36:" // Tile loop: Oddments: Load inputs: (4, 0): Bit 1: End - "fmla v29.4s, v0.4s, v9.4s\n" - "add x19, x15, x4\n" + "fmla v30.4s, v0.4s, v9.4s\n" + "add x19, x13, x3\n" "tbz %x[n_channels], #1, 37f\n" "ldr d13, [x19], #0x8\n" "tbz %x[n_channels], #0, 38f\n" @@ -777,12 +788,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "37:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 1: Unset "ldr s13, [x19, #0x0]\n" "38:" // Tile loop: Oddments: Load inputs: (4, 1): Bit 1: End - "fmla v28.4s, v0.4s, v13.4s\n" - "ldr s1, [x3, #0x44]\n" - "add x19, x15, x13\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "fmla v30.4s, v1.4s, v10.4s\n" - "fmla v29.4s, v1.4s, v13.4s\n" + "ldr q1, [x17, #0x0]\n" + "fmla v31.4s, v0.4s, v13.4s\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "add x19, x13, x7\n" + "fmla v29.4s, v1.4s, v10.4s\n" + "fmla v30.4s, v1.4s, v13.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 39f\n" "ldr d5, [x19], #0x8\n" "tbz %x[n_channels], #0, 40f\n" @@ -791,12 +803,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "39:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 1: Unset "ldr s5, [x19, #0x0]\n" "40:" // Tile loop: Oddments: Load inputs: (4, 2): Bit 1: End - "fmla v28.4s, v1.4s, v5.4s\n" - "ldr s2, [x3, #0x48]\n" - "add x19, x15, x12\n" - "fmla v31.4s, v2.4s, v10.4s\n" - "fmla v30.4s, v2.4s, v11.4s\n" - "fmla v29.4s, v2.4s, v5.4s\n" + "ldr q2, [x17, #0x0]\n" + "fmla v31.4s, v1.4s, v5.4s\n" + "fmla v28.4s, v2.4s, v10.4s\n" + "add x19, x13, x14\n" + "fmla v29.4s, v2.4s, v11.4s\n" + "fmla v30.4s, v2.4s, v5.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 41f\n" "ldr d6, [x19], #0x8\n" "tbz %x[n_channels], #0, 42f\n" @@ -805,12 +818,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "41:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 1: Unset "ldr s6, [x19, #0x0]\n" "42:" // Tile loop: Oddments: Load inputs: (4, 3): Bit 1: End - "fmla v28.4s, v2.4s, v6.4s\n" - "ldr s3, [x3, #0x4c]\n" - "add x19, x15, x11\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "fmla v30.4s, v3.4s, v12.4s\n" - "fmla v29.4s, v3.4s, v6.4s\n" + "ldr q3, [x17, #0x0]\n" + "fmla v31.4s, v2.4s, v6.4s\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "add x19, x13, x12\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "fmla v30.4s, v3.4s, v6.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 43f\n" "ldr d8, [x19], #0x8\n" "tbz %x[n_channels], #0, 44f\n" @@ -819,12 +833,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "43:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 1: Unset "ldr s8, [x19, #0x0]\n" "44:" // Tile loop: Oddments: Load inputs: (4, 4): Bit 1: End - "fmla v28.4s, v3.4s, v8.4s\n" - "ldr s4, [x3, #0x50]\n" - "add x19, x15, x10\n" - "fmla v31.4s, v4.4s, v12.4s\n" - "fmla v30.4s, v4.4s, v14.4s\n" - "fmla v29.4s, v4.4s, v8.4s\n" + "ldr q4, [x17, #0x0]\n" + "fmla v31.4s, v3.4s, v8.4s\n" + "fmla v28.4s, v4.4s, v12.4s\n" + "add x19, x13, x10\n" + "fmla v29.4s, v4.4s, v14.4s\n" + "fmla v30.4s, v4.4s, v8.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 45f\n" "ldr d10, [x19], #0x8\n" "tbz %x[n_channels], #0, 46f\n" @@ -833,11 +848,12 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "45:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 1: Unset "ldr s10, [x19, #0x0]\n" "46:" // Tile loop: Oddments: Load inputs: (4, 5): Bit 1: End - "fmla v28.4s, v4.4s, v10.4s\n" - "ldr s0, [x3, #0x54]\n" - "add x19, x14, XZR\n" - "fmla v31.4s, v0.4s, v9.4s\n" - "fmla v30.4s, v0.4s, v13.4s\n" + "ldr q0, [x17, #0x0]\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "fmla v28.4s, v0.4s, v9.4s\n" + "add x19, x11, XZR\n" + "fmla v29.4s, v0.4s, v13.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 47f\n" "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #0, 48f\n" @@ -846,8 +862,8 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "47:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 1: Unset "ldr s11, [x19, #0x0]\n" "48:" // Tile loop: Oddments: Load inputs: (5, 0): Bit 1: End - "fmla v29.4s, v0.4s, v11.4s\n" - "add x19, x14, x4\n" + "fmla v30.4s, v0.4s, v11.4s\n" + "add x19, x11, x3\n" "tbz %x[n_channels], #1, 49f\n" "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #0, 50f\n" @@ -856,12 +872,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "49:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 1: Unset "ldr s12, [x19, #0x0]\n" "50:" // Tile loop: Oddments: Load inputs: (5, 1): Bit 1: End - "fmla v28.4s, v0.4s, v12.4s\n" - "ldr s1, [x3, #0x58]\n" - "add x19, x14, x13\n" - "fmla v31.4s, v1.4s, v13.4s\n" - "fmla v30.4s, v1.4s, v5.4s\n" - "fmla v29.4s, v1.4s, v12.4s\n" + "ldr q1, [x17, #0x0]\n" + "fmla v31.4s, v0.4s, v12.4s\n" + "fmla v28.4s, v1.4s, v13.4s\n" + "add x19, x11, x7\n" + "fmla v29.4s, v1.4s, v5.4s\n" + "fmla v30.4s, v1.4s, v12.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 51f\n" "ldr d9, [x19], #0x8\n" "tbz %x[n_channels], #0, 52f\n" @@ -870,12 +887,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "51:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 1: Unset "ldr s9, [x19, #0x0]\n" "52:" // Tile loop: Oddments: Load inputs: (5, 2): Bit 1: End - "fmla v28.4s, v1.4s, v9.4s\n" - "ldr s2, [x3, #0x5c]\n" - "add x19, x14, x12\n" - "fmla v31.4s, v2.4s, v5.4s\n" - "fmla v30.4s, v2.4s, v6.4s\n" - "fmla v29.4s, v2.4s, v9.4s\n" + "ldr q2, [x17, #0x0]\n" + "fmla v31.4s, v1.4s, v9.4s\n" + "fmla v28.4s, v2.4s, v5.4s\n" + "add x19, x11, x14\n" + "fmla v29.4s, v2.4s, v6.4s\n" + "fmla v30.4s, v2.4s, v9.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 53f\n" "ldr d11, [x19], #0x8\n" "tbz %x[n_channels], #0, 54f\n" @@ -884,12 +902,13 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "53:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 1: Unset "ldr s11, [x19, #0x0]\n" "54:" // Tile loop: Oddments: Load inputs: (5, 3): Bit 1: End - "fmla v28.4s, v2.4s, v11.4s\n" - "ldr s3, [x3, #0x60]\n" - "add x19, x14, x11\n" - "fmla v31.4s, v3.4s, v6.4s\n" - "fmla v30.4s, v3.4s, v8.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" + "ldr q3, [x17, #0x0]\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "fmla v28.4s, v3.4s, v6.4s\n" + "add x19, x11, x12\n" + "fmla v29.4s, v3.4s, v8.4s\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "add x17, x17, #0x10\n" "tbz %x[n_channels], #1, 55f\n" "ldr d12, [x19], #0x8\n" "tbz %x[n_channels], #0, 56f\n" @@ -898,12 +917,12 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "55:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 1: Unset "ldr s12, [x19, #0x0]\n" "56:" // Tile loop: Oddments: Load inputs: (5, 4): Bit 1: End - "fmla v28.4s, v3.4s, v12.4s\n" - "ldr s4, [x3, #0x64]\n" - "add x19, x14, x10\n" - "fmla v31.4s, v4.4s, v8.4s\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "fmla v29.4s, v4.4s, v12.4s\n" + "ldr q4, [x17, #0x0]\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "fmla v28.4s, v4.4s, v8.4s\n" + "add x19, x11, x10\n" + "fmla v29.4s, v4.4s, v10.4s\n" + "fmla v30.4s, v4.4s, v12.4s\n" "tbz %x[n_channels], #1, 57f\n" "ldr d9, [x19], #0x8\n" "tbz %x[n_channels], #0, 58f\n" @@ -912,52 +931,52 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( "57:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 1: Unset "ldr s9, [x19, #0x0]\n" "58:" // Tile loop: Oddments: Load inputs: (5, 5): Bit 1: End - "fmla v28.4s, v4.4s, v9.4s\n" - "fmax v31.4s, v31.4s, v18.4s\n" - "fmax v30.4s, v30.4s, v18.4s\n" - "fmax v29.4s, v29.4s, v18.4s\n" - "fmin v31.4s, v31.4s, v17.4s\n" - "fmin v30.4s, v30.4s, v17.4s\n" - "fmin v29.4s, v29.4s, v17.4s\n" + "fmla v31.4s, v4.4s, v9.4s\n" "fmax v28.4s, v28.4s, v18.4s\n" + "fmax v29.4s, v29.4s, v18.4s\n" + "fmax v30.4s, v30.4s, v18.4s\n" + "fmax v31.4s, v31.4s, v18.4s\n" "fmin v28.4s, v28.4s, v17.4s\n" + "fmin v29.4s, v29.4s, v17.4s\n" + "fmin v30.4s, v30.4s, v17.4s\n" + "fmin v31.4s, v31.4s, v17.4s\n" "tbz %x[n_channels], #1, 59f\n" - "mov x19, x7\n" - "st1 { v31.d }[0], [x19], x6\n" - "add x7, x7, #0x8\n" - "st1 { v30.d }[0], [x19]\n" + "mov x20, x6\n" "mov x19, x9\n" - "st1 { v29.d }[0], [x19], x6\n" + "st1 { v28.d }[0], [x20], x4\n" + "add x6, x6, #0x8\n" "add x9, x9, #0x8\n" - "st1 { v28.d }[0], [x19]\n" + "st1 { v30.d }[0], [x19], x4\n" + "st1 { v29.d }[0], [x20]\n" + "st1 { v31.d }[0], [x19]\n" "tbz %x[n_channels], #0, 60f\n" - "mov x20, x7\n" - "st1 { v31.s }[2], [x20], x6\n" + "mov x20, x6\n" "mov x19, x9\n" - "st1 { v30.s }[2], [x20]\n" - "st1 { v29.s }[2], [x19], x6\n" - "st1 { v28.s }[2], [x19]\n" + "st1 { v28.s }[2], [x20], x4\n" + "st1 { v30.s }[2], [x19], x4\n" + "st1 { v29.s }[2], [x20]\n" + "st1 { v31.s }[2], [x19]\n" "b 60f\n" "59:" // Tile loop: Oddments: Store: Bit 1: Unset - "mov x20, x7\n" - "st1 { v31.s }[0], [x20], x6\n" + "mov x20, x6\n" "mov x19, x9\n" - "st1 { v30.s }[0], [x20]\n" - "st1 { v29.s }[0], [x19], x6\n" - "st1 { v28.s }[0], [x19]\n" + "st1 { v28.s }[0], [x20], x4\n" + "st1 { v30.s }[0], [x19], x4\n" + "st1 { v29.s }[0], [x20]\n" + "st1 { v31.s }[0], [x19]\n" "60:" // Tile loop: Oddments: Store: Bit 1: End "61:" // Tile loop: End - "ldr x28, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "add x21, x28, #0x1\n" - "ldr x27, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" - "add x27, x27, #0x1\n" + "ldr x25, [%x[params_struct], %[offsetof_args_tile_j]]\n" + "ldr x26, [%x[params_struct], %[offsetof_args_tile_i]]\n" + "add x25, x25, #0x1\n" + "add x20, x26, #0x1\n" "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" - "cmp x27, x19\n" - "csel x27, x27, XZR, LT\n" - "csel x28, x28, x21, LT\n" - "cmp x28, x20\n" + "cmp x25, x19\n" + "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" + "csel x26, x26, x20, LT\n" + "csel x25, x25, XZR, LT\n" + "cmp x26, x19\n" "blt 1b\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp index de66a8c485..adc5170ef7 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp @@ -97,595 +97,602 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_indirect_impl( __asm__ __volatile__( "ldr x21, [%x[params_struct], %[offsetof_args_outptrs]]\n" - "add x16, %x[params_struct], %[offsetof_Args_inptrs]\n" - "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" + "mov x28, #0x10\n" // cntb _, ALL, #1 + "lsr x27, %x[n_channels], #0x2\n" + "ldr x16, [%x[params_struct], %[offsetof_args_params]]\n" "add x20, %x[params_struct], %[offsetof_args_min]\n" "add x19, %x[params_struct], %[offsetof_args_max]\n" + "ldp x15, x14, [x21, #0x0]\n" + "ldp x13, x12, [x21, #0x10]\n" + "add x11, %x[params_struct], %[offsetof_Args_inptrs]\n" "ld1r { v18.4s }, [x20]\n" "ld1r { v17.4s }, [x19]\n" - "mov x14, #0x0\n" - "ldp x13, x12, [x21, #0x0]\n" - "mov x11, #0x10\n" // cntb _, ALL, #1 - "ldp x10, x9, [x21, #0x10]\n" - "sub x28, XZR, x11\n" - "lsr x27, %x[n_channels], #0x2\n" + "mov x10, #0x0\n" + "sub x9, XZR, x28\n" "cbz x27, 3f\n" - "ldr q16, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "cmp x11, x27, LSL #4\n" - "ldr q1, [x15, #0x20]\n" - "ldr q2, [x15, #0x30]\n" - "ldr q3, [x15, #0x40]\n" - "ldr q4, [x15, #0x50]\n" - "add x15, x15, #0x60\n" - "ldp x26, x25, [x16, #0x0]\n" - "ldp x24, x23, [x16, #0x10]\n" - "ldp x22, x21, [x16, #0x20]\n" - "ldr q5, [x26, x14]\n" - "ldr q6, [x25, x14]\n" - "ldr q7, [x24, x14]\n" - "ldr q8, [x23, x14]\n" - "ldr q9, [x22, x14]\n" - "ldr q13, [x21, x14]\n" - "ldp x20, x19, [x16, #0x30]\n" - "ldp x26, x25, [x16, #0x40]\n" - "ldr q11, [x20, x14]\n" - "ldr q12, [x19, x14]\n" - "ldr q10, [x26, x14]\n" - "ldr q14, [x25, x14]\n" + "ldp x26, x25, [x11, #0x0]\n" + "ldr q5, [x26, x10]\n" + "ldr q6, [x25, x10]\n" + "ldp x24, x23, [x11, #0x10]\n" + "cmp x28, x27, LSL #4\n" + "ldp x22, x21, [x11, #0x20]\n" + "ldp x20, x19, [x11, #0x30]\n" + "ldp x26, x25, [x11, #0x40]\n" + "ldr q16, [x16, #0x0]\n" + "ldr q0, [x16, #0x10]\n" + "ldr q1, [x16, #0x20]\n" + "ldr q2, [x16, #0x30]\n" + "ldr q3, [x16, #0x40]\n" + "ldr q4, [x16, #0x50]\n" + "ldr q7, [x24, x10]\n" + "add x16, x16, #0x60\n" + "ldr q8, [x23, x10]\n" + "ldr q9, [x22, x10]\n" + "ldr q13, [x21, x10]\n" + "ldr q11, [x20, x10]\n" + "ldr q12, [x19, x10]\n" + "ldr q10, [x26, x10]\n" + "ldr q14, [x25, x10]\n" "bge 2f\n" "1:" // Channel loop - "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v5.4s\n" - "ldr x24, [x16, #0x50]\n" - "add x28, x28, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v6.4s\n" - "ldr x23, [x16, #0x58]\n" - "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v7.4s\n" - "ldr x22, [x16, #0x60]\n" - "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v8.4s\n" - "ldr q5, [x24, x14]\n" - "ldr q0, [x15, #0x0]\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "ldr q6, [x23, x14]\n" - "fmla v30.4s, v1.4s, v9.4s\n" - "fmla v29.4s, v1.4s, v8.4s\n" - "ldr x21, [x16, #0x68]\n" - "fmla v28.4s, v1.4s, v13.4s\n" - "ldr q1, [x15, #0x10]\n" - "ldr x20, [x16, #0x70]\n" - "fmla v31.4s, v2.4s, v9.4s\n" - "ldr q9, [x22, x14]\n" - "fmla v30.4s, v2.4s, v11.4s\n" - "fmla v29.4s, v2.4s, v13.4s\n" - "ldr x19, [x16, #0x78]\n" - "fmla v28.4s, v2.4s, v5.4s\n" - "ldr q2, [x15, #0x20]\n" - "ldr x26, [x16, #0x80]\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "ldr q11, [x21, x14]\n" - "fmla v30.4s, v3.4s, v12.4s\n" - "fmla v29.4s, v3.4s, v5.4s\n" - "ldr x25, [x16, #0x88]\n" - "fmla v28.4s, v3.4s, v6.4s\n" - "ldr q3, [x15, #0x30]\n" - "ldr x24, [x16, #0x90]\n" - "fmla v31.4s, v4.4s, v12.4s\n" - "ldr q12, [x20, x14]\n" - "fmla v30.4s, v4.4s, v9.4s\n" - "fmla v29.4s, v4.4s, v6.4s\n" - "ldr q9, [x19, x14]\n" - "fmla v28.4s, v4.4s, v10.4s\n" - "ldr q4, [x15, #0x40]\n" - "ldr x23, [x16, #0x98]\n" - "fmla v31.4s, v0.4s, v7.4s\n" - "ldr x22, [x16, #0xa0]\n" - "fmla v30.4s, v0.4s, v8.4s\n" - "fmla v29.4s, v0.4s, v14.4s\n" - "ldr x21, [x16, #0xa8]\n" - "fmla v28.4s, v0.4s, v11.4s\n" - "ldr q0, [x15, #0x50]\n" - "ldr x20, [x16, #0xb0]\n" - "fmla v31.4s, v1.4s, v8.4s\n" - "ldr q8, [x25, x14]\n" - "fmla v30.4s, v1.4s, v13.4s\n" - "fmla v29.4s, v1.4s, v11.4s\n" - "ldr x19, [x16, #0xb8]\n" - "fmla v28.4s, v1.4s, v12.4s\n" - "ldr q1, [x15, #0x60]\n" - "ldr x25, [x16, #0xc8]\n" - "fmla v31.4s, v2.4s, v13.4s\n" - "ldr q13, [x26, x14]\n" - "fmla v30.4s, v2.4s, v5.4s\n" - "fmla v29.4s, v2.4s, v12.4s\n" - "ldr x26, [x16, #0xc0]\n" + "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v5.4s\n" + "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v6.4s\n" + "ldr x24, [x11, #0x50]\n" + "ldr q5, [x24, x10]\n" + "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v7.4s\n" + "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v8.4s\n" + "ldr x23, [x11, #0x58]\n" + "ldr x22, [x11, #0x60]\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "fmla v29.4s, v1.4s, v9.4s\n" + "ldr q6, [x23, x10]\n" + "ldr x21, [x11, #0x68]\n" + "fmla v30.4s, v1.4s, v8.4s\n" + "fmla v31.4s, v1.4s, v13.4s\n" + "ldr q0, [x16, #0x0]\n" + "ldr x20, [x11, #0x70]\n" "fmla v28.4s, v2.4s, v9.4s\n" - "ldr q2, [x15, #0x70]\n" - "ldr q16, [x15, #0x140]\n" - "fmla v31.4s, v3.4s, v5.4s\n" - "ldr q5, [x24, x14]\n" - "fmla v30.4s, v3.4s, v6.4s\n" - "fmla v29.4s, v3.4s, v9.4s\n" - "ldr x24, [x16, #0xd0]\n" - "fmla v28.4s, v3.4s, v13.4s\n" - "ldr q3, [x15, #0x80]\n" - "fmla v31.4s, v4.4s, v6.4s\n" - "ldr q6, [x23, x14]\n" - "ldr x23, [x16, #0xd8]\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "fmla v29.4s, v4.4s, v13.4s\n" - "ldr q10, [x22, x14]\n" - "fmla v28.4s, v4.4s, v8.4s\n" - "ldr q4, [x15, #0x90]\n" - "ldr x22, [x16, #0xe0]\n" - "fmla v31.4s, v0.4s, v14.4s\n" - "ldr q14, [x19, x14]\n" - "fmla v30.4s, v0.4s, v11.4s\n" - "fmla v29.4s, v0.4s, v5.4s\n" - "ldr x19, [x16, #0xf8]\n" - "fmla v28.4s, v0.4s, v6.4s\n" - "ldr q0, [x15, #0xa0]\n" - "fmla v31.4s, v1.4s, v11.4s\n" - "ldr q11, [x21, x14]\n" - "ldr x21, [x16, #0xe8]\n" - "fmla v30.4s, v1.4s, v12.4s\n" - "fmla v29.4s, v1.4s, v6.4s\n" - "fmla v28.4s, v1.4s, v10.4s\n" - "ldr q1, [x15, #0xb0]\n" - "fmla v31.4s, v2.4s, v12.4s\n" - "ldr q12, [x20, x14]\n" - "ldr x20, [x16, #0xf0]\n" - "fmla v30.4s, v2.4s, v9.4s\n" - "fmla v29.4s, v2.4s, v10.4s\n" - "fmla v28.4s, v2.4s, v11.4s\n" - "ldr q2, [x15, #0xc0]\n" - "fmla v31.4s, v3.4s, v9.4s\n" - "ldr q9, [x26, x14]\n" - "ldr x26, [x16, #0x100]\n" - "fmla v30.4s, v3.4s, v13.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" - "fmla v28.4s, v3.4s, v12.4s\n" - "ldr q3, [x15, #0xd0]\n" - "fmla v31.4s, v4.4s, v13.4s\n" - "ldr q13, [x25, x14]\n" - "ldr x25, [x16, #0x108]\n" - "fmla v30.4s, v4.4s, v8.4s\n" - "fmla v29.4s, v4.4s, v12.4s\n" - "ldr q8, [x22, x14]\n" - "fmla v28.4s, v4.4s, v14.4s\n" - "ldr q4, [x15, #0xe0]\n" - "fmla v31.4s, v0.4s, v5.4s\n" - "ldr q5, [x24, x14]\n" - "ldr x24, [x16, #0x110]\n" - "fmla v30.4s, v0.4s, v6.4s\n" - "fmla v29.4s, v0.4s, v9.4s\n" - "fmla v28.4s, v0.4s, v13.4s\n" - "ldr q0, [x15, #0xf0]\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "ldr q6, [x23, x14]\n" - "ldr x23, [x16, #0x118]\n" - "fmla v30.4s, v1.4s, v10.4s\n" + "fmla v29.4s, v2.4s, v11.4s\n" + "ldr q9, [x22, x10]\n" + "ldr q1, [x16, #0x10]\n" + "fmla v30.4s, v2.4s, v13.4s\n" + "fmla v31.4s, v2.4s, v5.4s\n" + "ldr x19, [x11, #0x78]\n" + "ldr q2, [x16, #0x20]\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "ldr q11, [x21, x10]\n" + "ldr x26, [x11, #0x80]\n" + "fmla v30.4s, v3.4s, v5.4s\n" + "fmla v31.4s, v3.4s, v6.4s\n" + "ldr q3, [x16, #0x30]\n" + "ldr x25, [x11, #0x88]\n" + "fmla v28.4s, v4.4s, v12.4s\n" + "fmla v29.4s, v4.4s, v9.4s\n" + "ldr q12, [x20, x10]\n" + "ldr q9, [x19, x10]\n" + "fmla v30.4s, v4.4s, v6.4s\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "ldr q4, [x16, #0x40]\n" + "ldr x24, [x11, #0x90]\n" + "fmla v28.4s, v0.4s, v7.4s\n" + "fmla v29.4s, v0.4s, v8.4s\n" + "ldr x23, [x11, #0x98]\n" + "ldr x22, [x11, #0xa0]\n" + "fmla v30.4s, v0.4s, v14.4s\n" + "fmla v31.4s, v0.4s, v11.4s\n" + "ldr q0, [x16, #0x50]\n" + "ldr x21, [x11, #0xa8]\n" + "fmla v28.4s, v1.4s, v8.4s\n" "fmla v29.4s, v1.4s, v13.4s\n" - "fmla v28.4s, v1.4s, v5.4s\n" - "ldr q1, [x15, #0x100]\n" - "fmla v31.4s, v2.4s, v10.4s\n" - "ldr q10, [x21, x14]\n" - "fmla v30.4s, v2.4s, v11.4s\n" + "ldr q8, [x25, x10]\n" + "ldr x20, [x11, #0xb0]\n" + "fmla v30.4s, v1.4s, v11.4s\n" + "fmla v31.4s, v1.4s, v12.4s\n" + "ldr q1, [x16, #0x60]\n" + "ldr x19, [x11, #0xb8]\n" + "fmla v28.4s, v2.4s, v13.4s\n" "fmla v29.4s, v2.4s, v5.4s\n" - "fmla v28.4s, v2.4s, v6.4s\n" - "ldr q2, [x15, #0x110]\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "ldr q11, [x20, x14]\n" - "fmla v30.4s, v3.4s, v12.4s\n" + "ldr q13, [x26, x10]\n" + "ldr x26, [x11, #0xc0]\n" + "fmla v30.4s, v2.4s, v12.4s\n" + "fmla v31.4s, v2.4s, v9.4s\n" + "ldr q2, [x16, #0x70]\n" + "ldr x25, [x11, #0xc8]\n" + "fmla v28.4s, v3.4s, v5.4s\n" "fmla v29.4s, v3.4s, v6.4s\n" - "fmla v28.4s, v3.4s, v8.4s\n" - "ldr q3, [x15, #0x120]\n" - "fmla v31.4s, v4.4s, v12.4s\n" - "ldr q12, [x19, x14]\n" - "fmla v30.4s, v4.4s, v14.4s\n" - "fmla v29.4s, v4.4s, v8.4s\n" - "fmla v28.4s, v4.4s, v10.4s\n" - "ldr q4, [x15, #0x130]\n" - "fmla v31.4s, v0.4s, v9.4s\n" - "ldr q9, [x26, x14]\n" - "fmla v30.4s, v0.4s, v13.4s\n" + "ldr q5, [x24, x10]\n" + "ldr x24, [x11, #0xd0]\n" + "fmla v30.4s, v3.4s, v9.4s\n" + "fmla v31.4s, v3.4s, v13.4s\n" + "ldr q3, [x16, #0x80]\n" + "add x9, x9, #0x10\n" + "fmla v28.4s, v4.4s, v6.4s\n" + "fmla v29.4s, v4.4s, v10.4s\n" + "ldr q6, [x23, x10]\n" + "ldr q10, [x22, x10]\n" + "fmla v30.4s, v4.4s, v13.4s\n" + "fmla v31.4s, v4.4s, v8.4s\n" + "ldr q4, [x16, #0x90]\n" + "ldr x23, [x11, #0xd8]\n" + "fmla v28.4s, v0.4s, v14.4s\n" "fmla v29.4s, v0.4s, v11.4s\n" - "ldr q11, [x25, x14]\n" - "fmla v28.4s, v0.4s, v12.4s\n" - "ldp x26, x25, [x16, #0x0]\n" - "ldr q0, [x15, #0x150]\n" - "fmla v31.4s, v1.4s, v13.4s\n" - "fmla v30.4s, v1.4s, v5.4s\n" + "ldr q14, [x19, x10]\n" + "ldr x22, [x11, #0xe0]\n" + "fmla v30.4s, v0.4s, v5.4s\n" + "fmla v31.4s, v0.4s, v6.4s\n" + "ldr q0, [x16, #0xa0]\n" + "ldr x19, [x11, #0xf8]\n" + "fmla v28.4s, v1.4s, v11.4s\n" "fmla v29.4s, v1.4s, v12.4s\n" - "ldr q12, [x24, x14]\n" - "fmla v28.4s, v1.4s, v9.4s\n" - "ldr q1, [x15, #0x160]\n" - "fmla v31.4s, v2.4s, v5.4s\n" - "ldr q5, [x26, x11]\n" - "fmla v30.4s, v2.4s, v6.4s\n" + "ldr q11, [x21, x10]\n" + "ldr x21, [x11, #0xe8]\n" + "fmla v30.4s, v1.4s, v6.4s\n" + "fmla v31.4s, v1.4s, v10.4s\n" + "ldr q1, [x16, #0xb0]\n" + "ldr q16, [x16, #0x140]\n" + "fmla v28.4s, v2.4s, v12.4s\n" "fmla v29.4s, v2.4s, v9.4s\n" - "ldr q9, [x23, x14]\n" - "add x14, x14, #0x10\n" - "fmla v28.4s, v2.4s, v11.4s\n" - "ldp x24, x23, [x16, #0x10]\n" - "ldp x22, x21, [x16, #0x20]\n" - "fmla v31.4s, v3.4s, v6.4s\n" - "ldr q6, [x25, x11]\n" - "fmla v30.4s, v3.4s, v8.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" - "ldr q7, [x24, x11]\n" - "ldr q13, [x21, x11]\n" - "fmla v28.4s, v3.4s, v12.4s\n" - "ldp x20, x19, [x16, #0x30]\n" - "fmla v31.4s, v4.4s, v8.4s\n" - "ldr q8, [x23, x11]\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "fmla v29.4s, v4.4s, v12.4s\n" - "ldr q11, [x20, x11]\n" - "ldr q12, [x19, x11]\n" - "fmla v28.4s, v4.4s, v9.4s\n" - "ldr q9, [x22, x11]\n" - "fmax v31.4s, v31.4s, v18.4s\n" - "ldp x26, x25, [x16, #0x40]\n" - "fmax v30.4s, v30.4s, v18.4s\n" - "fmax v29.4s, v29.4s, v18.4s\n" - "ldr q2, [x15, #0x170]\n" - "ldr q3, [x15, #0x180]\n" - "fmin v31.4s, v31.4s, v17.4s\n" - "fmax v28.4s, v28.4s, v18.4s\n" - "ldr q10, [x26, x11]\n" - "fmin v30.4s, v30.4s, v17.4s\n" - "ldr q14, [x25, x11]\n" - "add x11, x11, #0x10\n" - "fmin v29.4s, v29.4s, v17.4s\n" - "str q31, [x13, x28]\n" - "cmp x11, x27, LSL #4\n" - "fmin v28.4s, v28.4s, v17.4s\n" - "str q30, [x12, x28]\n" - "ldr q4, [x15, #0x190]\n" - "add x15, x15, #0x1a0\n" - "str q29, [x10, x28]\n" - "str q28, [x9, x28]\n" - "blt 1b\n" - "2:" // Channel tail - "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v5.4s\n" - "ldr x24, [x16, #0x50]\n" - "add x28, x28, #0x10\n" - "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v6.4s\n" - "ldr x23, [x16, #0x58]\n" - "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v7.4s\n" - "ldr x22, [x16, #0x60]\n" - "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v8.4s\n" - "ldr q5, [x24, x14]\n" - "ldr q0, [x15, #0x0]\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "ldr q6, [x23, x14]\n" - "fmla v30.4s, v1.4s, v9.4s\n" - "fmla v29.4s, v1.4s, v8.4s\n" - "ldr x21, [x16, #0x68]\n" - "fmla v28.4s, v1.4s, v13.4s\n" - "ldr q1, [x15, #0x10]\n" - "ldr x20, [x16, #0x70]\n" - "fmla v31.4s, v2.4s, v9.4s\n" - "ldr q9, [x22, x14]\n" - "fmla v30.4s, v2.4s, v11.4s\n" - "fmla v29.4s, v2.4s, v13.4s\n" - "ldr x19, [x16, #0x78]\n" - "fmla v28.4s, v2.4s, v5.4s\n" - "ldr q2, [x15, #0x20]\n" - "ldr x26, [x16, #0x80]\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "ldr q11, [x21, x14]\n" - "fmla v30.4s, v3.4s, v12.4s\n" - "fmla v29.4s, v3.4s, v5.4s\n" - "ldr x25, [x16, #0x88]\n" - "fmla v28.4s, v3.4s, v6.4s\n" - "ldr q3, [x15, #0x30]\n" - "ldr x24, [x16, #0x90]\n" - "fmla v31.4s, v4.4s, v12.4s\n" - "ldr q12, [x20, x14]\n" - "fmla v30.4s, v4.4s, v9.4s\n" - "fmla v29.4s, v4.4s, v6.4s\n" - "ldr q9, [x19, x14]\n" - "fmla v28.4s, v4.4s, v10.4s\n" - "ldr q4, [x15, #0x40]\n" - "ldr x23, [x16, #0x98]\n" - "fmla v31.4s, v0.4s, v7.4s\n" - "ldr x22, [x16, #0xa0]\n" - "fmla v30.4s, v0.4s, v8.4s\n" - "fmla v29.4s, v0.4s, v14.4s\n" - "ldr x21, [x16, #0xa8]\n" - "fmla v28.4s, v0.4s, v11.4s\n" - "ldr q0, [x15, #0x50]\n" - "ldr x20, [x16, #0xb0]\n" - "fmla v31.4s, v1.4s, v8.4s\n" - "ldr q8, [x25, x14]\n" + "ldr q12, [x20, x10]\n" + "ldr x20, [x11, #0xf0]\n" + "fmla v30.4s, v2.4s, v10.4s\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "ldr q2, [x16, #0xc0]\n" + "fmla v28.4s, v3.4s, v9.4s\n" + "fmla v29.4s, v3.4s, v13.4s\n" + "ldr q9, [x26, x10]\n" + "ldr x26, [x11, #0x100]\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "ldr q3, [x16, #0xd0]\n" + "fmla v28.4s, v4.4s, v13.4s\n" + "fmla v29.4s, v4.4s, v8.4s\n" + "ldr q13, [x25, x10]\n" + "ldr q8, [x22, x10]\n" + "fmla v30.4s, v4.4s, v12.4s\n" + "fmla v31.4s, v4.4s, v14.4s\n" + "ldr q4, [x16, #0xe0]\n" + "ldr x25, [x11, #0x108]\n" + "fmla v28.4s, v0.4s, v5.4s\n" + "fmla v29.4s, v0.4s, v6.4s\n" + "ldr q5, [x24, x10]\n" + "ldr x24, [x11, #0x110]\n" + "fmla v30.4s, v0.4s, v9.4s\n" + "fmla v31.4s, v0.4s, v13.4s\n" + "ldr q0, [x16, #0xf0]\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "fmla v29.4s, v1.4s, v10.4s\n" + "ldr q6, [x23, x10]\n" + "ldr x23, [x11, #0x118]\n" "fmla v30.4s, v1.4s, v13.4s\n" - "fmla v29.4s, v1.4s, v11.4s\n" - "ldr x19, [x16, #0xb8]\n" - "fmla v28.4s, v1.4s, v12.4s\n" - "ldr q1, [x15, #0x60]\n" - "ldr x25, [x16, #0xc8]\n" - "fmla v31.4s, v2.4s, v13.4s\n" - "ldr q13, [x26, x14]\n" + "fmla v31.4s, v1.4s, v5.4s\n" + "ldr q1, [x16, #0x100]\n" + "fmla v28.4s, v2.4s, v10.4s\n" + "fmla v29.4s, v2.4s, v11.4s\n" + "ldr q10, [x21, x10]\n" "fmla v30.4s, v2.4s, v5.4s\n" - "fmla v29.4s, v2.4s, v12.4s\n" - "ldr x26, [x16, #0xc0]\n" - "fmla v28.4s, v2.4s, v9.4s\n" - "ldr q2, [x15, #0x70]\n" - "fmla v31.4s, v3.4s, v5.4s\n" - "ldr q5, [x24, x14]\n" - "ldr x24, [x16, #0xd0]\n" + "fmla v31.4s, v2.4s, v6.4s\n" + "ldr q2, [x16, #0x110]\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "ldr q11, [x20, x10]\n" "fmla v30.4s, v3.4s, v6.4s\n" - "fmla v29.4s, v3.4s, v9.4s\n" - "fmla v28.4s, v3.4s, v13.4s\n" - "ldr q3, [x15, #0x80]\n" - "fmla v31.4s, v4.4s, v6.4s\n" - "ldr q6, [x23, x14]\n" - "ldr x23, [x16, #0xd8]\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "fmla v29.4s, v4.4s, v13.4s\n" - "ldr q10, [x22, x14]\n" - "fmla v28.4s, v4.4s, v8.4s\n" - "ldr q4, [x15, #0x90]\n" - "ldr x22, [x16, #0xe0]\n" - "fmla v31.4s, v0.4s, v14.4s\n" - "ldr q14, [x19, x14]\n" + "fmla v31.4s, v3.4s, v8.4s\n" + "ldr q3, [x16, #0x120]\n" + "fmla v28.4s, v4.4s, v12.4s\n" + "fmla v29.4s, v4.4s, v14.4s\n" + "ldr q12, [x19, x10]\n" + "fmla v30.4s, v4.4s, v8.4s\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "ldr q4, [x16, #0x130]\n" + "fmla v28.4s, v0.4s, v9.4s\n" + "fmla v29.4s, v0.4s, v13.4s\n" + "ldr q9, [x26, x10]\n" "fmla v30.4s, v0.4s, v11.4s\n" - "fmla v29.4s, v0.4s, v5.4s\n" - "ldr x19, [x16, #0xf8]\n" - "fmla v28.4s, v0.4s, v6.4s\n" - "ldr q0, [x15, #0xa0]\n" - "fmla v31.4s, v1.4s, v11.4s\n" - "ldr q11, [x21, x14]\n" - "ldr x21, [x16, #0xe8]\n" + "fmla v31.4s, v0.4s, v12.4s\n" + "ldr q11, [x25, x10]\n" + "ldp x26, x25, [x11, #0x0]\n" + "fmla v28.4s, v1.4s, v13.4s\n" + "fmla v29.4s, v1.4s, v5.4s\n" + "ldr q0, [x16, #0x150]\n" "fmla v30.4s, v1.4s, v12.4s\n" - "fmla v29.4s, v1.4s, v6.4s\n" - "fmla v28.4s, v1.4s, v10.4s\n" - "ldr q1, [x15, #0xb0]\n" - "fmla v31.4s, v2.4s, v12.4s\n" - "ldr q12, [x20, x14]\n" - "ldr x20, [x16, #0xf0]\n" + "fmla v31.4s, v1.4s, v9.4s\n" + "ldr q12, [x24, x10]\n" + "ldr q1, [x16, #0x160]\n" + "fmla v28.4s, v2.4s, v5.4s\n" + "fmla v29.4s, v2.4s, v6.4s\n" + "ldr q5, [x26, x28]\n" "fmla v30.4s, v2.4s, v9.4s\n" - "fmla v29.4s, v2.4s, v10.4s\n" - "fmla v28.4s, v2.4s, v11.4s\n" - "ldr q2, [x15, #0xc0]\n" - "fmla v31.4s, v3.4s, v9.4s\n" - "ldr q9, [x26, x14]\n" - "ldr x26, [x16, #0x100]\n" - "fmla v30.4s, v3.4s, v13.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" - "fmla v28.4s, v3.4s, v12.4s\n" - "ldr q3, [x15, #0xd0]\n" - "fmla v31.4s, v4.4s, v13.4s\n" - "ldr q13, [x25, x14]\n" - "ldr x25, [x16, #0x108]\n" - "fmla v30.4s, v4.4s, v8.4s\n" - "fmla v29.4s, v4.4s, v12.4s\n" - "ldr q8, [x22, x14]\n" - "fmla v28.4s, v4.4s, v14.4s\n" - "ldr q4, [x15, #0xe0]\n" - "fmla v31.4s, v0.4s, v5.4s\n" - "ldr q5, [x24, x14]\n" - "ldr x24, [x16, #0x110]\n" - "fmla v30.4s, v0.4s, v6.4s\n" - "fmla v29.4s, v0.4s, v9.4s\n" - "fmla v28.4s, v0.4s, v13.4s\n" - "ldr q0, [x15, #0xf0]\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "ldr q6, [x23, x14]\n" - "ldr x23, [x16, #0x118]\n" - "fmla v30.4s, v1.4s, v10.4s\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "ldr q9, [x23, x10]\n" + "ldp x24, x23, [x11, #0x10]\n" + "fmla v28.4s, v3.4s, v6.4s\n" + "fmla v29.4s, v3.4s, v8.4s\n" + "ldr q6, [x25, x28]\n" + "ldp x22, x21, [x11, #0x20]\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "ldp x20, x19, [x11, #0x30]\n" + "ldp x26, x25, [x11, #0x40]\n" + "fmla v28.4s, v4.4s, v8.4s\n" + "fmla v29.4s, v4.4s, v10.4s\n" + "fmax v28.4s, v28.4s, v18.4s\n" + "ldr q7, [x24, x28]\n" + "fmla v30.4s, v4.4s, v12.4s\n" + "fmla v31.4s, v4.4s, v9.4s\n" + "fmax v29.4s, v29.4s, v18.4s\n" + "ldr q8, [x23, x28]\n" + "fmax v30.4s, v30.4s, v18.4s\n" + "fmax v31.4s, v31.4s, v18.4s\n" + "ldr q9, [x22, x28]\n" + "ldr q13, [x21, x28]\n" + "ldr q11, [x20, x28]\n" + "ldr q12, [x19, x28]\n" + "fmin v28.4s, v28.4s, v17.4s\n" + "fmin v29.4s, v29.4s, v17.4s\n" + "ldr q10, [x26, x28]\n" + "ldr q14, [x25, x28]\n" + "add x28, x28, #0x10\n" + "cmp x28, x27, LSL #4\n" + "fmin v30.4s, v30.4s, v17.4s\n" + "fmin v31.4s, v31.4s, v17.4s\n" + "add x10, x10, #0x10\n" + "str q28, [x15, x9]\n" + "str q29, [x14, x9]\n" + "ldr q2, [x16, #0x170]\n" + "ldr q3, [x16, #0x180]\n" + "str q30, [x13, x9]\n" + "ldr q4, [x16, #0x190]\n" + "add x16, x16, #0x1a0\n" + "str q31, [x12, x9]\n" + "blt 1b\n" + "2:" // Channel tail + "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v5.4s\n" + "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v6.4s\n" + "ldr x24, [x11, #0x50]\n" + "ldr q5, [x24, x10]\n" + "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v7.4s\n" + "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v8.4s\n" + "ldr x23, [x11, #0x58]\n" + "ldr x22, [x11, #0x60]\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "fmla v29.4s, v1.4s, v9.4s\n" + "ldr q6, [x23, x10]\n" + "ldr x21, [x11, #0x68]\n" + "fmla v30.4s, v1.4s, v8.4s\n" + "fmla v31.4s, v1.4s, v13.4s\n" + "ldr q0, [x16, #0x0]\n" + "ldr x20, [x11, #0x70]\n" + "fmla v28.4s, v2.4s, v9.4s\n" + "fmla v29.4s, v2.4s, v11.4s\n" + "ldr q9, [x22, x10]\n" + "ldr q1, [x16, #0x10]\n" + "fmla v30.4s, v2.4s, v13.4s\n" + "fmla v31.4s, v2.4s, v5.4s\n" + "ldr x19, [x11, #0x78]\n" + "ldr q2, [x16, #0x20]\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "ldr q11, [x21, x10]\n" + "ldr x26, [x11, #0x80]\n" + "fmla v30.4s, v3.4s, v5.4s\n" + "fmla v31.4s, v3.4s, v6.4s\n" + "ldr q3, [x16, #0x30]\n" + "ldr x25, [x11, #0x88]\n" + "fmla v28.4s, v4.4s, v12.4s\n" + "fmla v29.4s, v4.4s, v9.4s\n" + "ldr q12, [x20, x10]\n" + "ldr q9, [x19, x10]\n" + "fmla v30.4s, v4.4s, v6.4s\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "ldr q4, [x16, #0x40]\n" + "ldr x24, [x11, #0x90]\n" + "fmla v28.4s, v0.4s, v7.4s\n" + "fmla v29.4s, v0.4s, v8.4s\n" + "ldr x23, [x11, #0x98]\n" + "ldr x22, [x11, #0xa0]\n" + "fmla v30.4s, v0.4s, v14.4s\n" + "fmla v31.4s, v0.4s, v11.4s\n" + "ldr q0, [x16, #0x50]\n" + "ldr x21, [x11, #0xa8]\n" + "fmla v28.4s, v1.4s, v8.4s\n" "fmla v29.4s, v1.4s, v13.4s\n" - "fmla v28.4s, v1.4s, v5.4s\n" - "ldr q1, [x15, #0x100]\n" - "fmla v31.4s, v2.4s, v10.4s\n" - "ldr q10, [x21, x14]\n" - "fmla v30.4s, v2.4s, v11.4s\n" + "ldr q8, [x25, x10]\n" + "ldr x20, [x11, #0xb0]\n" + "fmla v30.4s, v1.4s, v11.4s\n" + "fmla v31.4s, v1.4s, v12.4s\n" + "ldr q1, [x16, #0x60]\n" + "ldr x19, [x11, #0xb8]\n" + "fmla v28.4s, v2.4s, v13.4s\n" "fmla v29.4s, v2.4s, v5.4s\n" - "fmla v28.4s, v2.4s, v6.4s\n" - "ldr q2, [x15, #0x110]\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "ldr q11, [x20, x14]\n" - "fmla v30.4s, v3.4s, v12.4s\n" + "ldr q13, [x26, x10]\n" + "ldr x26, [x11, #0xc0]\n" + "fmla v30.4s, v2.4s, v12.4s\n" + "fmla v31.4s, v2.4s, v9.4s\n" + "ldr q2, [x16, #0x70]\n" + "ldr x25, [x11, #0xc8]\n" + "fmla v28.4s, v3.4s, v5.4s\n" "fmla v29.4s, v3.4s, v6.4s\n" - "fmla v28.4s, v3.4s, v8.4s\n" - "ldr q3, [x15, #0x120]\n" - "fmla v31.4s, v4.4s, v12.4s\n" - "ldr q12, [x19, x14]\n" - "fmla v30.4s, v4.4s, v14.4s\n" - "fmla v29.4s, v4.4s, v8.4s\n" - "fmla v28.4s, v4.4s, v10.4s\n" - "ldr q4, [x15, #0x130]\n" - "add x15, x15, #0x140\n" - "fmla v31.4s, v0.4s, v9.4s\n" - "ldr q9, [x26, x14]\n" - "fmla v30.4s, v0.4s, v13.4s\n" + "ldr q5, [x24, x10]\n" + "ldr x24, [x11, #0xd0]\n" + "fmla v30.4s, v3.4s, v9.4s\n" + "fmla v31.4s, v3.4s, v13.4s\n" + "ldr q3, [x16, #0x80]\n" + "add x9, x9, #0x10\n" + "fmla v28.4s, v4.4s, v6.4s\n" + "fmla v29.4s, v4.4s, v10.4s\n" + "ldr q6, [x23, x10]\n" + "ldr q10, [x22, x10]\n" + "fmla v30.4s, v4.4s, v13.4s\n" + "fmla v31.4s, v4.4s, v8.4s\n" + "ldr q4, [x16, #0x90]\n" + "ldr x23, [x11, #0xd8]\n" + "fmla v28.4s, v0.4s, v14.4s\n" "fmla v29.4s, v0.4s, v11.4s\n" - "ldr q11, [x25, x14]\n" - "fmla v28.4s, v0.4s, v12.4s\n" - "fmla v31.4s, v1.4s, v13.4s\n" - "fmla v30.4s, v1.4s, v5.4s\n" + "ldr q14, [x19, x10]\n" + "ldr x22, [x11, #0xe0]\n" + "fmla v30.4s, v0.4s, v5.4s\n" + "fmla v31.4s, v0.4s, v6.4s\n" + "ldr q0, [x16, #0xa0]\n" + "ldr x19, [x11, #0xf8]\n" + "fmla v28.4s, v1.4s, v11.4s\n" "fmla v29.4s, v1.4s, v12.4s\n" - "ldr q12, [x24, x14]\n" - "fmla v28.4s, v1.4s, v9.4s\n" - "fmla v31.4s, v2.4s, v5.4s\n" - "fmla v30.4s, v2.4s, v6.4s\n" + "ldr q11, [x21, x10]\n" + "ldr x21, [x11, #0xe8]\n" + "fmla v30.4s, v1.4s, v6.4s\n" + "fmla v31.4s, v1.4s, v10.4s\n" + "ldr q1, [x16, #0xb0]\n" + "fmla v28.4s, v2.4s, v12.4s\n" "fmla v29.4s, v2.4s, v9.4s\n" - "ldr q9, [x23, x14]\n" - "add x14, x14, #0x10\n" - "fmla v28.4s, v2.4s, v11.4s\n" - "fmla v31.4s, v3.4s, v6.4s\n" - "fmla v30.4s, v3.4s, v8.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" - "fmla v28.4s, v3.4s, v12.4s\n" - "fmla v31.4s, v4.4s, v8.4s\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "fmla v29.4s, v4.4s, v12.4s\n" - "fmla v28.4s, v4.4s, v9.4s\n" - "fmax v31.4s, v31.4s, v18.4s\n" - "fmax v30.4s, v30.4s, v18.4s\n" - "fmax v29.4s, v29.4s, v18.4s\n" - "fmin v31.4s, v31.4s, v17.4s\n" - "str q31, [x13, x28]\n" - "fmin v30.4s, v30.4s, v17.4s\n" - "fmin v29.4s, v29.4s, v17.4s\n" - "str q30, [x12, x28]\n" + "ldr q12, [x20, x10]\n" + "ldr x20, [x11, #0xf0]\n" + "fmla v30.4s, v2.4s, v10.4s\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "ldr q2, [x16, #0xc0]\n" + "fmla v28.4s, v3.4s, v9.4s\n" + "fmla v29.4s, v3.4s, v13.4s\n" + "ldr q9, [x26, x10]\n" + "ldr x26, [x11, #0x100]\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "ldr q3, [x16, #0xd0]\n" + "fmla v28.4s, v4.4s, v13.4s\n" + "fmla v29.4s, v4.4s, v8.4s\n" + "ldr q13, [x25, x10]\n" + "ldr q8, [x22, x10]\n" + "fmla v30.4s, v4.4s, v12.4s\n" + "fmla v31.4s, v4.4s, v14.4s\n" + "ldr q4, [x16, #0xe0]\n" + "ldr x25, [x11, #0x108]\n" + "fmla v28.4s, v0.4s, v5.4s\n" + "fmla v29.4s, v0.4s, v6.4s\n" + "ldr q5, [x24, x10]\n" + "ldr x24, [x11, #0x110]\n" + "fmla v30.4s, v0.4s, v9.4s\n" + "fmla v31.4s, v0.4s, v13.4s\n" + "ldr q0, [x16, #0xf0]\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "fmla v29.4s, v1.4s, v10.4s\n" + "ldr q6, [x23, x10]\n" + "ldr x23, [x11, #0x118]\n" + "fmla v30.4s, v1.4s, v13.4s\n" + "fmla v31.4s, v1.4s, v5.4s\n" + "ldr q1, [x16, #0x100]\n" + "fmla v28.4s, v2.4s, v10.4s\n" + "fmla v29.4s, v2.4s, v11.4s\n" + "ldr q10, [x21, x10]\n" + "fmla v30.4s, v2.4s, v5.4s\n" + "fmla v31.4s, v2.4s, v6.4s\n" + "ldr q2, [x16, #0x110]\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "ldr q11, [x20, x10]\n" + "fmla v30.4s, v3.4s, v6.4s\n" + "fmla v31.4s, v3.4s, v8.4s\n" + "ldr q3, [x16, #0x120]\n" + "fmla v28.4s, v4.4s, v12.4s\n" + "fmla v29.4s, v4.4s, v14.4s\n" + "ldr q12, [x19, x10]\n" + "fmla v30.4s, v4.4s, v8.4s\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "ldr q4, [x16, #0x130]\n" + "add x16, x16, #0x140\n" + "fmla v28.4s, v0.4s, v9.4s\n" + "fmla v29.4s, v0.4s, v13.4s\n" + "ldr q9, [x26, x10]\n" + "fmla v30.4s, v0.4s, v11.4s\n" + "fmla v31.4s, v0.4s, v12.4s\n" + "ldr q11, [x25, x10]\n" + "fmla v28.4s, v1.4s, v13.4s\n" + "fmla v29.4s, v1.4s, v5.4s\n" + "fmla v30.4s, v1.4s, v12.4s\n" + "fmla v31.4s, v1.4s, v9.4s\n" + "ldr q12, [x24, x10]\n" + "fmla v28.4s, v2.4s, v5.4s\n" + "fmla v29.4s, v2.4s, v6.4s\n" + "fmla v30.4s, v2.4s, v9.4s\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "ldr q9, [x23, x10]\n" + "add x10, x10, #0x10\n" + "fmla v28.4s, v3.4s, v6.4s\n" + "fmla v29.4s, v3.4s, v8.4s\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "fmla v28.4s, v4.4s, v8.4s\n" + "fmla v29.4s, v4.4s, v10.4s\n" "fmax v28.4s, v28.4s, v18.4s\n" - "str q29, [x10, x28]\n" + "fmla v30.4s, v4.4s, v12.4s\n" + "fmla v31.4s, v4.4s, v9.4s\n" + "fmax v29.4s, v29.4s, v18.4s\n" + "fmax v30.4s, v30.4s, v18.4s\n" + "fmax v31.4s, v31.4s, v18.4s\n" "fmin v28.4s, v28.4s, v17.4s\n" - "str q28, [x9, x28]\n" + "fmin v29.4s, v29.4s, v17.4s\n" + "str q28, [x15, x9]\n" + "fmin v30.4s, v30.4s, v17.4s\n" + "fmin v31.4s, v31.4s, v17.4s\n" + "str q29, [x14, x9]\n" + "str q30, [x13, x9]\n" + "str q31, [x12, x9]\n" "3:" // Oddments "tst %x[n_channels], #0x3\n" "beq 60f\n" - "ldr q16, [x15, #0x0]\n" - "ldr q0, [x15, #0x10]\n" - "mov x28, x14\n" - "ldr q1, [x15, #0x20]\n" - "add x13, x13, x28\n" - "ldr q2, [x15, #0x30]\n" - "add x12, x12, x28\n" - "ldr q3, [x15, #0x40]\n" - "add x10, x10, x28\n" - "ldr q4, [x15, #0x50]\n" - "add x9, x9, x28\n" - "ldr x24, [x16, #0x10]\n" - "ldr x23, [x16, #0x18]\n" - "ldr x22, [x16, #0x20]\n" - "add x24, x24, x14\n" - "ldr x21, [x16, #0x28]\n" - "add x23, x23, x14\n" - "ldr x20, [x16, #0x30]\n" - "add x22, x22, x14\n" - "ldr x19, [x16, #0x38]\n" - "add x21, x21, x14\n" - "ldr x26, [x16, #0x40]\n" - "add x20, x20, x14\n" - "ldr x25, [x16, #0x48]\n" - "add x19, x19, x14\n" - "add x26, x26, x14\n" - "add x25, x25, x14\n" - "add x15, x15, #0x60\n" + "mov x9, x10\n" + "ldr x28, [x11, #0x0]\n" + "ldr x27, [x11, #0x8]\n" + "ldr x26, [x11, #0x10]\n" + "add x15, x15, x9\n" + "add x14, x14, x9\n" + "ldr x25, [x11, #0x18]\n" + "ldr x24, [x11, #0x20]\n" + "add x13, x13, x9\n" + "add x12, x12, x9\n" + "ldr x23, [x11, #0x28]\n" + "ldr x22, [x11, #0x30]\n" + "add x28, x28, x10\n" + "add x27, x27, x10\n" + "ldr x21, [x11, #0x38]\n" + "ldr x20, [x11, #0x40]\n" + "add x26, x26, x10\n" + "add x25, x25, x10\n" + "ldr x19, [x11, #0x48]\n" + "ldr q16, [x16, #0x0]\n" + "add x24, x24, x10\n" + "add x23, x23, x10\n" + "ldr q0, [x16, #0x10]\n" + "ldr q1, [x16, #0x20]\n" + "add x22, x22, x10\n" + "add x21, x21, x10\n" + "ldr q2, [x16, #0x30]\n" + "ldr q3, [x16, #0x40]\n" + "add x20, x20, x10\n" + "add x19, x19, x10\n" + "ldr q4, [x16, #0x50]\n" + "add x16, x16, #0x60\n" "tbz %x[n_channels], #1, 4f\n" - "ld1 { v5.d }[0], [x26], #0x8\n" - "ld1 { v6.d }[0], [x25], #0x8\n" - "ld1 { v7.d }[0], [x24], #0x8\n" - "ld1 { v8.d }[0], [x23], #0x8\n" - "ld1 { v9.d }[0], [x22], #0x8\n" - "ld1 { v13.d }[0], [x21], #0x8\n" - "ld1 { v11.d }[0], [x20], #0x8\n" - "ld1 { v12.d }[0], [x19], #0x8\n" - "ld1 { v10.d }[0], [x26], #0x8\n" - "ld1 { v14.d }[0], [x25], #0x8\n" + "ld1 { v5.d }[0], [x28], #0x8\n" + "ld1 { v6.d }[0], [x27], #0x8\n" + "ld1 { v7.d }[0], [x26], #0x8\n" + "ld1 { v8.d }[0], [x25], #0x8\n" + "ld1 { v9.d }[0], [x24], #0x8\n" + "ld1 { v13.d }[0], [x23], #0x8\n" + "ld1 { v11.d }[0], [x22], #0x8\n" + "ld1 { v12.d }[0], [x21], #0x8\n" + "ld1 { v10.d }[0], [x20], #0x8\n" + "ld1 { v14.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 5f\n" - "ld1 { v7.s }[2], [x24], #0x4\n" - "ld1 { v8.s }[2], [x23], #0x4\n" - "ld1 { v5.s }[2], [x26], #0x4\n" - "ld1 { v6.s }[2], [x25], #0x4\n" - "ld1 { v9.s }[2], [x22], #0x4\n" - "ld1 { v13.s }[2], [x21], #0x4\n" - "ld1 { v11.s }[2], [x20], #0x4\n" - "ld1 { v12.s }[2], [x19], #0x4\n" - "ld1 { v10.s }[2], [x26], #0x4\n" - "ld1 { v14.s }[2], [x25], #0x4\n" + "ld1 { v5.s }[2], [x28], #0x4\n" + "ld1 { v6.s }[2], [x27], #0x4\n" + "ld1 { v7.s }[2], [x26], #0x4\n" + "ld1 { v8.s }[2], [x25], #0x4\n" + "ld1 { v9.s }[2], [x24], #0x4\n" + "ld1 { v13.s }[2], [x23], #0x4\n" + "ld1 { v11.s }[2], [x22], #0x4\n" + "ld1 { v12.s }[2], [x21], #0x4\n" + "ld1 { v10.s }[2], [x20], #0x4\n" + "ld1 { v14.s }[2], [x19], #0x4\n" "b 5f\n" "4:" // Oddments: Load inputs (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 1: Unset - "ld1 { v5.s }[0], [x26], #0x4\n" - "ld1 { v6.s }[0], [x25], #0x4\n" - "ld1 { v7.s }[0], [x24], #0x4\n" - "ld1 { v8.s }[0], [x23], #0x4\n" - "ld1 { v9.s }[0], [x22], #0x4\n" - "ld1 { v13.s }[0], [x21], #0x4\n" - "ld1 { v11.s }[0], [x20], #0x4\n" - "ld1 { v12.s }[0], [x19], #0x4\n" - "ld1 { v10.s }[0], [x26], #0x4\n" - "ld1 { v14.s }[0], [x25], #0x4\n" + "ld1 { v5.s }[0], [x28], #0x4\n" + "ld1 { v6.s }[0], [x27], #0x4\n" + "ld1 { v7.s }[0], [x26], #0x4\n" + "ld1 { v8.s }[0], [x25], #0x4\n" + "ld1 { v9.s }[0], [x24], #0x4\n" + "ld1 { v13.s }[0], [x23], #0x4\n" + "ld1 { v11.s }[0], [x22], #0x4\n" + "ld1 { v12.s }[0], [x21], #0x4\n" + "ld1 { v10.s }[0], [x20], #0x4\n" + "ld1 { v14.s }[0], [x19], #0x4\n" "5:" // Oddments: Load inputs (0, 0), (0, 1), (1, 0), (1, 1), (0, 2), (1, 2), (0, 3), (0, 4), (1, 5), (2, 0): Bit 1: End - "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v5.4s\n" - "ldr x24, [x16, #0x50]\n" - "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v6.4s\n" - "add x24, x24, x14\n" - "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v7.4s\n" - "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v8.4s\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "fmla v30.4s, v1.4s, v9.4s\n" - "fmla v29.4s, v1.4s, v8.4s\n" - "fmla v28.4s, v1.4s, v13.4s\n" - "fmla v31.4s, v2.4s, v9.4s\n" - "fmla v30.4s, v2.4s, v11.4s\n" - "fmla v29.4s, v2.4s, v13.4s\n" + "mov v28.16b, v16.16b\n fmla v28.4s, v0.4s, v5.4s\n" + "mov v29.16b, v16.16b\n fmla v29.4s, v0.4s, v6.4s\n" + "ldr x19, [x11, #0x50]\n" + "add x19, x19, x10\n" + "mov v30.16b, v16.16b\n fmla v30.4s, v0.4s, v7.4s\n" + "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v8.4s\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "fmla v29.4s, v1.4s, v9.4s\n" + "fmla v30.4s, v1.4s, v8.4s\n" + "fmla v31.4s, v1.4s, v13.4s\n" + "fmla v28.4s, v2.4s, v9.4s\n" + "fmla v29.4s, v2.4s, v11.4s\n" + "fmla v30.4s, v2.4s, v13.4s\n" "tbz %x[n_channels], #1, 6f\n" - "ld1 { v5.d }[0], [x24], #0x8\n" + "ld1 { v5.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 7f\n" - "ld1 { v5.s }[2], [x24], #0x4\n" + "ld1 { v5.s }[2], [x19], #0x4\n" "b 7f\n" "6:" // Oddments: Load input (1, 3): Bit 1: Unset - "ld1 { v5.s }[0], [x24], #0x4\n" + "ld1 { v5.s }[0], [x19], #0x4\n" "7:" // Oddments: Load input (1, 3): Bit 1: End - "fmla v28.4s, v2.4s, v5.4s\n" - "ldr x23, [x16, #0x58]\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "add x23, x23, x14\n" - "fmla v30.4s, v3.4s, v12.4s\n" - "fmla v29.4s, v3.4s, v5.4s\n" + "ldr x19, [x11, #0x58]\n" + "fmla v31.4s, v2.4s, v5.4s\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "add x19, x19, x10\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "fmla v30.4s, v3.4s, v5.4s\n" "tbz %x[n_channels], #1, 8f\n" - "ld1 { v6.d }[0], [x23], #0x8\n" + "ld1 { v6.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 9f\n" - "ld1 { v6.s }[2], [x23], #0x4\n" + "ld1 { v6.s }[2], [x19], #0x4\n" "b 9f\n" "8:" // Oddments: Load input (1, 4): Bit 1: Unset - "ld1 { v6.s }[0], [x23], #0x4\n" + "ld1 { v6.s }[0], [x19], #0x4\n" "9:" // Oddments: Load input (1, 4): Bit 1: End - "fmla v28.4s, v3.4s, v6.4s\n" - "ldr x22, [x16, #0x60]\n" - "fmla v31.4s, v4.4s, v12.4s\n" - "add x22, x22, x14\n" + "ldr x19, [x11, #0x60]\n" + "fmla v31.4s, v3.4s, v6.4s\n" + "fmla v28.4s, v4.4s, v12.4s\n" + "add x19, x19, x10\n" "tbz %x[n_channels], #1, 10f\n" - "ld1 { v9.d }[0], [x22], #0x8\n" + "ld1 { v9.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 11f\n" - "ld1 { v9.s }[2], [x22], #0x4\n" + "ld1 { v9.s }[2], [x19], #0x4\n" "b 11f\n" "10:" // Oddments: Load input (0, 5): Bit 1: Unset - "ld1 { v9.s }[0], [x22], #0x4\n" + "ld1 { v9.s }[0], [x19], #0x4\n" "11:" // Oddments: Load input (0, 5): Bit 1: End - "fmla v30.4s, v4.4s, v9.4s\n" - "ldr s0, [x15, #0x18]\n" - "fmla v29.4s, v4.4s, v6.4s\n" - "ldr x21, [x16, #0x68]\n" - "add x21, x21, x14\n" - "fmla v28.4s, v4.4s, v10.4s\n" - "fmla v31.4s, v0.4s, v7.4s\n" - "fmla v30.4s, v0.4s, v8.4s\n" - "fmla v29.4s, v0.4s, v14.4s\n" + "fmla v29.4s, v4.4s, v9.4s\n" + "fmla v30.4s, v4.4s, v6.4s\n" + "ldr q0, [x16, #0x0]\n" + "ldr x19, [x11, #0x68]\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "fmla v28.4s, v0.4s, v7.4s\n" + "add x19, x19, x10\n" + "fmla v29.4s, v0.4s, v8.4s\n" + "fmla v30.4s, v0.4s, v14.4s\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 12f\n" - "ld1 { v11.d }[0], [x21], #0x8\n" + "ld1 { v11.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 13f\n" - "ld1 { v11.s }[2], [x21], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "b 13f\n" "12:" // Oddments: Load input (2, 1): Bit 1: Unset - "ld1 { v11.s }[0], [x21], #0x4\n" + "ld1 { v11.s }[0], [x19], #0x4\n" "13:" // Oddments: Load input (2, 1): Bit 1: End - "fmla v28.4s, v0.4s, v11.4s\n" - "ldr s1, [x15, #0x1c]\n" - "fmla v31.4s, v1.4s, v8.4s\n" - "ldr x20, [x16, #0x70]\n" - "add x20, x20, x14\n" - "fmla v30.4s, v1.4s, v13.4s\n" - "fmla v29.4s, v1.4s, v11.4s\n" + "ldr q1, [x16, #0x0]\n" + "ldr x19, [x11, #0x70]\n" + "fmla v31.4s, v0.4s, v11.4s\n" + "fmla v28.4s, v1.4s, v8.4s\n" + "fmla v29.4s, v1.4s, v13.4s\n" + "fmla v30.4s, v1.4s, v11.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 14f\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v12.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 15f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "b 15f\n" "14:" // Oddments: Load input (2, 2): Bit 1: Unset - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v12.s }[0], [x19], #0x4\n" "15:" // Oddments: Load input (2, 2): Bit 1: End - "fmla v28.4s, v1.4s, v12.4s\n" - "ldr s2, [x15, #0x20]\n" - "fmla v31.4s, v2.4s, v13.4s\n" - "ldr x19, [x16, #0x78]\n" - "add x19, x19, x14\n" - "fmla v30.4s, v2.4s, v5.4s\n" - "fmla v29.4s, v2.4s, v12.4s\n" + "ldr q2, [x16, #0x0]\n" + "ldr x19, [x11, #0x78]\n" + "fmla v31.4s, v1.4s, v12.4s\n" + "fmla v28.4s, v2.4s, v13.4s\n" + "fmla v29.4s, v2.4s, v5.4s\n" + "fmla v30.4s, v2.4s, v12.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 16f\n" "ld1 { v9.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 17f\n" @@ -694,113 +701,120 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_indirect_impl( "16:" // Oddments: Load input (2, 3): Bit 1: Unset "ld1 { v9.s }[0], [x19], #0x4\n" "17:" // Oddments: Load input (2, 3): Bit 1: End - "fmla v28.4s, v2.4s, v9.4s\n" - "ldr s3, [x15, #0x24]\n" - "fmla v31.4s, v3.4s, v5.4s\n" - "ldr x26, [x16, #0x80]\n" - "add x26, x26, x14\n" - "fmla v30.4s, v3.4s, v6.4s\n" - "fmla v29.4s, v3.4s, v9.4s\n" + "ldr q3, [x16, #0x0]\n" + "ldr x19, [x11, #0x80]\n" + "fmla v31.4s, v2.4s, v9.4s\n" + "fmla v28.4s, v3.4s, v5.4s\n" + "fmla v29.4s, v3.4s, v6.4s\n" + "fmla v30.4s, v3.4s, v9.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 18f\n" - "ld1 { v13.d }[0], [x26], #0x8\n" + "ld1 { v13.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 19f\n" - "ld1 { v13.s }[2], [x26], #0x4\n" + "ld1 { v13.s }[2], [x19], #0x4\n" "b 19f\n" "18:" // Oddments: Load input (2, 4): Bit 1: Unset - "ld1 { v13.s }[0], [x26], #0x4\n" + "ld1 { v13.s }[0], [x19], #0x4\n" "19:" // Oddments: Load input (2, 4): Bit 1: End - "fmla v28.4s, v3.4s, v13.4s\n" - "ldr s4, [x15, #0x28]\n" - "fmla v31.4s, v4.4s, v6.4s\n" - "ldr x25, [x16, #0x88]\n" - "add x25, x25, x14\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "fmla v29.4s, v4.4s, v13.4s\n" + "ldr q4, [x16, #0x0]\n" + "ldr x19, [x11, #0x88]\n" + "fmla v31.4s, v3.4s, v13.4s\n" + "fmla v28.4s, v4.4s, v6.4s\n" + "fmla v29.4s, v4.4s, v10.4s\n" + "fmla v30.4s, v4.4s, v13.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 20f\n" - "ld1 { v8.d }[0], [x25], #0x8\n" + "ld1 { v8.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 21f\n" - "ld1 { v8.s }[2], [x25], #0x4\n" + "ld1 { v8.s }[2], [x19], #0x4\n" "b 21f\n" "20:" // Oddments: Load input (2, 5): Bit 1: Unset - "ld1 { v8.s }[0], [x25], #0x4\n" + "ld1 { v8.s }[0], [x19], #0x4\n" "21:" // Oddments: Load input (2, 5): Bit 1: End - "fmla v28.4s, v4.4s, v8.4s\n" - "ldr s0, [x15, #0x2c]\n" - "fmla v31.4s, v0.4s, v14.4s\n" - "ldr x24, [x16, #0x90]\n" - "add x24, x24, x14\n" - "fmla v30.4s, v0.4s, v11.4s\n" + "ldr q0, [x16, #0x0]\n" + "ldr x19, [x11, #0x90]\n" + "fmla v31.4s, v4.4s, v8.4s\n" + "fmla v28.4s, v0.4s, v14.4s\n" + "fmla v29.4s, v0.4s, v11.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 22f\n" - "ld1 { v5.d }[0], [x24], #0x8\n" + "ld1 { v5.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 23f\n" - "ld1 { v5.s }[2], [x24], #0x4\n" + "ld1 { v5.s }[2], [x19], #0x4\n" "b 23f\n" "22:" // Oddments: Load input (3, 0): Bit 1: Unset - "ld1 { v5.s }[0], [x24], #0x4\n" + "ld1 { v5.s }[0], [x19], #0x4\n" "23:" // Oddments: Load input (3, 0): Bit 1: End - "fmla v29.4s, v0.4s, v5.4s\n" - "ldr x23, [x16, #0x98]\n" - "add x23, x23, x14\n" + "ldr x19, [x11, #0x98]\n" + "fmla v30.4s, v0.4s, v5.4s\n" + "add x19, x19, x10\n" "tbz %x[n_channels], #1, 24f\n" - "ld1 { v6.d }[0], [x23], #0x8\n" + "ld1 { v6.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 25f\n" - "ld1 { v6.s }[2], [x23], #0x4\n" + "ld1 { v6.s }[2], [x19], #0x4\n" "b 25f\n" "24:" // Oddments: Load input (3, 1): Bit 1: Unset - "ld1 { v6.s }[0], [x23], #0x4\n" + "ld1 { v6.s }[0], [x19], #0x4\n" "25:" // Oddments: Load input (3, 1): Bit 1: End - "fmla v28.4s, v0.4s, v6.4s\n" - "ldr s1, [x15, #0x30]\n" - "fmla v31.4s, v1.4s, v11.4s\n" - "ldr x22, [x16, #0xa0]\n" - "add x22, x22, x14\n" - "fmla v30.4s, v1.4s, v12.4s\n" - "fmla v29.4s, v1.4s, v6.4s\n" + "ldr q1, [x16, #0x0]\n" + "ldr x19, [x11, #0xa0]\n" + "fmla v31.4s, v0.4s, v6.4s\n" + "fmla v28.4s, v1.4s, v11.4s\n" + "fmla v29.4s, v1.4s, v12.4s\n" + "fmla v30.4s, v1.4s, v6.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 26f\n" - "ld1 { v10.d }[0], [x22], #0x8\n" + "ld1 { v10.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 27f\n" - "ld1 { v10.s }[2], [x22], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "b 27f\n" "26:" // Oddments: Load input (3, 2): Bit 1: Unset - "ld1 { v10.s }[0], [x22], #0x4\n" + "ld1 { v10.s }[0], [x19], #0x4\n" "27:" // Oddments: Load input (3, 2): Bit 1: End - "fmla v28.4s, v1.4s, v10.4s\n" - "ldr s2, [x15, #0x34]\n" - "fmla v31.4s, v2.4s, v12.4s\n" - "ldr x21, [x16, #0xa8]\n" - "add x21, x21, x14\n" - "fmla v30.4s, v2.4s, v9.4s\n" - "fmla v29.4s, v2.4s, v10.4s\n" + "ldr q2, [x16, #0x0]\n" + "ldr x19, [x11, #0xa8]\n" + "fmla v31.4s, v1.4s, v10.4s\n" + "fmla v28.4s, v2.4s, v12.4s\n" + "fmla v29.4s, v2.4s, v9.4s\n" + "fmla v30.4s, v2.4s, v10.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 28f\n" - "ld1 { v11.d }[0], [x21], #0x8\n" + "ld1 { v11.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 29f\n" - "ld1 { v11.s }[2], [x21], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "b 29f\n" "28:" // Oddments: Load input (3, 3): Bit 1: Unset - "ld1 { v11.s }[0], [x21], #0x4\n" + "ld1 { v11.s }[0], [x19], #0x4\n" "29:" // Oddments: Load input (3, 3): Bit 1: End - "fmla v28.4s, v2.4s, v11.4s\n" - "ldr s3, [x15, #0x38]\n" - "fmla v31.4s, v3.4s, v9.4s\n" - "ldr x20, [x16, #0xb0]\n" - "add x20, x20, x14\n" - "fmla v30.4s, v3.4s, v13.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" + "ldr q3, [x16, #0x0]\n" + "ldr x19, [x11, #0xb0]\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "fmla v28.4s, v3.4s, v9.4s\n" + "fmla v29.4s, v3.4s, v13.4s\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 30f\n" - "ld1 { v12.d }[0], [x20], #0x8\n" + "ld1 { v12.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 31f\n" - "ld1 { v12.s }[2], [x20], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "b 31f\n" "30:" // Oddments: Load input (3, 4): Bit 1: Unset - "ld1 { v12.s }[0], [x20], #0x4\n" + "ld1 { v12.s }[0], [x19], #0x4\n" "31:" // Oddments: Load input (3, 4): Bit 1: End - "fmla v28.4s, v3.4s, v12.4s\n" - "ldr s4, [x15, #0x3c]\n" - "fmla v31.4s, v4.4s, v13.4s\n" - "ldr x19, [x16, #0xb8]\n" - "add x19, x19, x14\n" - "fmla v30.4s, v4.4s, v8.4s\n" - "fmla v29.4s, v4.4s, v12.4s\n" + "ldr q4, [x16, #0x0]\n" + "ldr x19, [x11, #0xb8]\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "fmla v28.4s, v4.4s, v13.4s\n" + "fmla v29.4s, v4.4s, v8.4s\n" + "fmla v30.4s, v4.4s, v12.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 32f\n" "ld1 { v14.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 33f\n" @@ -809,108 +823,114 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_indirect_impl( "32:" // Oddments: Load input (3, 5): Bit 1: Unset "ld1 { v14.s }[0], [x19], #0x4\n" "33:" // Oddments: Load input (3, 5): Bit 1: End - "fmla v28.4s, v4.4s, v14.4s\n" - "ldr s0, [x15, #0x40]\n" - "fmla v31.4s, v0.4s, v5.4s\n" - "ldr x26, [x16, #0xc0]\n" - "add x26, x26, x14\n" - "fmla v30.4s, v0.4s, v6.4s\n" + "ldr q0, [x16, #0x0]\n" + "ldr x19, [x11, #0xc0]\n" + "fmla v31.4s, v4.4s, v14.4s\n" + "fmla v28.4s, v0.4s, v5.4s\n" + "fmla v29.4s, v0.4s, v6.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 34f\n" - "ld1 { v9.d }[0], [x26], #0x8\n" + "ld1 { v9.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 35f\n" - "ld1 { v9.s }[2], [x26], #0x4\n" + "ld1 { v9.s }[2], [x19], #0x4\n" "b 35f\n" "34:" // Oddments: Load input (4, 0): Bit 1: Unset - "ld1 { v9.s }[0], [x26], #0x4\n" + "ld1 { v9.s }[0], [x19], #0x4\n" "35:" // Oddments: Load input (4, 0): Bit 1: End - "fmla v29.4s, v0.4s, v9.4s\n" - "ldr x25, [x16, #0xc8]\n" - "add x25, x25, x14\n" + "ldr x19, [x11, #0xc8]\n" + "fmla v30.4s, v0.4s, v9.4s\n" + "add x19, x19, x10\n" "tbz %x[n_channels], #1, 36f\n" - "ld1 { v13.d }[0], [x25], #0x8\n" + "ld1 { v13.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 37f\n" - "ld1 { v13.s }[2], [x25], #0x4\n" + "ld1 { v13.s }[2], [x19], #0x4\n" "b 37f\n" "36:" // Oddments: Load input (4, 1): Bit 1: Unset - "ld1 { v13.s }[0], [x25], #0x4\n" + "ld1 { v13.s }[0], [x19], #0x4\n" "37:" // Oddments: Load input (4, 1): Bit 1: End - "fmla v28.4s, v0.4s, v13.4s\n" - "ldr s1, [x15, #0x44]\n" - "fmla v31.4s, v1.4s, v6.4s\n" - "ldr x24, [x16, #0xd0]\n" - "add x24, x24, x14\n" - "fmla v30.4s, v1.4s, v10.4s\n" - "fmla v29.4s, v1.4s, v13.4s\n" + "ldr q1, [x16, #0x0]\n" + "ldr x19, [x11, #0xd0]\n" + "fmla v31.4s, v0.4s, v13.4s\n" + "fmla v28.4s, v1.4s, v6.4s\n" + "fmla v29.4s, v1.4s, v10.4s\n" + "fmla v30.4s, v1.4s, v13.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 38f\n" - "ld1 { v5.d }[0], [x24], #0x8\n" + "ld1 { v5.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 39f\n" - "ld1 { v5.s }[2], [x24], #0x4\n" + "ld1 { v5.s }[2], [x19], #0x4\n" "b 39f\n" "38:" // Oddments: Load input (4, 2): Bit 1: Unset - "ld1 { v5.s }[0], [x24], #0x4\n" + "ld1 { v5.s }[0], [x19], #0x4\n" "39:" // Oddments: Load input (4, 2): Bit 1: End - "fmla v28.4s, v1.4s, v5.4s\n" - "ldr s2, [x15, #0x48]\n" - "fmla v31.4s, v2.4s, v10.4s\n" - "ldr x23, [x16, #0xd8]\n" - "add x23, x23, x14\n" - "fmla v30.4s, v2.4s, v11.4s\n" - "fmla v29.4s, v2.4s, v5.4s\n" + "ldr q2, [x16, #0x0]\n" + "ldr x19, [x11, #0xd8]\n" + "fmla v31.4s, v1.4s, v5.4s\n" + "fmla v28.4s, v2.4s, v10.4s\n" + "fmla v29.4s, v2.4s, v11.4s\n" + "fmla v30.4s, v2.4s, v5.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 40f\n" - "ld1 { v6.d }[0], [x23], #0x8\n" + "ld1 { v6.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 41f\n" - "ld1 { v6.s }[2], [x23], #0x4\n" + "ld1 { v6.s }[2], [x19], #0x4\n" "b 41f\n" "40:" // Oddments: Load input (4, 3): Bit 1: Unset - "ld1 { v6.s }[0], [x23], #0x4\n" + "ld1 { v6.s }[0], [x19], #0x4\n" "41:" // Oddments: Load input (4, 3): Bit 1: End - "fmla v28.4s, v2.4s, v6.4s\n" - "ldr s3, [x15, #0x4c]\n" - "fmla v31.4s, v3.4s, v11.4s\n" - "ldr x22, [x16, #0xe0]\n" - "add x22, x22, x14\n" - "fmla v30.4s, v3.4s, v12.4s\n" - "fmla v29.4s, v3.4s, v6.4s\n" + "ldr q3, [x16, #0x0]\n" + "ldr x19, [x11, #0xe0]\n" + "fmla v31.4s, v2.4s, v6.4s\n" + "fmla v28.4s, v3.4s, v11.4s\n" + "fmla v29.4s, v3.4s, v12.4s\n" + "fmla v30.4s, v3.4s, v6.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 42f\n" - "ld1 { v8.d }[0], [x22], #0x8\n" + "ld1 { v8.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 43f\n" - "ld1 { v8.s }[2], [x22], #0x4\n" + "ld1 { v8.s }[2], [x19], #0x4\n" "b 43f\n" "42:" // Oddments: Load input (4, 4): Bit 1: Unset - "ld1 { v8.s }[0], [x22], #0x4\n" + "ld1 { v8.s }[0], [x19], #0x4\n" "43:" // Oddments: Load input (4, 4): Bit 1: End - "fmla v28.4s, v3.4s, v8.4s\n" - "ldr s4, [x15, #0x50]\n" - "fmla v31.4s, v4.4s, v12.4s\n" - "ldr x21, [x16, #0xe8]\n" - "add x21, x21, x14\n" - "fmla v30.4s, v4.4s, v14.4s\n" - "fmla v29.4s, v4.4s, v8.4s\n" + "ldr q4, [x16, #0x0]\n" + "ldr x19, [x11, #0xe8]\n" + "fmla v31.4s, v3.4s, v8.4s\n" + "fmla v28.4s, v4.4s, v12.4s\n" + "fmla v29.4s, v4.4s, v14.4s\n" + "fmla v30.4s, v4.4s, v8.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 44f\n" - "ld1 { v10.d }[0], [x21], #0x8\n" + "ld1 { v10.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 45f\n" - "ld1 { v10.s }[2], [x21], #0x4\n" + "ld1 { v10.s }[2], [x19], #0x4\n" "b 45f\n" "44:" // Oddments: Load input (4, 5): Bit 1: Unset - "ld1 { v10.s }[0], [x21], #0x4\n" + "ld1 { v10.s }[0], [x19], #0x4\n" "45:" // Oddments: Load input (4, 5): Bit 1: End - "fmla v28.4s, v4.4s, v10.4s\n" - "ldr s0, [x15, #0x54]\n" - "fmla v31.4s, v0.4s, v9.4s\n" - "ldr x20, [x16, #0xf0]\n" - "add x20, x20, x14\n" - "fmla v30.4s, v0.4s, v13.4s\n" + "ldr q0, [x16, #0x0]\n" + "ldr x19, [x11, #0xf0]\n" + "fmla v31.4s, v4.4s, v10.4s\n" + "fmla v28.4s, v0.4s, v9.4s\n" + "fmla v29.4s, v0.4s, v13.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 46f\n" - "ld1 { v11.d }[0], [x20], #0x8\n" + "ld1 { v11.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 47f\n" - "ld1 { v11.s }[2], [x20], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "b 47f\n" "46:" // Oddments: Load input (5, 0): Bit 1: Unset - "ld1 { v11.s }[0], [x20], #0x4\n" + "ld1 { v11.s }[0], [x19], #0x4\n" "47:" // Oddments: Load input (5, 0): Bit 1: End - "fmla v29.4s, v0.4s, v11.4s\n" - "ldr x19, [x16, #0xf8]\n" - "add x19, x19, x14\n" + "ldr x19, [x11, #0xf8]\n" + "fmla v30.4s, v0.4s, v11.4s\n" + "add x19, x19, x10\n" "tbz %x[n_channels], #1, 48f\n" "ld1 { v12.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 49f\n" @@ -919,91 +939,94 @@ void a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_indirect_impl( "48:" // Oddments: Load input (5, 1): Bit 1: Unset "ld1 { v12.s }[0], [x19], #0x4\n" "49:" // Oddments: Load input (5, 1): Bit 1: End - "fmla v28.4s, v0.4s, v12.4s\n" - "ldr s1, [x15, #0x58]\n" - "fmla v31.4s, v1.4s, v13.4s\n" - "ldr x26, [x16, #0x100]\n" - "add x26, x26, x14\n" - "fmla v30.4s, v1.4s, v5.4s\n" - "fmla v29.4s, v1.4s, v12.4s\n" + "ldr q1, [x16, #0x0]\n" + "ldr x19, [x11, #0x100]\n" + "fmla v31.4s, v0.4s, v12.4s\n" + "fmla v28.4s, v1.4s, v13.4s\n" + "fmla v29.4s, v1.4s, v5.4s\n" + "fmla v30.4s, v1.4s, v12.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 50f\n" - "ld1 { v9.d }[0], [x26], #0x8\n" + "ld1 { v9.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 51f\n" - "ld1 { v9.s }[2], [x26], #0x4\n" + "ld1 { v9.s }[2], [x19], #0x4\n" "b 51f\n" "50:" // Oddments: Load input (5, 2): Bit 1: Unset - "ld1 { v9.s }[0], [x26], #0x4\n" + "ld1 { v9.s }[0], [x19], #0x4\n" "51:" // Oddments: Load input (5, 2): Bit 1: End - "fmla v28.4s, v1.4s, v9.4s\n" - "ldr s2, [x15, #0x5c]\n" - "fmla v31.4s, v2.4s, v5.4s\n" - "ldr x25, [x16, #0x108]\n" - "add x25, x25, x14\n" - "fmla v30.4s, v2.4s, v6.4s\n" - "fmla v29.4s, v2.4s, v9.4s\n" + "ldr q2, [x16, #0x0]\n" + "ldr x19, [x11, #0x108]\n" + "fmla v31.4s, v1.4s, v9.4s\n" + "fmla v28.4s, v2.4s, v5.4s\n" + "fmla v29.4s, v2.4s, v6.4s\n" + "fmla v30.4s, v2.4s, v9.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 52f\n" - "ld1 { v11.d }[0], [x25], #0x8\n" + "ld1 { v11.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 53f\n" - "ld1 { v11.s }[2], [x25], #0x4\n" + "ld1 { v11.s }[2], [x19], #0x4\n" "b 53f\n" "52:" // Oddments: Load input (5, 3): Bit 1: Unset - "ld1 { v11.s }[0], [x25], #0x4\n" + "ld1 { v11.s }[0], [x19], #0x4\n" "53:" // Oddments: Load input (5, 3): Bit 1: End - "fmla v28.4s, v2.4s, v11.4s\n" - "ldr s3, [x15, #0x60]\n" - "fmla v31.4s, v3.4s, v6.4s\n" - "ldr x24, [x16, #0x110]\n" - "add x24, x24, x14\n" - "fmla v30.4s, v3.4s, v8.4s\n" - "fmla v29.4s, v3.4s, v11.4s\n" + "ldr q3, [x16, #0x0]\n" + "ldr x19, [x11, #0x110]\n" + "fmla v31.4s, v2.4s, v11.4s\n" + "fmla v28.4s, v3.4s, v6.4s\n" + "fmla v29.4s, v3.4s, v8.4s\n" + "fmla v30.4s, v3.4s, v11.4s\n" + "add x19, x19, x10\n" + "add x16, x16, #0x10\n" "tbz %x[n_channels], #1, 54f\n" - "ld1 { v12.d }[0], [x24], #0x8\n" + "ld1 { v12.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 55f\n" - "ld1 { v12.s }[2], [x24], #0x4\n" + "ld1 { v12.s }[2], [x19], #0x4\n" "b 55f\n" "54:" // Oddments: Load input (5, 4): Bit 1: Unset - "ld1 { v12.s }[0], [x24], #0x4\n" + "ld1 { v12.s }[0], [x19], #0x4\n" "55:" // Oddments: Load input (5, 4): Bit 1: End - "fmla v28.4s, v3.4s, v12.4s\n" - "ldr s4, [x15, #0x64]\n" - "fmla v31.4s, v4.4s, v8.4s\n" - "ldr x23, [x16, #0x118]\n" - "add x23, x23, x14\n" - "fmla v30.4s, v4.4s, v10.4s\n" - "fmla v29.4s, v4.4s, v12.4s\n" + "ldr q4, [x16, #0x0]\n" + "ldr x19, [x11, #0x118]\n" + "fmla v31.4s, v3.4s, v12.4s\n" + "fmla v28.4s, v4.4s, v8.4s\n" + "fmla v29.4s, v4.4s, v10.4s\n" + "fmla v30.4s, v4.4s, v12.4s\n" + "add x19, x19, x10\n" "tbz %x[n_channels], #1, 56f\n" - "ld1 { v9.d }[0], [x23], #0x8\n" + "ld1 { v9.d }[0], [x19], #0x8\n" "tbz %x[n_channels], #0, 57f\n" - "ld1 { v9.s }[2], [x23], #0x4\n" + "ld1 { v9.s }[2], [x19], #0x4\n" "b 57f\n" "56:" // Oddments: Load input (5, 5): Bit 1: Unset - "ld1 { v9.s }[0], [x23], #0x4\n" + "ld1 { v9.s }[0], [x19], #0x4\n" "57:" // Oddments: Load input (5, 5): Bit 1: End - "fmla v28.4s, v4.4s, v9.4s\n" - "fmax v31.4s, v31.4s, v18.4s\n" - "fmax v30.4s, v30.4s, v18.4s\n" - "fmax v29.4s, v29.4s, v18.4s\n" - "fmin v31.4s, v31.4s, v17.4s\n" - "fmin v30.4s, v30.4s, v17.4s\n" - "fmin v29.4s, v29.4s, v17.4s\n" + "fmla v31.4s, v4.4s, v9.4s\n" "fmax v28.4s, v28.4s, v18.4s\n" + "fmax v29.4s, v29.4s, v18.4s\n" + "fmax v30.4s, v30.4s, v18.4s\n" + "fmax v31.4s, v31.4s, v18.4s\n" "fmin v28.4s, v28.4s, v17.4s\n" + "fmin v29.4s, v29.4s, v17.4s\n" + "fmin v30.4s, v30.4s, v17.4s\n" + "fmin v31.4s, v31.4s, v17.4s\n" "tbz %x[n_channels], #1, 58f\n" - "st1 { v31.d }[0], [x13], #0x8\n" - "st1 { v30.d }[0], [x12], #0x8\n" - "st1 { v29.d }[0], [x10], #0x8\n" - "st1 { v28.d }[0], [x9], #0x8\n" + "st1 { v28.d }[0], [x15], #0x8\n" + "st1 { v29.d }[0], [x14], #0x8\n" + "st1 { v30.d }[0], [x13], #0x8\n" + "st1 { v31.d }[0], [x12], #0x8\n" "tbz %x[n_channels], #0, 59f\n" - "st1 { v31.s }[2], [x13], #0x4\n" - "st1 { v30.s }[2], [x12], #0x4\n" - "st1 { v29.s }[2], [x10], #0x4\n" - "st1 { v28.s }[2], [x9], #0x4\n" + "st1 { v28.s }[2], [x15], #0x4\n" + "st1 { v29.s }[2], [x14], #0x4\n" + "st1 { v30.s }[2], [x13], #0x4\n" + "st1 { v31.s }[2], [x12], #0x4\n" "b 59f\n" "58:" // Oddments: Store: Bit 1: Unset - "st1 { v31.s }[0], [x13], #0x4\n" - "st1 { v30.s }[0], [x12], #0x4\n" - "st1 { v29.s }[0], [x10], #0x4\n" - "st1 { v28.s }[0], [x9], #0x4\n" + "st1 { v28.s }[0], [x15], #0x4\n" + "st1 { v29.s }[0], [x14], #0x4\n" + "st1 { v30.s }[0], [x13], #0x4\n" + "st1 { v31.s }[0], [x12], #0x4\n" "59:" // Oddments: Store: Bit 1: End "60:" // End |