diff options
Diffstat (limited to 'docs/sections')
| -rw-r--r-- | docs/sections/building.md | 48 | ||||
| -rw-r--r-- | docs/sections/memory_considerations.md | 2 | ||||
| -rw-r--r-- | docs/sections/timing_adapters.md | 47 |
3 files changed, 54 insertions, 43 deletions
diff --git a/docs/sections/building.md b/docs/sections/building.md index 775f71a..e5449b2 100644 --- a/docs/sections/building.md +++ b/docs/sections/building.md @@ -167,7 +167,7 @@ along with the network inputs. It also builds TensorFlow Lite for Microcontrollers library, Arm® *Ethos™-U* NPU driver library, and the CMSIS-DSP library from sources. -The build script is parameterized to support different options (see [common_user_options.cmake](../../scripts/cmake/common_user_options.cmake)). +The build script is parameterized to support different options (see [common_opts.cmake](../../scripts/configuration_options/common_opts.cmake)). Default values for these parameters configure the build for all use-cases to be executed on an MPS3 FPGA or the Fixed Virtual Platform (FVP) implementation of the Arm® *Corstone™-300* design. @@ -209,19 +209,21 @@ The build parameters are: - `ETHOS_U_NPU_ID`: The *Ethos-U* NPU processor: - `U55` (default) - `U65` + - `U85` - `ETHOS_U_NPU_MEMORY_MODE`: The *Ethos-U* NPU memory mode: - `Shared_Sram` (default for *Ethos-U55* NPU) - - `Dedicated_Sram` (default for *Ethos-U65* NPU) + - `Dedicated_Sram` (default for *Ethos-U65* and *Ethos-U85* NPU) - `Sram_Only` - > **Note:** The `Shared_Sram` memory mode is available on both *Ethos-U55* and *Ethos-U65* NPU, `Dedicated_Sram` only - > for *Ethos-U65* NPU and `Sram_Only` only for *Ethos-U55* NPU. + > **Note:** The `Shared_Sram` memory mode is available on *Ethos-U55*, *Ethos-U65* and *Ethos-U85* NPU, + > `Dedicated_Sram` only for *Ethos-U65* and *Ethos-U85* NPU and `Sram_Only` only for *Ethos-U55* NPU. - `ETHOS_U_NPU_CONFIG_ID`: This parameter is set by default based on the value of `ETHOS_U_NPU_ID`. For Ethos-U55, it defaults to the `H128` indicating that the Ethos-U55 128 MAC optimised model - should be used. For Ethos-U65, it defaults to `Y256` instead. However, the user can override these - defaults to a configuration ID from `H32`, `H64`, `H256` and `Y512`. + should be used. For Ethos-U65, it defaults to `Y256` and for Ethos-U85 it defaults to `Z512`. + However, the user can override these defaults to a configuration ID from `H32`, `H64`, `H256`, `Y512`, + `Z128`, `Z256`, `Z1024` and `Z2048`. > **Note:** This ID is only used to choose which tflite file path is to be used by the CMake > configuration for all the use cases. If the user has overridden use-case specific model path @@ -231,7 +233,8 @@ The build parameters are: > chosen configuration. - `ETHOS_U_NPU_CACHE_SIZE`: The *Ethos-U* NPU cache size used if the *Ethos-U* NPU processor selected with the option - `ETHOS_U_NPU_ID` is `U65`. Default value is 393216 (see [default_vela.ini](../../scripts/vela/default_vela.ini) ). + `ETHOS_U_NPU_ID` is `U65` or `U85`. + Default value is 393216 (see [default_vela.ini](../../scripts/vela/default_vela.ini) ). - `CPU_PROFILE_ENABLED`: Sets whether profiling information for the CPU core should be displayed. By default, this is set to false, but can be turned on for FPGA targets. The FVP and the CPU core cycle counts are **not** meaningful and @@ -266,7 +269,8 @@ The build parameters are: - `TA_CONFIG_FILE`: The path to the CMake configuration file that contains the timing adapter parameters. Used only if the timing adapter build is enabled. Default for Ethos-U55 NPU is [ta_config_u55_high_end.cmake](../../scripts/timing_adapter/ta_config_u55_high_end.cmake), - for Ethos-U65 NPU is [ta_config_u55_high_end.cmake](../../scripts/timing_adapter/ta_config_u55_high_end.cmake). + for Ethos-U65 NPU is [ta_config_u55_high_end.cmake](../../scripts/timing_adapter/ta_config_u55_high_end.cmake) and + for Ethos-U85 NPU is [ta_config_u85_high_end.cmake](../../scripts/timing_adapter/ta_config_u85_high_end.cmake). - `TENSORFLOW_LITE_MICRO_CLEAN_BUILD`: Optional parameter to enable, or disable, "cleaning" prior to building for the TensorFlow Lite Micro library. Enabled by default. @@ -357,8 +361,8 @@ python3 ./set_up_default_resources.py ``` This fetches every model into the `resources_downloaded` directory. It also optimizes the models using the Vela compiler -for the default 128 MACs configuration of the Arm® *Ethos™-U55* NPU and for the default 256 MACs configuration of the -Arm® *Ethos™-U65* NPU. +for the default 128 MACs configuration of the Arm® *Ethos™-U55* NPU, the default 256 MACs configuration of the +Arm® *Ethos™-U65* NPU and the 512 MACs configuration of the Arm® *Ethos™-U85* NPU. > **Note:** This script requires Python version 3.10 or higher. Please make sure all [build prerequisites](./building.md#build-prerequisites) > are satisfied. If your environment points to system installed Python3 that is an older version than 3.10, choose the @@ -381,15 +385,16 @@ Additional command line arguments supported by this script are: --additional-ethos-u-config-name ethos-u65-512 ``` - > **Note:** As the argument name suggests, the configuration names are **in addition to** the default ones: `ethos-u55-128` - > and `ethosu-u65-256`. + > **Note:** As the argument name suggests, the configuration names are **in addition to** the default ones: + > `ethos-u55-128`, `ethosu-u65-256` and `ethosu-u85-512`. - `--arena-cache-size`: the size of the arena cache memory area, in bytes. The default value is: - the internal SRAM size for Corstone-300 implementation on MPS3 specified by AN552, when optimizing for the default 128 MACs configuration of the Arm® *Ethos™-U55* NPU. - the default value specified in the Vela configuration file [default_vela.ini](../../scripts/vela/default_vela.ini), - when optimizing for the default 256 MACs configuration of the Arm® *Ethos™-U65* NPU. + when optimizing for the default 256 MACs configuration of the Arm® *Ethos™-U65* NPU + or the default 512 MACs configuration of the Arm® *Ethos™-U85* NPU. ### Building for default configuration @@ -421,7 +426,11 @@ Additional command line arguments supported by this script are: - `ethos-u55-128` - `ethos-u55-256` - `ethos-u65-256` - - `ethos-u65-512` + - `ethos-u65-128` + - `ethos-u85-256` + - `ethos-u85-512` + - `ethos-u85-1024` + - `ethos-u85-2048` - `--make-jobs`: Specifies the number of concurrent jobs to use for compilation. The default value is equal to the number of cores in the system. Lowering this value can be useful in case of limited resources. @@ -744,7 +753,8 @@ vela \ The Vela command contains the following: - `--accelerator-config`: Specifies the accelerator configuration to use between `ethos-u55-256`, `ethos-u55-128`, - `ethos-u55-64`, `ethos-u55-32`, `ethos-u65-256`, and `ethos-u65-512`. + `ethos-u55-64`, `ethos-u55-32`, `ethos-u65-256`, `ethos-u65-512`, `ethos-u85-128`, `ethos-u85-256`, `ethos-u85-512`, + `ethos-u85-1024` and `ethos-u85-2048`. - `--optimise`: Sets the optimisation strategy to Performance or Size. The Size strategy results in a model minimising the SRAM usage whereas the Performance strategy optimises the neural network for maximal performance. Note that if using the Performance strategy, you can also pass the `--arena-cache-size` option to Vela. @@ -752,7 +762,11 @@ The Vela command contains the following: file. An example can be found in the `dependencies` folder [default_vela.ini](../../scripts/vela/default_vela.ini). - `--memory-mode`: Selects the memory mode to use as specified in the Vela configuration file. - `--system-config`: Selects the system configuration to use as specified in the Vela configuration file: - `Ethos_U55_High_End_Embedded`for *Ethos-U55* and `Ethos_U65_High_End` for *Ethos-U65*. + `Ethos_U55_High_End_Embedded`for *Ethos-U55*, `Ethos_U65_High_End` for *Ethos-U65*, + `Ethos_U85_SYS_DRAM_Low` for *Ethos-U85* with 128 or 256 MACs configurations, + `Ethos_U85_SYS_DRAM_Mid_512` for *Ethos-U85* with 512 MACs configuration, + `Ethos_U85_SYS_DRAM_Mid_1024` for *Ethos-U85* with 1024 MACs configuration and + `Ethos_U85_SYS_DRAM_Mid_2048` for *Ethos-U85* with 2048 MACs configuration. Vela compiler accepts `.tflite` file as input and saves optimized network model as a `.tflite` file. @@ -776,7 +790,7 @@ using the *Ethos-U55* High End timing adapter system configuration. To build for a different *Ethos-U* NPU variant: - Optimize the model with Vela compiler with the correct parameters. See [Optimize custom model with Vela compiler](./building.md#optimize-custom-model-with-vela-compiler). -- Use the correct `ETHOS_U_NPU_ID`: `U55` for *Ethos-U55* NPU, `U65` for *Ethos-U65* NPU. +- Use the correct `ETHOS_U_NPU_ID`: `U55` for *Ethos-U55* NPU, `U65` for *Ethos-U65* NPU or `U85` for *Ethos-U85*. - Use the Vela model as custom model in the building command. See [Add custom model](./building.md#add-custom-model) - Use the correct timing adapter settings configuration. See [Building timing adapter with custom options](./building.md#building-timing-adapter-with-custom-options) diff --git a/docs/sections/memory_considerations.md b/docs/sections/memory_considerations.md index 30b36ac..20c6007 100644 --- a/docs/sections/memory_considerations.md +++ b/docs/sections/memory_considerations.md @@ -77,7 +77,7 @@ Other than the obvious link between the linker script and the target profile des CMake files, there are other parameters linked to what the reserved space for activation buffers is. These are: -- The file [set_up_default_resources.py](../../set_up_default_resources.py) contains a +- The file [vela_configs.py](../../scripts/py/vela_configs.py) contains a parameter called `mps3_max_sram_sz`: ```python diff --git a/docs/sections/timing_adapters.md b/docs/sections/timing_adapters.md index 24f2fc9..f232450 100644 --- a/docs/sections/timing_adapters.md +++ b/docs/sections/timing_adapters.md @@ -66,26 +66,26 @@ The CMake build framework allows the parameters to control the behavior of each For the CMake build configuration of the timing adapter, the SRAM AXI is assigned `index 0` and the flash, or DRAM, AXI bus has `index 1`. -To change the bus parameter for the build a "***TA_\<index>_*"** prefix should be added to the above. For example, -**TA0_MAXR=10** sets the maximum pending reads to 10 on the SRAM AXI bus. +To change the bus parameter for the build an "***SRAM***" or "***EXT***" prefix should be added to the above. For example, +**SRAM_MAXR=10** sets the maximum pending reads to 10 on the SRAM AXI bus. As an example, if we have the following parameters for the flash, or DRAM, region: -- `TA1_MAXR` = "2" +- `EXT_MAXR` = "2" -- `TA1_MAXW` = "0" +- `EXT_MAXW` = "0" -- `TA1_MAXRW` = "0" +- `EXT_MAXRW` = "0" -- `TA1_RLATENCY` = "64" +- `EXT_RLATENCY` = "64" -- `TA1_WLATENCY` = "32" +- `EXT_WLATENCY` = "32" -- `TA1_PULSE_ON` = "320" +- `EXT_PULSE_ON` = "320" -- `TA1_PULSE_OFF` = "80" +- `EXT_PULSE_OFF` = "80" -- `TA1_BWCAP` = "50" +- `EXT_BWCAP` = "50" For a clock rate of 500MHz, this would translate to: @@ -109,24 +109,21 @@ For a clock rate of 500MHz, this would translate to: This suggests that the read operation is only limited by the overall bus bandwidth. Timing adapter requires recompilation to change parameters. Default timing adapter configuration file pointed to by -`TA_CONFIG_FILE` build parameter is located in the `scripts/cmake folder` and contains all options for `AXI0` and `AXI1` +`TA_CONFIG_FILE` build parameter is located in the `scripts/cmake folder` and contains all options for `SRAM` and `EXT` as previously described. here is an example of `scripts/cmake/timing_adapter/ta_config_u55_high_end.cmake`: ```cmake -# Timing adapter options -set(TA_INTERACTIVE OFF) - -# Timing adapter settings for AXI0 -set(TA0_MAXR "8") -set(TA0_MAXW "8") -set(TA0_MAXRW "0") -set(TA0_RLATENCY "32") -set(TA0_WLATENCY "32") -set(TA0_PULSE_ON "3999") -set(TA0_PULSE_OFF "1") -set(TA0_BWCAP "4000") +# Timing adapter settings for SRAM +set(SRAM_MAXR "8") +set(SRAM_MAXW "8") +set(SRAM_MAXRW "0") +set(SRAM_RLATENCY "32") +set(SRAM_WLATENCY "32") +set(SRAM_PULSE_ON "3999") +set(SRAM_PULSE_OFF "1") +set(SRAM_BWCAP "4000") ... ``` @@ -148,8 +145,8 @@ not support the feature. Additionally - base addresses of timer adapters blocks | TA Number | Interface TA is placed on | Base address (non-secure/secure) | Size | |-----------|---------------------------|----------------------------------|-------| -| 0 | M0/AXI0 for Ethos-U NPU | 0x4810_3000/0x5810_3000 | 0.5KB | -| 1 | M1/AXI1 for Ethos-U NPU | 0x4810_3200/0x5810_3200 | 0.5KB | +| 0 | M0/SRAM0 for Ethos-U NPU | 0x4810_3000/0x5810_3000 | 0.5KB | +| 1 | M1/EXT0 for Ethos-U NPU | 0x4810_3200/0x5810_3200 | 0.5KB | ### Timer Adapter for Corstone-310 FPGA: |