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| author | Tim Hall <tim.hall@arm.com> | 2020-05-18 18:04:26 +0100 |
|---|---|---|
| committer | Tim Hall <tim.hall@arm.com> | 2020-06-18 17:53:52 +0100 |
| commit | 25f605c9dbc5d51208eec66d359457677cc73673 (patch) | |
| tree | d0cac6ad84a7589960631a590741504ddcf947fb /ethosu/vela/tflite_writer.py | |
| parent | cf7da10987cac3fc68cf180a9af665fe06d608fa (diff) | |
| download | ethos-u-vela-25f605c9dbc5d51208eec66d359457677cc73673.tar.gz | |
vela: Add support for CPU only networks
- Fix various problems when no operators run on Ethos-U55
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I44a1a914fabb7ca26c921a02753da8abeecd9c7b
Diffstat (limited to 'ethosu/vela/tflite_writer.py')
| -rw-r--r-- | ethosu/vela/tflite_writer.py | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/ethosu/vela/tflite_writer.py b/ethosu/vela/tflite_writer.py index 99df849b..675b6985 100644 --- a/ethosu/vela/tflite_writer.py +++ b/ethosu/vela/tflite_writer.py @@ -134,12 +134,17 @@ class TFLiteSerialiser: return builder.EndVector(len(v)) def assign_buffers_to_tensors(self, tensors): + scratch_tensors = [tens for tens in tensors if tens.purpose == TensorPurpose.Scratch] + if len(scratch_tensors) > 0: + scratch_tensor_mem_area = scratch_tensors[0].mem_area + else: + scratch_tensor_mem_area = None # all tensors are initialised to MemArea.Unknown + buffer_map = {} - scratch_tensor = [tens for tens in tensors if tens.purpose == TensorPurpose.Scratch][0] buf_idx = 1 for tens in tensors: - if tens.mem_area == scratch_tensor.mem_area: + if tens.mem_area == scratch_tensor_mem_area: buffer_map[tens] = self.scratch_buf_id else: buffer_map[tens] = buf_idx |