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author | Johan Alfven <johan.alfven@arm.com> | 2024-04-02 16:32:54 +0200 |
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committer | Johan Alfven <johan.alfven@arm.com> | 2024-04-03 19:43:44 +0200 |
commit | 55d90dd1f51e95e3b066ab2976b595107cc485c9 (patch) | |
tree | 5880ca8e021724367550134621581a8da3bbfbc7 /ethosu/vela/test/test_lut.py | |
parent | e4d2f218fbdba4aa58380e9dfc42688330a70512 (diff) | |
download | ethos-u-vela-55d90dd1f51e95e3b066ab2976b595107cc485c9.tar.gz |
MLBEDSW-8873: MLCE: Update LUT index calculation
- A network containing several softmax operators caused an
output diff
- The problem was that the code that detects if the LUT is
already in internal SRAM calculated everything correctly except
for which lut index to use.
- The code should use the slot_size and not then LUT size when
calculating the index which fixes this problem.
- Updated unit tests
Change-Id: I07686651a883ccbba7c173e7191eb21f9ff15bf5
Signed-off-by: Johan Alfven <johan.alfven@arm.com>
Diffstat (limited to 'ethosu/vela/test/test_lut.py')
-rw-r--r-- | ethosu/vela/test/test_lut.py | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/ethosu/vela/test/test_lut.py b/ethosu/vela/test/test_lut.py index e52b4896..70b71470 100644 --- a/ethosu/vela/test/test_lut.py +++ b/ethosu/vela/test/test_lut.py @@ -1,4 +1,4 @@ -# SPDX-FileCopyrightText: Copyright 2020-2021, 2023 Arm Limited and/or its affiliates <open-source-office@arm.com> +# SPDX-FileCopyrightText: Copyright 2020-2021, 2023-2024 Arm Limited and/or its affiliates <open-source-office@arm.com> # # SPDX-License-Identifier: Apache-2.0 # @@ -131,14 +131,20 @@ def test_optimize_high_level_cmd_stream_2K(): assert cmd.in_tensor == op.activation_lut.src_tensor # Check that lut0, lut1 and lut2 in op0, op1, op2 are stored on different addresses assert orig_cmd_list[0].out_tensor.address != orig_cmd_list[1].out_tensor.address + assert orig_cmd_list[0].ps.primary_op.activation.lut_index != orig_cmd_list[1].ps.primary_op.activation.lut_index assert orig_cmd_list[0].out_tensor.address != orig_cmd_list[2].out_tensor.address + assert orig_cmd_list[0].ps.primary_op.activation.lut_index != orig_cmd_list[2].ps.primary_op.activation.lut_index assert orig_cmd_list[1].out_tensor.address != orig_cmd_list[2].out_tensor.address + assert orig_cmd_list[1].ps.primary_op.activation.lut_index != orig_cmd_list[2].ps.primary_op.activation.lut_index # Check that lut1 in op1 and op3 have same address assert orig_cmd_list[1].out_tensor.address == orig_cmd_list[3].out_tensor.address + assert orig_cmd_list[1].ps.primary_op.activation.lut_index == orig_cmd_list[3].ps.primary_op.activation.lut_index # Check that lut2 in op2 and op4 have same address assert orig_cmd_list[2].out_tensor.address == orig_cmd_list[4].out_tensor.address + assert orig_cmd_list[2].ps.primary_op.activation.lut_index == orig_cmd_list[4].ps.primary_op.activation.lut_index # Check that lut-s for 16 bit (op5 and op6) are stored on same address assert orig_cmd_list[5].out_tensor.address == orig_cmd_list[6].out_tensor.address + assert orig_cmd_list[5].ps.primary_op.activation.lut_index == orig_cmd_list[6].ps.primary_op.activation.lut_index def test_optimize_high_level_cmd_stream_1K(): @@ -186,10 +192,16 @@ def test_optimize_high_level_cmd_stream_1K(): assert cmd.in_tensor == op.activation_lut.src_tensor # Check that lut0, lut1 and lut2 in op0, op1, op2 are stored on different addresses assert orig_cmd_list[0].out_tensor.address != orig_cmd_list[1].out_tensor.address + assert orig_cmd_list[0].ps.primary_op.activation.lut_index != orig_cmd_list[1].ps.primary_op.activation.lut_index assert orig_cmd_list[0].out_tensor.address != orig_cmd_list[2].out_tensor.address + assert orig_cmd_list[0].ps.primary_op.activation.lut_index != orig_cmd_list[2].ps.primary_op.activation.lut_index assert orig_cmd_list[1].out_tensor.address != orig_cmd_list[2].out_tensor.address + assert orig_cmd_list[1].ps.primary_op.activation.lut_index != orig_cmd_list[2].ps.primary_op.activation.lut_index # Check that lut1 in op1 and op3 have same address assert orig_cmd_list[1].out_tensor.address == orig_cmd_list[3].out_tensor.address + assert orig_cmd_list[1].ps.primary_op.activation.lut_index == orig_cmd_list[3].ps.primary_op.activation.lut_index # Check that lut2 in op2 and op4 and op7 have same address assert orig_cmd_list[2].out_tensor.address == orig_cmd_list[4].out_tensor.address + assert orig_cmd_list[2].ps.primary_op.activation.lut_index == orig_cmd_list[4].ps.primary_op.activation.lut_index assert orig_cmd_list[2].out_tensor.address == orig_cmd_list[7].out_tensor.address + assert orig_cmd_list[2].ps.primary_op.activation.lut_index == orig_cmd_list[7].ps.primary_op.activation.lut_index |