aboutsummaryrefslogtreecommitdiff
path: root/ethosu/vela/high_level_command_stream.py
diff options
context:
space:
mode:
authorLouis Verhaard <louis.verhaard@arm.com>2020-08-21 14:06:25 +0200
committerLouis Verhaard <louis.verhaard@arm.com>2020-08-26 08:18:27 +0200
commit814cfbb8124ba0b3828db2bb12d9342ae9c39f19 (patch)
tree519f7f41091efa944f6c4e3eb732892c56da40e1 /ethosu/vela/high_level_command_stream.py
parent7579c75d870c25ee075e46a110b6b89cf266db64 (diff)
downloadethos-u-vela-814cfbb8124ba0b3828db2bb12d9342ae9c39f19.tar.gz
MLBEDSW-2688: LUT DMA may require kernel wait
LUT related updates specific for 16K SHRAM: - prevent LUT DMA transfer from overwriting accumulator SHRAM of an ongoing operation - do not use the last 2K of SHRAM as accumulator during LUT operations Change-Id: I17066e0410c6f07b125ed245002d7b19269a7a8a Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
Diffstat (limited to 'ethosu/vela/high_level_command_stream.py')
-rw-r--r--ethosu/vela/high_level_command_stream.py4
1 files changed, 4 insertions, 0 deletions
diff --git a/ethosu/vela/high_level_command_stream.py b/ethosu/vela/high_level_command_stream.py
index 95af1ccb..b8a19f50 100644
--- a/ethosu/vela/high_level_command_stream.py
+++ b/ethosu/vela/high_level_command_stream.py
@@ -243,6 +243,10 @@ class NpuStripe(Command):
MemoryRangeSet(tens.mem_area, tens.address, tens.address + tens.storage_size()),
AccessDirection.Read,
)
+ # Add write access to SHRAM, needed when LUTs can overwrite accumulator banks
+ res.add(
+ self.ps.shared_buffer.get_shram_memory_access_range(), AccessDirection.Write,
+ )
return res
def is_npu_pass_command(self):