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authorDwight Lidman <dwight.lidman@arm.com>2020-05-06 14:09:17 +0200
committerTim Hall <tim.hall@arm.com>2020-06-18 17:53:52 +0100
commit0538a77dfe65b66efedc4e4b92d851a5aeb46ea4 (patch)
tree73afa3d08b717f33533de0eb6c0c5ebe6754bfe7
parent10349e70e994130d9e1ac8b72f32575025b2b453 (diff)
downloadethos-u-vela-0538a77dfe65b66efedc4e4b92d851a5aeb46ea4.tar.gz
MLBEDSW-1970: Add stride 3 support
This patch adds support for strides of size 3. It removes some obsolete code for a corner case that no longer exists. It also changes the setting of the bitfield in NPU_SET_KERNEL_STRIDE so that it matches the specification. Change-Id: I7dabcf72b7826ca0b3c98e9d23209027204079a8 Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
-rw-r--r--ethosu/vela/architecture_features.py20
-rw-r--r--ethosu/vela/register_command_stream_generator.py11
-rw-r--r--ethosu/vela/supported_operators.py4
3 files changed, 13 insertions, 22 deletions
diff --git a/ethosu/vela/architecture_features.py b/ethosu/vela/architecture_features.py
index 4a03d0ef..51c632e0 100644
--- a/ethosu/vela/architecture_features.py
+++ b/ethosu/vela/architecture_features.py
@@ -348,15 +348,7 @@ Note the difference between ArchitectureFeatures and CompilerOptions
+ ifm_odd_2x_height_enable
) // upscaling
- if kernel.stride.y == 1:
- ifm_block_height = round_up(ifm_block_height, self.ofm_ublock.height)
- elif kernel.stride.y == 2:
- if (self.ofm_ublock.height == 2) and (ifm_block_height % 4 == 2):
- ifm_block_height = ifm_block_height + 2
- else:
- ifm_block_height = round_up(ifm_block_height, self.ofm_ublock.height)
- else:
- assert False
+ ifm_block_height = round_up(ifm_block_height, self.ofm_ublock.height)
# Width
ifm_odd_2x_width_enable = 0
@@ -367,15 +359,7 @@ Note the difference between ArchitectureFeatures and CompilerOptions
+ ifm_odd_2x_width_enable
) // upscaling
- if kernel.stride.x == 1:
- ifm_block_width = round_up(ifm_block_width, self.ofm_ublock.width)
- elif kernel.stride.x == 2:
- if (self.ofm_ublock.width == 2) and (ifm_block_width % 4 == 2):
- ifm_block_width = ifm_block_width + 2
- else:
- ifm_block_width = round_up(ifm_block_width, self.ofm_ublock.width)
- else:
- assert False
+ ifm_block_width = round_up(ifm_block_width, self.ofm_ublock.width)
return Block(ifm_block_width, ifm_block_height, ifm_block_depth)
diff --git a/ethosu/vela/register_command_stream_generator.py b/ethosu/vela/register_command_stream_generator.py
index a2b2f4d0..120cf8b1 100644
--- a/ethosu/vela/register_command_stream_generator.py
+++ b/ethosu/vela/register_command_stream_generator.py
@@ -569,8 +569,15 @@ def generate_register_command_stream(nng, sg, arch, verbose=False):
emit.cmd0_with_param(cmd0.NPU_SET_IFM_PAD_BOTTOM, explicit_padding[2])
emit.cmd0_with_param(cmd0.NPU_SET_IFM_PAD_RIGHT, explicit_padding[3])
- stride = primary_op.attrs["strides"][2] - 1
- stride |= (primary_op.attrs["strides"][1] - 1) << 1
+ # set kernel x stride low bit
+ stride = primary_op.attrs["strides"][2] - 1 & 1
+ # set kernel y stride low bit
+ stride |= (primary_op.attrs["strides"][1] - 1 & 1) << 1
+ # set kernel x stride extension bits
+ stride |= (primary_op.attrs["strides"][2] - 1 >> 1) << 6
+ # set kernel y stride extension bits
+ stride |= (primary_op.attrs["strides"][1] - 1 >> 1) << 9
+
if npu_block_type == NpuBlockType.Pooling:
k_height, k_width = primary_op.attrs["ksize"][1:3]
diff --git a/ethosu/vela/supported_operators.py b/ethosu/vela/supported_operators.py
index fb3061f7..1e11d788 100644
--- a/ethosu/vela/supported_operators.py
+++ b/ethosu/vela/supported_operators.py
@@ -142,7 +142,7 @@ class SupportedOperators:
def check_convolution_restrictions(self, op):
# check stride
- if op.attrs["stride_w"] > 2 or op.attrs["stride_h"] > 2:
+ if op.attrs["stride_w"] > 3 or op.attrs["stride_h"] > 3:
return False
# check dilation
@@ -182,7 +182,7 @@ class SupportedOperators:
def check_pooling_restrictions(self, op):
# check stride
- if op.attrs["stride_w"] > 2 or op.attrs["stride_h"] > 2:
+ if op.attrs["stride_w"] > 3 or op.attrs["stride_h"] > 3:
return False
# check data type