Build OpenAMP from recipe23.02-rc1

Change-Id: Id36d97fa3aa4a60179bedbdc078c4e1e75486a49

1 files changed, 69 insertions, 0 deletions

diff --git a/openamp/src/system/generic/cortexm/sys.c b/openamp/src/system/generic/cortexm/sys.c
new file mode 100644
index 0000000..7034663
--- /dev/null
+++ b/openamp/src/system/generic/cortexm/sys.c
@@ -0,0 +1,69 @@
+/*
+ * SPDX-FileCopyrightText: Copyright 2022 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*
+ * @file	generic/cortexm/sys.c
+ * @brief	cortex m system primitives implementation.
+ */
+
+#include <metal/io.h>
+#include <metal/sys.h>
+#include <metal/utilities.h>
+#include <stdint.h>
+
+void sys_irq_restore_enable(unsigned int flags)
+{
+	metal_unused(flags);
+	/* we disable/enable all IRQs */
+	__enable_irq();
+}
+
+unsigned int sys_irq_save_disable(void)
+{
+	/* we disable/enable all IRQs */
+	__disable_irq();
+	return 0;
+}
+
+void sys_irq_enable(unsigned int vector)
+{
+	NVIC_EnableIRQ(vector);
+}
+
+void sys_irq_disable(unsigned int vector)
+{
+	NVIC_DisableIRQ(vector);
+}
+
+void metal_machine_cache_flush(void *addr, unsigned int len)
+{
+#if (defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U))
+	SCB_CleanDCache_by_Addr(addr, len);
+#else
+	metal_unused(addr);
+	metal_unused(len);
+#endif
+}
+
+void metal_machine_cache_invalidate(void *addr, unsigned int len)
+{
+#if (defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U))
+	SCB_InvalidateDCache_by_Addr(addr, len);
+#else
+	metal_unused(addr);
+	metal_unused(len);
+#endif
+}
+
+void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa,
+			       size_t size, unsigned int flags)
+{
+	metal_unused(pa);
+	metal_unused(size);
+	metal_unused(flags);
+
+	return va;
+}