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authorKristofer Jonsson <kristofer.jonsson@arm.com>2022-10-18 11:34:23 +0200
committerKristofer Jonsson <kristofer.jonsson@arm.com>2022-10-18 11:56:26 +0200
commit01c32d4768d8176a32c193f44069da1f43fbf513 (patch)
tree881b81e57e5370190da098226c17e182e7b85bd4
parent5f2200d06aa096fd707d87ff5bdf0d01c44009c7 (diff)
downloadethos-u-core-platform-01c32d4768d8176a32c193f44069da1f43fbf513.tar.gz
Configure write-through caching for Corstone-310 BRAM
Change-Id: I5e0fc2ecbbf416ca07be6b9d65e989c1c116b219
-rw-r--r--drivers/mpu/include/mpu.hpp4
-rw-r--r--drivers/mpu/src/mpu.cpp3
-rw-r--r--targets/corstone-310/target.cpp4
3 files changed, 7 insertions, 4 deletions
diff --git a/drivers/mpu/include/mpu.hpp b/drivers/mpu/include/mpu.hpp
index dff73b6..9f85788 100644
--- a/drivers/mpu/include/mpu.hpp
+++ b/drivers/mpu/include/mpu.hpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright 2020-2022 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,7 +29,7 @@
namespace EthosU {
namespace Mpu {
-enum { WTRA_index, WBWARA_index };
+enum { WTRA_index, WBWARA_index, WTWARA_index };
/**
* Dump the MPU tables.
diff --git a/drivers/mpu/src/mpu.cpp b/drivers/mpu/src/mpu.cpp
index 8e6a9e2..bd5c6cd 100644
--- a/drivers/mpu/src/mpu.cpp
+++ b/drivers/mpu/src/mpu.cpp
@@ -58,9 +58,12 @@ static void initializeAttributes() {
const uint8_t WTRA =
ARM_MPU_ATTR_MEMORY_(1, 0, 1, 0); // Non-transient, Write-Through, Read-allocate, Not Write-allocate
const uint8_t WBWARA = ARM_MPU_ATTR_MEMORY_(1, 1, 1, 1); // Non-transient, Write-Back, Read-allocate, Write-allocate
+ const uint8_t WTWARA =
+ ARM_MPU_ATTR_MEMORY_(1, 0, 1, 1); // Non-transient, Write-Through, Read-allocate, Write-allocate
ARM_MPU_SetMemAttr(WTRA_index, ARM_MPU_ATTR(WTRA, WTRA));
ARM_MPU_SetMemAttr(WBWARA_index, ARM_MPU_ATTR(WBWARA, WBWARA));
+ ARM_MPU_SetMemAttr(WTWARA_index, ARM_MPU_ATTR(WTWARA, WTWARA));
}
#endif
diff --git a/targets/corstone-310/target.cpp b/targets/corstone-310/target.cpp
index 3b2820f..a91bc67 100644
--- a/targets/corstone-310/target.cpp
+++ b/targets/corstone-310/target.cpp
@@ -389,7 +389,7 @@ void targetSetup() {
1, // Non-Privileged
0), // eXecute Never disabled
ARM_MPU_RLAR(0x213fffff, // Limit
- Mpu::WBWARA_index) // Attribute index - Write-Back, Write-Allocate, Read-allocate
+ Mpu::WTWARA_index) // Attribute index - Write-Through, Write-Allocate, Read-allocate
},
{
// SSE-300 internal SRAM (S)
@@ -399,7 +399,7 @@ void targetSetup() {
1, // Non-Privileged
0), // eXecute Never disabled
ARM_MPU_RLAR(0x313fffff, // Limit
- Mpu::WBWARA_index) // Attribute index - Write-Back, Write-Allocate, Read-allocate
+ Mpu::WTWARA_index) // Attribute index - Write-Through, Write-Allocate, Read-allocate
},
{
// DDR (NS)