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| author | Bhavik Patel <bhavik.patel@arm.com> | 2020-06-15 10:09:28 +0200 |
|---|---|---|
| committer | Bhavik Patel <bhavik.patel@arm.com> | 2020-06-17 09:23:57 +0200 |
| commit | 4e8dbf5da9c357a8d6903bfdd0ef475f2144575b (patch) | |
| tree | c5388e22aa54c5ef45b6cde49aaef7e5f286fca6 | |
| parent | 60d50aed96d80a8f561c2e549b3b1b217e405e80 (diff) | |
| download | ethos-u-core-driver-4e8dbf5da9c357a8d6903bfdd0ef475f2144575b.tar.gz | |
MLBEDSW-2373 Add APIs to configure PMCCNTR_CFG register
Change-Id: I73c612746ca678d32d3dec3e1c5619ee1077c012
| -rw-r--r-- | include/pmu_ethosu.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/include/pmu_ethosu.h b/include/pmu_ethosu.h index a95f824..e0af980 100644 --- a/include/pmu_ethosu.h +++ b/include/pmu_ethosu.h @@ -136,6 +136,8 @@ extern PMU_Ethosu_evnt_Type *ethosu_pmu_evnt; #define ETHOSU_PMU_CNT3_Msk (1UL << 2) #define ETHOSU_PMU_CNT4_Msk (1UL << 3) #define ETHOSU_PMU_CCNT_Msk (1UL << 31) +#define ETHOSU_PMCCNTR_CFG_START_EVENT_MASK (0x3FF) +#define ETHOSU_PMCCNTR_CFG_STOP_EVENT_MASK (0x3FF << 16) /* Transpose functions between HW-event-type and event-id*/ enum ethosu_pmu_event_type pmu_event_type(uint32_t); @@ -426,6 +428,32 @@ static inline void ETHOSU_PMU_CNTR_Increment(uint32_t mask) } } +/** + \brief Set start event number for the cycle counter + \param [in] start_event Event number + - Start event (bits [9:0]) + \note Sets the event number that starts the cycle counter. + - Event number in the range 0..1023 +*/ +static inline void ETHOSU_PMU_PMCCNTR_CFG_Set_Start_Event(uint32_t start_event) +{ + uint32_t val = ethosu_pmu_ctrl->PMCCNTR_CFG & ~ETHOSU_PMCCNTR_CFG_START_EVENT_MASK; + ethosu_pmu_ctrl->PMCCNTR_CFG = val | (start_event & ETHOSU_PMCCNTR_CFG_START_EVENT_MASK); +} + +/** + \brief Set stop event number for the cycle counter + \param [in] stop_event Event number + - Stop event (bits [25:16]) + \note Sets the event number that stops the cycle counter. + - Event number in the range 0..1023 +*/ +static inline void ETHOSU_PMU_PMCCNTR_CFG_Set_Stop_Event(uint32_t stop_event) +{ + uint32_t val = ethosu_pmu_ctrl->PMCCNTR_CFG & ~ETHOSU_PMCCNTR_CFG_STOP_EVENT_MASK; + ethosu_pmu_ctrl->PMCCNTR_CFG = val | ((stop_event << 16) & ETHOSU_PMCCNTR_CFG_STOP_EVENT_MASK); +} + #ifdef __cplusplus } #endif |