blob: 5d73a43a802a0c7f24669e70621f012b07c95a0d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
|
//
// Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
#include "RefMeanWorkload.hpp"
#include "Reduce.hpp"
#include "RefWorkloadUtils.hpp"
#include "Profiling.hpp"
#include <vector>
namespace armnn
{
RefMeanWorkload::RefMeanWorkload(const MeanQueueDescriptor& descriptor, const WorkloadInfo& info)
:RefBaseWorkload<MeanQueueDescriptor>(descriptor, info) {}
void RefMeanWorkload::Execute() const
{
Execute(m_Data.m_Inputs, m_Data.m_Outputs);
}
void RefMeanWorkload::ExecuteAsync(ExecutionData& executionData)
{
WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data);
Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs);
}
void RefMeanWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
{
ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefMeanWorkload_Execute");
const TensorInfo& inputInfo = GetTensorInfo(inputs[0]);
const TensorInfo& outputInfo = GetTensorInfo(outputs[0]);
auto inputDecoder = MakeDecoder<float>(inputInfo, inputs[0]->Map());
auto outputEncoder = MakeEncoder<float>(outputInfo, outputs[0]->Map());
Reduce(inputInfo,
outputInfo,
*inputDecoder,
*outputEncoder,
m_Data.m_Parameters.m_Axis,
armnn::ReduceOperation::Mean);
}
} //namespace armnn
|