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* Asserts are removed during a release build, which causes build
failures due to unused variables.
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: Ie36f2bd22f5b2916b03ba7e64c1895fdf21f11f0
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* Fix for Debug mode in ExNet does not work with ConstTensorsAsInputs
* Remove unnecessary assertion with ambiguous message in LoadedNetwork
Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: I9cd5d1f811dbbc89072d1190c510bf1b22e3069c
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* This affects only to the layers (not workloads) Conv, DWConv and FC
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I66a91ed1a78bc0464e00423c7fc7c28c91d199ce
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param contains a value of -1.
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: I538347083e9f22b3f3b6c048aebc2cf5cf4dc786
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Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I1bc3d50b8fa6e216d8b6b7e3421d2ff37a21712c
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* Add a breakdown of the runtime options to the documentation.
* Exclude test classes from Doxygen generation.
* Limit the file extension selection for Doxygen generation.
* Add the support library to be generated.
* Fix some broken markups.
Signed-off-by: Colm Donelan <colm.donelan@arm.com>
Change-Id: I81896f2d7fff503a1d51d6d4ac3876aa8b84118e
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buffer data for Slice operator.
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: I86735faf8d57168a63ca6657f281ec03b90f7235
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The subgraphs produced by SubgraphViewSelector were not produced in a
deterministic order, as the order was determined by the pointer values
of some objects, which are not guaranteed to be the same for each
execution.
This patch adds a post-processing sorting step based on the GUIDs of the
layers and the slot indices so that the results will be the same for
each execution.
This makes debugging the optimised graph much easier as subsequent
stages can also be deterministic. It also simplifies some unit tests.
Change-Id: I64f552706b7fb1bf82c19d85a448e054277917bc
Signed-off-by: Rob Hughes <robert.hughes@arm.com>
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* Added files based on RefBackend
* Added PreCompiled Workload skeleton
* Increment ABI version of armnnTestUtils for CreateInput which had
been left as pure virtual, added base implementation for it.
* Add IsTosaLayerSupported() for Addition
Change-Id: I4c963adf3f50593d17ecdf21554502a64ad3bd76
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* Files deleted when Stabilizing the API
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I0ae73ee36968fa880761c10358bfa827be5fe054
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overridden
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: If594e291951a5f9ed1957a19a971c498f6e7843f
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* AddConv and AddDWConv with weights and bias
* ResizeBilinearDescriptor
* b,blacklist option in accuracy tool
!android-nn-driver:8172
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ibbc04fd18be7f938b11590bf67cd7af103cb4d99
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* Added armnnTfLiteParser for BatchMatMul
* Added unit testing for parser
* Updated CMakeLists
Signed-off-by: Samuel Yap <samuel.yap@arm.com>
Change-Id: If6842aaf7cf08f688093b714e2ecea6e8cd87161
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* Updated FlatBuffers schema for BatchMatMul layer type
* Added Serializer and Deserializer implementations for BatchMatMul
* Added unit tests for BatchMatMul serialization and deserialization
* Updated CMakeLists and docs
Signed-off-by: Samuel Yap <samuel.yap@arm.com>
Change-Id: Iad63afbd036a3eb648683eb7416a475561aa20cb
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* Added transpose parameters to pre-transpose each input tensor's slices
* Added adjoint parameters to pre-adjoint each input tensor's slices
* Small refactoring (BatchMatMulDescriptor static helpers and BatchMatMulImpl constructor)
* Updated input validation and output shape inference for parameters
* Additional layer unit tests for parameters added
* Versionings incremented
Signed-off-by: Samuel Yap <samuel.yap@arm.com>
Change-Id: Ibe5242a8a5bf604c13de0dc65844fd6c421cc667
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TosaMappings operator.
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: Ibea0cf625b3af4ab38e8b985f7a129c983ca9659
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* The previous fix for IVGCVSW-7106 introduced a problem around
operators with multiple inputs and outputs: addSeparator was being
applied to all tensors in the list not just the last one.
Signed-off-by: Colm Donelan <colm.donelan@arm.com>
Change-Id: I0325d9abcb7fb512f834c61686c698bbfc29a3be
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* Move the Conv2D and DepthwiseConv2D validation to Optimization level
when the weights and tensors are as constant inputs
* Take into account offset and scales values when doing INT8 to FP32 dequantization
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I1f81f15640395ac041923b10dbe9151159715117
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* ProfilingDetails assumed that every workload description included
both tensors and parameters. This is not always the case.
* Modify ProfilingDetails::AddDetailsToString to check the next
element to be printed before deciding to add a separator and new line.
Signed-off-by: Colm Donelan <colm.donelan@arm.com>
Change-Id: I2577b0e8a149d0a172ee12975e18b78238d8256e
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Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ib91b734d4add47e23ad00f76e53f1873ff617831
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* Adding the check only if it's not a const layer which is needed to run ai_benchmark_v5_yolo_v4_tiny_quant.tflite model
* We still won't be able to run the model due to IVGCVSW-7158
Signed-off-by: Nikhil Raj <nikraj01@e126673.cambridge.arm.com>
Change-Id: Ib7e77a0b5a64be0c92a8e4eae45729f799770b37
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Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Change-Id: I3a3aab7b5042349cb2df8517678306665e037610
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Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: I5c68b81a67fc2b5a33cf62753351440564bb868e
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* Changed long variable declaration to int
Signed-off-by: Samuel Yap <samuel.yap@arm.com>
Change-Id: I2df6f8f6df8780e48e09f7e68c04626a8a8a207d
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* Added case for Bf16 to switch and changed Assertion to Exception
so it shows up in Release build.
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I817260dc7b7667386c4aa734bea649383866a785
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* Fixed caching issue.
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Ic7b3e0bd4438b2fd1b3dbfa86b6c89d625bbf9dd
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running Arm NN Unittest
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: I567452000287babad345e61ea85ea84f362f48e0
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ConvertLayers.
* ConvertBf16ToFp32Layer
* ConvertFp16ToFp32Layer
* ConvertFp32ToBf16Layer
* ConvertFp32ToFp16Layer
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I5e763519a12f017dc14b09ea191fdb3b7398c0d7
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* Originated from a GitHub issue: https://github.com/ARM-software/armnn/issues/667
* Initially, Arm NN supports the pool 2D operation because there is no padding
on the pool2d. Neon failure occurs when padding is followed by average pool 2D
due to folding optimization.
* Here we prevent the folding optimization from happening for the above special case
and add it in as a backend specific optimization.
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: Ia0fd90c3a6b4b9d29c81106f154617d2e893e26b
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* Correcting some typos
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Icb21dc4828e51afa38816bd454926fc41e9e82cb
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This reverts commit 1a7f033768acb27da11503bd29abb468d2e77f9e.
List of fixes to be able to add this code again:
* "emplacing_back" the vector inputTensors into the vector m_InputTensorsVec outside the for loop
* GetIOInfo() uses IOptimizedNetwork instead of INetwork, where the infered shapes are not saved
* Add missing data type Signed32 to SetupInputsAndOutputs()
* PrintOutputTensors() prints the actual output without dequantizing
* Add profilingDetailsMethod as input in networkProperties in ArmNNExecutor constructor
* Fix typos
Change-Id: I91de166f87228282db3efa27431fe91458834442
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ic6634d48892d11e5f146cdf285e1e333e93e9937
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
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* Descriptors added for BatchMatMul
* Layer definition added
* Input validation added (will likely change when opt. param support comes in)
* Ref workload implementation for BatchMatMul added (will also change with opt. param support)
* Ref layer tests made for BatchMatMul
* CMake and other build files updated
Signed-off-by: Samuel Yap <samuel.yap@arm.com>
Change-Id: Ic885301da543ee0fbe7922b85e7f9658c4efc617
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Fp32NetworkToBf16Converter
* Fuse FP32ToBF16Layers with Constant Layer so Conv2d/FullyConnected
can have their weights redirected.
* If BF16 Unsupported in Conv2d || FullyConnected revert fused
Constant Layer to FP32
Change-Id: If523c708a822659d64597d9ae39cca1c2f84b76f
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
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* Refactor backend capability checks in LoadedNetwork.
* ImportInputs should check the number of tensors does not exceed the
number of inputs.
* In EnqueueWorkload the check for for the count of input tensors
was ignoring pre-imported inputs.
* Added checks to verify ImportInputs/ImportOutputs worked as expected
in EndToEndTestImpl.
* Improve documentation on ImportInputs/ImportOutputs in IRuntime.hpp.
* Disabled import tests in CL and Neon EndToEndTests that cannot work.
Signed-off-by: Colm Donelan <colm.donelan@arm.com>
Change-Id: Iae4b2644a1c9f01ee72bce1afb211661cc9ae2e3
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* ExecutionData holds a void* which can be assigned to data required
for execution in a backend. WorkingMemDescriptors are used in the Ref
backend which hold TensorHandles for inputs and outputs.
* Updated ExecuteAsync functions to take ExecutionData.
* Added CreateExecutionData and UpdateExectutionData to IBackendInternal.
* Streamlined experimental IWorkingMemHandle API by removing map related
function and unused m_workingMemDescriptorMap from WorkingMemHandle.
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I54b0aab12872011743a141eb42dae200227769af
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Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I979a6f43c0d6ec49effb9a87339dbcd07678d2bd
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Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Change-Id: I97dee6982e0a7be01c13e9e803c0997547a39ff1
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* Enabled import host memory in SL as default
* Updated import host memory functionality in GpuAcc
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I22132b1e1008159b0e7247219762e3e9ae5eba10
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* Add virtual GetSlotIndex to IInputSlot
* Fix logic in GetWorkingCopy to use index of slots; so as not
to add slots to cloned subgraphView if not in original subgraphView
* Add test to cover cases when not all inputSlots to subgraphView layer
are part of the original subgraphView
* Mark SubgraphView::GetWorkingCopy() as const
Change-Id: I1d540f84c57f97f6c834ec06ca13393ffa55d379
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Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I1fedfdf2cd8871d6b307fce8620f40adadf75f04
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instead of immediately before output
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I2d89a1efdabfdb4be24a8998a03fe1f502d26183
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Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I9ccaefbe28ea572e9e2b4a2168574804667f7460
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* Added non-const variants of existing const member functions in
IInputSlot and IOutputSlot to retrieve non-const IConnectableLayer
Signed-off-by: Nabeel Ahmad <nabeel.ahmad@arm.com>
Change-Id: Ic3388b578324edb4d2cca36acce6560ad1ce83c5
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This reverts commit a0f8b15d4ddb5075f380003ff31b271d389d3b66.
Reason for revert: <Test ClDmaBufInternalTests review >
Change-Id: Ibc4a77fa008643849da7330391942e4c87b941e2
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This reverts commit 03bf98a8bc51ad20eef4b9ca5fbf6ce15e063721.
Reason for revert: Caused failures in tests located in internal repo.
Change-Id: If35cb0ede349b270e4e7827324382e09455d8cfa
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Only one bool is used to indicate whether inputs should be imported.
However, its possible for the user to want to import inputs but not
export outputs. In addition it's possible for a user to enabled import
during optimize but then pass a memory source that does not require
import.
* Add m_ExportEnabled to INetwork.hpp.
* Modify Network::dNetwork to consider both m_ImportEnabled
and m_ExportEnabled.
* Add ValidateSourcesMatchOptimizedNetwork to LoadedNetwork to validate
import options between optimize and network load.
* Update the TfLite delegate consider exportEnabled flag in the
optimizer.
!armnn-internal-tests:425350
Signed-off-by: Colm Donelan <colm.donelan@arm.com>
Change-Id: I776eab81595898e43f91ab40306962eae61329f4
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* Updated Serializer CMakeLists.txt to build armnnSerializerObj
* Added constant tensors as input support to SL
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I22f6cf50147d99a01f7fe70d7446b114a4c57af3
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* Fixed Segfault when parsing Unidirectional Sequence LSTM
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: Ic69a4190c60ef595be64bc2c356e540319381b7e
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* Fix made to experimental/armnn_shim_sl branch also required for armnn master branch.
* TestGenerated/GeneratedTests.Sync/argmax_1 fix.
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: Idb0324ff59e1ed13caf5f4bf899d1d3220d823d4
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* Removed the pre-generated ArmnnSchema_generated.h
* This version was generated using flatbuffers v1.12.0 and it contains
code that's incompatible with newer versions
* Android.mk will look for ArmnnSchema_generated.h in the armnnGenerated
directory in the armnn directory.
* The Serializer and Deserializer will look for ArmnnSchema_generated.h
in the armnnGenerated directory.
!android-nn-driver:7626
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I13ff6b6c78740cf1f82750f56caab83200e6a3e5
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
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