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2022-12-06Print BatchMatMul and Gather Descriptors on dot graphTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I01de14cd46fe614dfcb11b2b4f9323f32e01ee9d
2022-12-05IVGCVSW-4926 Add support in CpuRef implementation for Gather for axis ↵Nikhil Raj
different to 0 !android-nn-driver:8727 Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4336007ad5a8552f7893ce6253f93cf9d1f5474f
2022-12-01IVGCVSW-7272 Add Exception for handling Fp16 infinity valuesKevin May
* Float values which cannot fit in Half are converted as inf/-inf * Add an InvalidArgumentException for infinity displaying the value and data type Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: Iaa5671374364c531e29e37fdfe40732b4fdbcfcb
2022-11-23IVGCVSW-7297 When creating multiple Executors only the lastMike Kelly
one works fine * Each CLBackend created its own ClContextControlWrapper which invalidated the OpenCL context's from all CLBackends that were created before that one. * Now CLBackends will keep a shared_ptr to a ClContextControlWrapper which more closely matches the functionality within ACL. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I0744c2cb6a2f0d6b0c5fa54d786f88cf97775559
2022-11-22IVGCVSW-7080 Remove deprecated code due to be removed in 23.02Keith Davis
* Extended deprecation time of SubgraphView interface to 23.08 Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Ic0a729ea31402f0b39724da47212ae5cc04465c4
2022-11-22IVGCVSW-6980 Delegate support for slice operatorCathal Corbett
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I90d800160b070e25d999b5102a7ce6d3e0ed6a81
2022-11-18IVGCVSW-7330 Add end-to-end dynamic sample build stepsJames Conroy
* Moving from other build guides which are being removed and/or consolidated. Provides steps on how to build the standalone backend unit tests using the build-tool. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I3994bffc9038632ab7271ac31db25a38157f2bb7
2022-11-16IVGCVSW-7214 Disable BF16-Turbo-Mode and remove conversion layersRyan OShea
- Remove Bf16ToFp32 Conversion Layer - Remove Fp32ToBf16 Conversion Layer - Remove B16 Conversion tests * Throw exception if m_ReduceFp32ToBf16 optimzer option is set to true * Provide comments to enable fast math in order to use bf16 * Update docs to inform users to enable fast math for bf16 Execute Network Changes * Require bf16_turbo_mode to also have fast_math_enabled set to true - Remove setting m_ReduceFp32ToBf16 optimizer option Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ibaa6da9d29c96a1ce32ff5196b0847fde9f04a1c
2022-11-16IVGCVSW-7345 Add Pooling2d support to TOSA Reference BackendCathal Corbett
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I73a47e513fe2d064ef233b121a68ef2edf0396dc
2022-11-15Minor error formatting fixes.Colm Donelan
Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I17823fb8b6bbabc4da327187167ce9582ee29b32
2022-11-14Add additional data type support to TOSA Reference BackendMatthew Sloyan
* Added all data types to TosaRefPreCompiledWorkload::Execute(). * Generalised IsTosaLayerSupported and fixed Addition support. * Added Fp16 and Int32 Addition End to End tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I1f89c310ede33615427343e89bcec7e7bb643fa1
2022-11-09IVGCVSW-7318 Support basic addition model in the TOSA Reference BackendRyan OShea
* Create Simple Addition EndtoEnd test * Create EndToEndTest file in TosaRef/test directory * Add AdditionEndToEnd test to CpuRef,CpuAcc,GpuAcc,TosaRef Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ic44e2b457c25dcb41bb3b17c05cce0e74bf17a80
2022-11-09IVGCVSW-7165 Implement TosaRefPreCompiledWorkload::Execute()Matthew Sloyan
* Added FP32 support for TOSA Reference Backend. * Added main block creation to OptimizeSubgraphView, this will only occur once. Change-Id: I169dac50b78e2c693da6327962c9f1d3ae3bd712 Signed-off-by: James Conroy <james.conroy@arm.com> Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
2022-11-02IVGCVSW-7164 Implement TosaRefBackend::OptimizeSubgraphViewMatthew Sloyan
* Added TosaRefBackend::OptimizeSubgraphView implementation. * Generalised TosaRefLayerSupport::IsLayerSupported to work with any operator. * Changed TosaCommon.hpp utils to inline functions. * Added source files for TosaMappings.hpp and AdditionOperator.hpp. * Fixed multiple defines issue with HALF_ROUND_STYLE and HALF_ROUND_TIES_TO_EVEN. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib2576ec3fb97faa3a2256b2fb93ec16ac8745760
2022-11-01IVGCVSW-6496 Add EndToEnd Layer test for Batch MatMul WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6a541db9a602609282cc6f33af930ca141b83c41
2022-10-28IVGCVSW-7296 REDUCE_PROD tests fail when using Tf 2.10Teresa Charlin
* In TF what ArmNN calls quantized data types can be non-quantized as well. * This patch creates 2 models: * ArmNN: model where int8 and uint8 will always be quantized, but scale can be 1 and offset 0 * TFLite: model where int8 and uint8 can be quantized and non-quantized Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Id960f2f30988f2bbec88cb4e0c52c189ac957bae
2022-10-28IVGCVSW-6494 Add CpuAcc Batch MatMul Workload Fp32Teresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I2def6995f81d33e68f1ea45d8d19a1e6294049b1
2022-10-27IVGCVSW-7273 Fix TOSA Serialization Library integrationMatthew Sloyan
* half.hpp is now required as an include for numpy_utils.h * DType_FLOAT was changed to DType_FP32. * DType_FP16 support has been added to ArmNNToDType utility function. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib25be9a5abfbd9db2a90b3e42d592259a6df0e01
2022-10-27IVGCVSW-7273 Integrate TOSA Reference Model into Arm NNMatthew Sloyan
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ie9aa1aa20a5bc837e005a7a36d4d07b4cd8d021b
2022-10-21IVGCVSW-7126 Update Arm NN to Tensorflow 2.10Colm Donelan
* Modify get_tensorflow.sh to point to the 2.10 Tensorflow tag. * Modify FindTfLite.cmake to handle the break up of libruy.a * Modify armnn_delegate.cpp to add registration_external field. * Prevent the serializer/deserializer from using a system installed version of flatc. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I688f33f387924ba29bf400f60e56f73b2329fdc1
2022-10-19MLCE-545 INT8 TFLite model execution abnormalKeith Davis
* Bug fix where files were being overwritten at each debug layer Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I609fdc82afcee925824efb02183c7dbc942fced0
2022-10-19MLCE-545 INT8 TFLite model execution abnormalKeith Davis
* Add functionality to print output tensors to file in tempdir * UnitTests Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Idfb4c186544187db1fecdfca11c662540f645439
2022-10-14IVGCVSW-7267 Make the AllowExpandedDims option workJim Flynn
Signed-off-by: Jim Flynn <jim.flynn@arm.com> Change-Id: I3573078206272c3a72a2b3acf8781ab458ea6c90
2022-10-11IVGCVSW-7222 Fix incorrect kernel measurements in profiling outputKevin May
* Some CL kernels are not run after the first inference and this breaks the profiler which is expecting a measurement for every kernel each run * Add a function HasKernelMeasurements() to ascertain if the Event is returning kernel measurements and if so insert 0.0 values for any missing kernel measurements. * Fix ExecuteNetwork to only print a json object after all inferences have completed Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I99f2bb0db847f5a52ab4c5705b072155c6b6f333
2022-10-11Fix TosaOperatorMapping tests when building for releaseMatthew Sloyan
* Asserts are removed during a release build, which causes build failures due to unused variables. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ie36f2bd22f5b2916b03ba7e64c1895fdf21f11f0
2022-10-04MLCE-545 INT8 TFLite model execution abnormalKeith Davis
* Fix for Debug mode in ExNet does not work with ConstTensorsAsInputs * Remove unnecessary assertion with ambiguous message in LoadedNetwork Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I9cd5d1f811dbbc89072d1190c510bf1b22e3069c
2022-09-28IVGCVSW-7209 Delay one release the removal of weights and biasTeresa Charlin
* This affects only to the layers (not workloads) Conv, DWConv and FC Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I66a91ed1a78bc0464e00423c7fc7c28c91d199ce
2022-09-26IVGCVSW-7158 TfLiteParser supports reshape when output 'shape_signature' ↵Cathal Corbett
param contains a value of -1. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I538347083e9f22b3f3b6c048aebc2cf5cf4dc786
2022-09-22IVGCVSW-7240 Adjoint is Transpose in TFLite. Change in TFLite parserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I1bc3d50b8fa6e216d8b6b7e3421d2ff37a21712c
2022-09-21IVGCVSW-6790 Adding runtime options to Doxygen.Colm Donelan
* Add a breakdown of the runtime options to the documentation. * Exclude test classes from Doxygen generation. * Limit the file extension selection for Doxygen generation. * Add the support library to be generated. * Fix some broken markups. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I81896f2d7fff503a1d51d6d4ac3876aa8b84118e
2022-09-20IVGCVSW-7040 TfLiteParser fails to prepare model due to unspecified size ↵Cathal Corbett
buffer data for Slice operator. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I86735faf8d57168a63ca6657f281ec03b90f7235
2022-09-15Make SubgraphViewSelector give deterministic resultsRob Hughes
The subgraphs produced by SubgraphViewSelector were not produced in a deterministic order, as the order was determined by the pointer values of some objects, which are not guaranteed to be the same for each execution. This patch adds a post-processing sorting step based on the GUIDs of the layers and the slot indices so that the results will be the same for each execution. This makes debugging the optimised graph much easier as subsequent stages can also be deterministic. It also simplifies some unit tests. Change-Id: I64f552706b7fb1bf82c19d85a448e054277917bc Signed-off-by: Rob Hughes <robert.hughes@arm.com>
2022-09-07IVGCVSW-7159 Implement simple TOSA Reference Backend skeletonFrancis Murtagh
* Added files based on RefBackend * Added PreCompiled Workload skeleton * Increment ABI version of armnnTestUtils for CreateInput which had been left as pure virtual, added base implementation for it. * Add IsTosaLayerSupported() for Addition Change-Id: I4c963adf3f50593d17ecdf21554502a64ad3bd76
2022-09-07IVGCVSW-7209 Remove deprecated code due to be removed in 22.11Teresa Charlin
* Files deleted when Stabilizing the API Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0ae73ee36968fa880761c10358bfa827be5fe054
2022-09-06IVGCVSW-7155 SubgraphView::SubstituteSubgraph IOutputSlots incorrectly ↵Cathal Corbett
overridden Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: If594e291951a5f9ed1957a19a971c498f6e7843f
2022-09-06IVGCVSW-7006 Remove deprecated code due to be removed in 22.08Teresa Charlin
* AddConv and AddDWConv with weights and bias * ResizeBilinearDescriptor * b,blacklist option in accuracy tool !android-nn-driver:8172 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ibbc04fd18be7f938b11590bf67cd7af103cb4d99
2022-09-05IVGCVSW-6497: BatchMatMul TfLite ParserSamuel Yap
* Added armnnTfLiteParser for BatchMatMul * Added unit testing for parser * Updated CMakeLists Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: If6842aaf7cf08f688093b714e2ecea6e8cd87161
2022-08-30IVGCVSW-7104: BatchMatMul Serializer/Deserializer SupportSamuel Yap
* Updated FlatBuffers schema for BatchMatMul layer type * Added Serializer and Deserializer implementations for BatchMatMul * Added unit tests for BatchMatMul serialization and deserialization * Updated CMakeLists and docs Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: Iad63afbd036a3eb648683eb7416a475561aa20cb
2022-08-30IVGCVSW-7105: BatchMatMul Optional Parameter SupportSamuel Yap
* Added transpose parameters to pre-transpose each input tensor's slices * Added adjoint parameters to pre-adjoint each input tensor's slices * Small refactoring (BatchMatMulDescriptor static helpers and BatchMatMulImpl constructor) * Updated input validation and output shape inference for parameters * Additional layer unit tests for parameters added * Versionings incremented Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: Ibe5242a8a5bf604c13de0dc65844fd6c421cc667
2022-08-30IVGCVSW-7133 Add TosaMappings backbone structure with support for Addition ↵Cathal Corbett
TosaMappings operator. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ibea0cf625b3af4ab38e8b985f7a129c983ca9659
2022-08-29IVGCVSW-7106 Additional fix models with multiple input and output tensors.Colm Donelan
* The previous fix for IVGCVSW-7106 introduced a problem around operators with multiple inputs and outputs: addSeparator was being applied to all tensors in the list not just the last one. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I0325d9abcb7fb512f834c61686c698bbfc29a3be
2022-08-29IVGCVSW-6954 'Arm NN SL Improvements'Sadik Armagan
* Move the Conv2D and DepthwiseConv2D validation to Optimization level when the weights and tensors are as constant inputs * Take into account offset and scales values when doing INT8 to FP32 dequantization Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I1f81f15640395ac041923b10dbe9151159715117
2022-08-29IVGCVSW-7106 Incorrect Json format for some networks.Colm Donelan
* ProfilingDetails assumed that every workload description included both tensors and parameters. This is not always the case. * Modify ProfilingDetails::AddDetailsToString to check the next element to be printed before deciding to add a separator and new line. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I2577b0e8a149d0a172ee12975e18b78238d8256e
2022-08-29Bug Fix for refactor of the ExecuteNetwork for strategy in Precompiled layer.Teresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ib91b734d4add47e23ad00f76e53f1873ff617831
2022-08-05IVGCVSW-7103 ExecuteNetwork failed while doing Yolov4 executionNikhil Raj
* Adding the check only if it's not a const layer which is needed to run ai_benchmark_v5_yolo_v4_tiny_quant.tflite model * We still won't be able to run the model due to IVGCVSW-7158 Signed-off-by: Nikhil Raj <nikraj01@e126673.cambridge.arm.com> Change-Id: Ib7e77a0b5a64be0c92a8e4eae45729f799770b37
2022-08-05IVGCVSW-7111 change backend deprecation from 22.11 to 23.08Jim Flynn
Signed-off-by: Jim Flynn <jim.flynn@arm.com> Change-Id: I3a3aab7b5042349cb2df8517678306665e037610
2022-08-05Fix '#if defined(ARMNN_POST_TFLITE_2_3)' in TfLiteParser Conv3D test.Cathal Corbett
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I5c68b81a67fc2b5a33cf62753351440564bb868e
2022-08-05IVGCVSW-7145: BatchMatMul Fix for Raspi Cross Compile FailingSamuel Yap
* Changed long variable declaration to int Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: I2df6f8f6df8780e48e09f7e68c04626a8a8a207d
2022-08-05IVGCVSW-6889 Seg fault running ExeNet with --bf16-turbo-mode on fpgaFrancis Murtagh
* Added case for Bf16 to switch and changed Assertion to Exception so it shows up in Release build. Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I817260dc7b7667386c4aa734bea649383866a785
2022-08-05IVGCVSW-7063 'Support Library NNAPI Caching'Sadik Armagan
* Fixed caching issue. Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ic7b3e0bd4438b2fd1b3dbfa86b6c89d625bbf9dd
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