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2022-12-14Update TOSA Reference Backend IsLayerSupportedMatthew Sloyan
* Replace current IsLayerSupported checks with ModelRunner for better validation. * Added options to be able to disable the output from the TOSA Reference Model during layer support. * Updated layer support tests to reflect actual support. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Iaea17343d0ad51b495477024c44a34d9335d1438
2022-12-14Fix bug in EthosNAcc backend detection in unit testMatthew Bentham
Test was checking a freshly constructed BackendRegistry, rather than the single instance. Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: I7c64cf089cb406ac4e5ceefedb17163f39801b07
2022-12-14Refactor: Remove m_ImportFlags from RefTensorHandleMatthew Bentham
The import flags for a RefTensorHandle shouldn't be a data member, as RefTensorHandle can only import from MemorySource::Malloc. Instead, use m_ImportEnabled to determine what to return from GetImportFlags(). Simplifies the code in Import and CanBeImported. Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: Ic629858920f7dd32f99ee27f150b81d8b67144cf
2022-12-13Include armnn/IRuntime.hpp in TosaCommon OneToManyMappingTestsCathal Corbett
* Error thrown when building in CLion Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I533f11e7ce2d883e254472097fee3817584d2f49
2022-12-13IVGCVSW-7342 Add Slice support to TOSA Reference BackendCathal Corbett
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I8be286b69bebd4cd36033e3145632bb043938d16
2022-12-13Specified Linker Language for Tosa Reference BackendMike Kelly
* Required for building within the IDE. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Icbf1b7e24cc20f579bcb6f8d82666ed480378dd4
2022-12-12IVGCVSW-7174 Add Reshape support to TOSA Reference BackendCathal Corbett
* Spelling corrections and code refactors added to TosaCommon * TosaDTypeToString() implemented and used in TosaRef IsLayerSupported() instead of enum integer. * Using namespace armnn in TosaCommon OneToOneMappingTests and TosaReference TosaRefLayerSupportTests instead of armnn::ClassName. * Updated VerifyTosaAttribute() to also verify certain attributes from input and output shapes. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I71dfca404d081a665f748ab724153c6dc36b7eca
2022-12-12IVGCVSW-7209 Remove deprecated code due to be removed in 23.02Mike Kelly
* Removed weights and bias from Convolution, DepthwiseConv & FullyConnected layers * Removed the weight and bias ConstTensorHandles from the QueueDescriptors * Updated Workloads to take tensors from WorkloadInfo rather than the QueueDescriptors * Removed unused RedirectMembersToConstantInputs optimization and tests. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I9ffcdc4a1c0dff725539dd69fc435b700bd98a56
2022-12-12Updates following execution of Includewhatyouuse on armnn/include.Colm Donelan
This tool forces explicit includes of all dependencies and highlights unused dependencies. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I92e449245246452a0227cbd13f9c082e2088bf8c
2022-12-08IVGCVSW-7168 Add Conv2d and Constant support to TOSA Reference BackendMatthew Sloyan
* Added TOSA Conv2d and Constant mappings. * Added unique naming to mappings based on previous and following layers, so they are connected correctly. * Updated existing mappings with new naming convention. * Added all mappings to one main block in OptimizeSubgraphView. * Removed isMain from mapping functions. * Added Conv2d EndToEnd test. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I27c3e238407c32379ce25a1f01dad11523ef5d2b
2022-12-07IVGCVSW-6853 Rewrite BuildArmComputePermutationVector()Teresa Charlin
* Some pemutation vectors were not converted correctly. * Add Transpose end to end test. * Comments added with an example to clarify the differences betweeen Transpose and Permute Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6c0954ca6ce00ef5f2a6f3625abe6f4fd27b5cdf
2022-12-05IVGCVSW-4926 Add support in CpuRef implementation for Gather for axis ↵Nikhil Raj
different to 0 !android-nn-driver:8727 Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4336007ad5a8552f7893ce6253f93cf9d1f5474f
2022-12-01IVGCVSW-7272 Add Exception for handling Fp16 infinity valuesKevin May
* Float values which cannot fit in Half are converted as inf/-inf * Add an InvalidArgumentException for infinity displaying the value and data type Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: Iaa5671374364c531e29e37fdfe40732b4fdbcfcb
2022-11-23IVGCVSW-7297 When creating multiple Executors only the lastMike Kelly
one works fine * Each CLBackend created its own ClContextControlWrapper which invalidated the OpenCL context's from all CLBackends that were created before that one. * Now CLBackends will keep a shared_ptr to a ClContextControlWrapper which more closely matches the functionality within ACL. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I0744c2cb6a2f0d6b0c5fa54d786f88cf97775559
2022-11-16IVGCVSW-7214 Disable BF16-Turbo-Mode and remove conversion layersRyan OShea
- Remove Bf16ToFp32 Conversion Layer - Remove Fp32ToBf16 Conversion Layer - Remove B16 Conversion tests * Throw exception if m_ReduceFp32ToBf16 optimzer option is set to true * Provide comments to enable fast math in order to use bf16 * Update docs to inform users to enable fast math for bf16 Execute Network Changes * Require bf16_turbo_mode to also have fast_math_enabled set to true - Remove setting m_ReduceFp32ToBf16 optimizer option Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ibaa6da9d29c96a1ce32ff5196b0847fde9f04a1c
2022-11-16IVGCVSW-7345 Add Pooling2d support to TOSA Reference BackendCathal Corbett
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I73a47e513fe2d064ef233b121a68ef2edf0396dc
2022-11-15Minor error formatting fixes.Colm Donelan
Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I17823fb8b6bbabc4da327187167ce9582ee29b32
2022-11-14Add additional data type support to TOSA Reference BackendMatthew Sloyan
* Added all data types to TosaRefPreCompiledWorkload::Execute(). * Generalised IsTosaLayerSupported and fixed Addition support. * Added Fp16 and Int32 Addition End to End tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I1f89c310ede33615427343e89bcec7e7bb643fa1
2022-11-09IVGCVSW-7318 Support basic addition model in the TOSA Reference BackendRyan OShea
* Create Simple Addition EndtoEnd test * Create EndToEndTest file in TosaRef/test directory * Add AdditionEndToEnd test to CpuRef,CpuAcc,GpuAcc,TosaRef Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ic44e2b457c25dcb41bb3b17c05cce0e74bf17a80
2022-11-09IVGCVSW-7165 Implement TosaRefPreCompiledWorkload::Execute()Matthew Sloyan
* Added FP32 support for TOSA Reference Backend. * Added main block creation to OptimizeSubgraphView, this will only occur once. Change-Id: I169dac50b78e2c693da6327962c9f1d3ae3bd712 Signed-off-by: James Conroy <james.conroy@arm.com> Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
2022-11-02IVGCVSW-7164 Implement TosaRefBackend::OptimizeSubgraphViewMatthew Sloyan
* Added TosaRefBackend::OptimizeSubgraphView implementation. * Generalised TosaRefLayerSupport::IsLayerSupported to work with any operator. * Changed TosaCommon.hpp utils to inline functions. * Added source files for TosaMappings.hpp and AdditionOperator.hpp. * Fixed multiple defines issue with HALF_ROUND_STYLE and HALF_ROUND_TIES_TO_EVEN. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib2576ec3fb97faa3a2256b2fb93ec16ac8745760
2022-11-01IVGCVSW-6496 Add EndToEnd Layer test for Batch MatMul WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6a541db9a602609282cc6f33af930ca141b83c41
2022-10-28IVGCVSW-6494 Add CpuAcc Batch MatMul Workload Fp32Teresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I2def6995f81d33e68f1ea45d8d19a1e6294049b1
2022-10-27IVGCVSW-7273 Fix TOSA Serialization Library integrationMatthew Sloyan
* half.hpp is now required as an include for numpy_utils.h * DType_FLOAT was changed to DType_FP32. * DType_FP16 support has been added to ArmNNToDType utility function. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib25be9a5abfbd9db2a90b3e42d592259a6df0e01
2022-10-27IVGCVSW-7273 Integrate TOSA Reference Model into Arm NNMatthew Sloyan
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ie9aa1aa20a5bc837e005a7a36d4d07b4cd8d021b
2022-10-19MLCE-545 INT8 TFLite model execution abnormalKeith Davis
* Bug fix where files were being overwritten at each debug layer Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I609fdc82afcee925824efb02183c7dbc942fced0
2022-10-19MLCE-545 INT8 TFLite model execution abnormalKeith Davis
* Add functionality to print output tensors to file in tempdir * UnitTests Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Idfb4c186544187db1fecdfca11c662540f645439
2022-10-11IVGCVSW-7222 Fix incorrect kernel measurements in profiling outputKevin May
* Some CL kernels are not run after the first inference and this breaks the profiler which is expecting a measurement for every kernel each run * Add a function HasKernelMeasurements() to ascertain if the Event is returning kernel measurements and if so insert 0.0 values for any missing kernel measurements. * Fix ExecuteNetwork to only print a json object after all inferences have completed Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I99f2bb0db847f5a52ab4c5705b072155c6b6f333
2022-10-11Fix TosaOperatorMapping tests when building for releaseMatthew Sloyan
* Asserts are removed during a release build, which causes build failures due to unused variables. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ie36f2bd22f5b2916b03ba7e64c1895fdf21f11f0
2022-09-21IVGCVSW-6790 Adding runtime options to Doxygen.Colm Donelan
* Add a breakdown of the runtime options to the documentation. * Exclude test classes from Doxygen generation. * Limit the file extension selection for Doxygen generation. * Add the support library to be generated. * Fix some broken markups. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I81896f2d7fff503a1d51d6d4ac3876aa8b84118e
2022-09-07IVGCVSW-7159 Implement simple TOSA Reference Backend skeletonFrancis Murtagh
* Added files based on RefBackend * Added PreCompiled Workload skeleton * Increment ABI version of armnnTestUtils for CreateInput which had been left as pure virtual, added base implementation for it. * Add IsTosaLayerSupported() for Addition Change-Id: I4c963adf3f50593d17ecdf21554502a64ad3bd76
2022-09-07IVGCVSW-7209 Remove deprecated code due to be removed in 22.11Teresa Charlin
* Files deleted when Stabilizing the API Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0ae73ee36968fa880761c10358bfa827be5fe054
2022-09-06IVGCVSW-7006 Remove deprecated code due to be removed in 22.08Teresa Charlin
* AddConv and AddDWConv with weights and bias * ResizeBilinearDescriptor * b,blacklist option in accuracy tool !android-nn-driver:8172 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ibbc04fd18be7f938b11590bf67cd7af103cb4d99
2022-08-30IVGCVSW-7105: BatchMatMul Optional Parameter SupportSamuel Yap
* Added transpose parameters to pre-transpose each input tensor's slices * Added adjoint parameters to pre-adjoint each input tensor's slices * Small refactoring (BatchMatMulDescriptor static helpers and BatchMatMulImpl constructor) * Updated input validation and output shape inference for parameters * Additional layer unit tests for parameters added * Versionings incremented Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: Ibe5242a8a5bf604c13de0dc65844fd6c421cc667
2022-08-30IVGCVSW-7133 Add TosaMappings backbone structure with support for Addition ↵Cathal Corbett
TosaMappings operator. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ibea0cf625b3af4ab38e8b985f7a129c983ca9659
2022-08-05IVGCVSW-7111 change backend deprecation from 22.11 to 23.08Jim Flynn
Signed-off-by: Jim Flynn <jim.flynn@arm.com> Change-Id: I3a3aab7b5042349cb2df8517678306665e037610
2022-08-05IVGCVSW-7145: BatchMatMul Fix for Raspi Cross Compile FailingSamuel Yap
* Changed long variable declaration to int Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: I2df6f8f6df8780e48e09f7e68c04626a8a8a207d
2022-08-05IVGCVSW-6889 Seg fault running ExeNet with --bf16-turbo-mode on fpgaFrancis Murtagh
* Added case for Bf16 to switch and changed Assertion to Exception so it shows up in Release build. Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I817260dc7b7667386c4aa734bea649383866a785
2022-08-05GitHub #667: Neon fold padding into average pool 2D quantization bug fix.Cathal Corbett
* Originated from a GitHub issue: https://github.com/ARM-software/armnn/issues/667 * Initially, Arm NN supports the pool 2D operation because there is no padding on the pool2d. Neon failure occurs when padding is followed by average pool 2D due to folding optimization. * Here we prevent the folding optimization from happening for the above special case and add it in as a backend specific optimization. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ia0fd90c3a6b4b9d29c81106f154617d2e893e26b
2022-07-27IVGCVSW-7109: Add Batch MatMul front end support - ReferenceSamuel Yap
* Descriptors added for BatchMatMul * Layer definition added * Input validation added (will likely change when opt. param support comes in) * Ref workload implementation for BatchMatMul added (will also change with opt. param support) * Ref layer tests made for BatchMatMul * CMake and other build files updated Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: Ic885301da543ee0fbe7922b85e7f9658c4efc617
2022-07-27IVGCVSW-6896 Fix pre-import when using sync execute.Colm Donelan
* Refactor backend capability checks in LoadedNetwork. * ImportInputs should check the number of tensors does not exceed the number of inputs. * In EnqueueWorkload the check for for the count of input tensors was ignoring pre-imported inputs. * Added checks to verify ImportInputs/ImportOutputs worked as expected in EndToEndTestImpl. * Improve documentation on ImportInputs/ImportOutputs in IRuntime.hpp. * Disabled import tests in CL and Neon EndToEndTests that cannot work. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Iae4b2644a1c9f01ee72bce1afb211661cc9ae2e3
2022-07-27IVGCVSW-6620 Update the async api to use ExecutionDataMatthew Sloyan
* ExecutionData holds a void* which can be assigned to data required for execution in a backend. WorkingMemDescriptors are used in the Ref backend which hold TensorHandles for inputs and outputs. * Updated ExecuteAsync functions to take ExecutionData. * Added CreateExecutionData and UpdateExectutionData to IBackendInternal. * Streamlined experimental IWorkingMemHandle API by removing map related function and unused m_workingMemDescriptorMap from WorkingMemHandle. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I54b0aab12872011743a141eb42dae200227769af
2022-07-08IVGCVSW-7024 Add missing license info for reuse lintJim Flynn
Signed-off-by: Jim Flynn <jim.flynn@arm.com> Change-Id: I97dee6982e0a7be01c13e9e803c0997547a39ff1
2022-07-08IVGCVSW-6957 'Import Host Memory in SL'Sadik Armagan
* Enabled import host memory in SL as default * Updated import host memory functionality in GpuAcc Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I22132b1e1008159b0e7247219762e3e9ae5eba10
2022-06-22Revert "Revert "IVGCVSW-6873 Import inputs but don't export outputs fails.""Francis Murtagh
This reverts commit a0f8b15d4ddb5075f380003ff31b271d389d3b66. Reason for revert: <Test ClDmaBufInternalTests review > Change-Id: Ibc4a77fa008643849da7330391942e4c87b941e2
2022-06-21Revert "IVGCVSW-6873 Import inputs but don't export outputs fails."James Conroy
This reverts commit 03bf98a8bc51ad20eef4b9ca5fbf6ce15e063721. Reason for revert: Caused failures in tests located in internal repo. Change-Id: If35cb0ede349b270e4e7827324382e09455d8cfa
2022-06-20IVGCVSW-6873 Import inputs but don't export outputs fails.Colm Donelan
Only one bool is used to indicate whether inputs should be imported. However, its possible for the user to want to import inputs but not export outputs. In addition it's possible for a user to enabled import during optimize but then pass a memory source that does not require import. * Add m_ExportEnabled to INetwork.hpp. * Modify Network::dNetwork to consider both m_ImportEnabled and m_ExportEnabled. * Add ValidateSourcesMatchOptimizedNetwork to LoadedNetwork to validate import options between optimize and network load. * Update the TfLite delegate consider exportEnabled flag in the optimizer. !armnn-internal-tests:425350 Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I776eab81595898e43f91ab40306962eae61329f4
2022-06-10IVGCVSW-6986 SLTS Failures due to Caching commitsCathal Corbett
* Fix made to experimental/armnn_shim_sl branch also required for armnn master branch. * TestGenerated/GeneratedTests.Sync/argmax_1 fix. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Idb0324ff59e1ed13caf5f4bf899d1d3220d823d4
2022-05-24Tidy up some code in the reference backendMatthew Bentham
Make some things private that don't need to be public in RefElementwiseWorkload. Remove non-workload header files from RefWorkloads.hpp - the non-workload header files are implementation detail of individual workloads, whereas RefWorloads.hpp should only contain the workload definitions, needed for RefWorkloadFactory. Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: I4c28963a027162a6560e56cf84b6c0063283e48f
2022-05-23MLCE-825: Give reason when workload unsupported for Non Constant Weights/BiasFrancis Murtagh
* BackendHelper.cpp IsXXXLayerSupported doesn't get as far as Neon/Cl Validate functions where arm_compute::Status is returned. * Conv2d, Depthwise, DilatedDepthwise and FullyConnected * Tidy up if() -> if () * Clean up logic in FullyConnected so that isLayerSupported gets called Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I5da1a882f4a2f55e90aa984b2b9548a847cb3a2d
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