armnn.git -

Age	Commit message (Collapse)	Author
2020-04-27	IVGCVSW-4668 Add TENSOR_QUANT8_ASYMM_SIGNED data type support to CpuRef ↵	Sadik Armagan
	operators Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I094125ba80699cc3cf5226bda6662a54e6caa988
2020-03-24	IVGCVSW-3813 Add Unary Elementwise Operation 'NEG' support to the ↵	Sadik Armagan
	android-nn-driver * Implemented ClNegWorkload * Implemented NeonNegWorkload * Enabled 'NEG' operator on CL and Neon as well as Ref * Implemented unit tests for 'NEG' operator Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I3d7a892692716636cae6bdf8ddd238e3d1ea064f