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path: root/src/armnnTfLiteParser/TfLiteParser.hpp
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2024-03-12IVGCVSW-8231 ScatterNd added to TFLite parserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I5b87304319f5e83e8eba9cb2d934fc4a6aebe85b
2023-09-29IVGCVSW-8055 Add support for GELU activation function.Teresa Charlin
* Add support to CpuRef, CpuAcc and GpuAcc * Add support to tflite parser, classic and opaque tflite delegates * Add support to serializer and deserializer * Add Unit tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ibc60ef2ef2a051e6d9af6e15d24c46316ec19de4
2023-09-08IVGCVSW-7525 Add broadcast_to to TFLite ParserIdriss Chaouch
* Changing the optimizer * Changing EndToEnd Tests Signed-off-by: Idriss Chaouch <idriss.chaouch@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ib581794280322a39cfc5ea3c4e6a6398cf723d5e
2023-07-26IVGCVSW-7885 Add TILE to TFLite parserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic2c3a89b89f44f111e5a184c83db89ea1cb52976
2023-07-12Add Square as Mul in the TfLite ParserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I5760da9be2ed63fdfbdd5d3d7b771c310592798d
2023-07-05IVGCVSW-7833 Add ReverseV2 support to TFLite ParserTianle Cheng
* Added ReverseV2 support to TFLite Parser * Added ReverseV2 TFLite Parser unit tests * Updated Parser Docs Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: Idb9a9213f75cd6cf01509a5d06ea5772cf56ac5b
2023-05-17IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE.John Mcloughlin
* Added 2 new operators as ElementWiseBinary ops * Ref End to End and unit tests * Serialize and Deserialize tests * Delegate and Opaque Delegate tests * TfLite Parser tests Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I537158127f602f0c41ca0402aa31655cd3bd4281
2023-04-19GitHub #640 Add support for CEIL operatorTeresa Charlin
* Reference workload * TfLite Delegate * TfLite Parser * Serializer and Deserializer * Changed fallback tests in delegate to use COS instead of CEIL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I36e0dbff33694182d1dba0c95d463506428e2f04
2023-02-24IVGCVSW-7546 SPACE_TO_DEPTH support added in tflite parserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4f5016841c31b183440f31c1e177bc41d2b8dbb7
2023-01-24IVGCVSW-7277 Fixed issues with FullyConnected on certain TFLite modelsMike Kelly
* TFLite Parser: * Fixed issue in ParseReshape where the targetShape wasn't always calculated correctly * Fixed issue in ParseFullyConnected where the wrong name was used for the ReshapeLayer * Added an ExpandDims to the FullyConnected to ensure that we reshape the output correctly * TFLite Delegate: * Added an ExpandDims to the FullyConnected to ensure that we reshape the output correctly Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I129dfcb8543f8a3a297c0589c841be20ef3b6407
2023-01-12IVGCVSW-7244 ConcatLayer overlapping views on TFLiteParserMike Kelly
* Added ability to calculate dynamic tensors and propagate them through the model so that when those tensors are later used as inputs they have the right shapes. * Added InferOutputShapes to DetectionPostProcessLayer. * Added InferOutputShapes to MeanLayer. * Added InferOutputShapes to RankLayer. * Added InferOutputShapes to ReduceLayer. * Fixed typos in TfLiteParser. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I880c0716938ef278f5dbf01a8a73a5cc99ce5ded
2023-01-05GitHub #543 Problem Parsing Mixed-Precision ModelMike Kelly
* Fixed bug when converting Constants with Per-Axis Quantization Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ifbea23e60483746ec987da491dae96e74cb33af4
2022-09-05IVGCVSW-6497: BatchMatMul TfLite ParserSamuel Yap
* Added armnnTfLiteParser for BatchMatMul * Added unit testing for parser * Updated CMakeLists Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: If6842aaf7cf08f688093b714e2ecea6e8cd87161
2022-08-05Fix '#if defined(ARMNN_POST_TFLITE_2_3)' in TfLiteParser Conv3D test.Cathal Corbett
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I5c68b81a67fc2b5a33cf62753351440564bb868e
2022-07-27IVGCVSW-7094 Add LOG and SIN support to tflite parserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I979a6f43c0d6ec49effb9a87339dbcd07678d2bd
2022-07-08IVGCVSW-7040 Add support for LOG_SOFTMAX to the TFLiteParserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I1fedfdf2cd8871d6b307fce8620f40adadf75f04
2022-05-04IVGCVSW-6936 Add SQRT support to tflite parserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I3b1f44c10a3446cfe45a7757d8a98e9788ec5dc0
2022-05-04IVGCVSW-6857 Add GATHERNd Support to the TfLiteParserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I8142072f104b23c6eaf80b54cf6ddfa0393c4921
2022-04-22MLCE-604 Add Unidirectional Sequence Lstm support to TFLiteMike Kelly
* Added Unidirectional Sequence Lstm support to TFLite Parser * Added support for float operations with int8 weights to TFLite Parser * Added to Conv2d, Conv3D, DepthwiseConv2D, FullyConnected, TransposeConv and UnidirectionalSequenceLstm * Renamed subgraphIndex to subgraph to fix name-shadowing warning. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I818976ab88abc05dcb4bad246fb4108e6e879283
2022-03-09IVGCVSW-6454 Add FLOOR_DIV Support to the TfLiteParserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7ab32f2998c2bc25fee8831d4be724286263b4b3
2021-10-27IVGCVSW-6469 Add MirrorPad TfLiteParser and TfLiteDelegate SupportMatthew Sloyan
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ia1c97adb401c5381341408ec1e4da287ef2d48fe
2021-10-07IVGCVSW-6461 Building Arm NN failed after adding Conv3d to TFLiteparserMatthew Sloyan
* Add hash define to Conv3d for backwards compatibility when compiling with TF 2.3.1 Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I70eec3b26430240852938af34b065b32bab91ebe
2021-10-06IVGCVSW-6165 Add Support for Conv3d to TfLiteParserMatthew Sloyan
* Added CONV_3D operator support. * Fixed TfLiteParser test issue where QAsymmU8 tests were incorrectly using the Boolean comparison function. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I9db03b54b6de63f918717af80c5ac5310fe26183
2021-09-03IVGCVSW-6262 Add support for Reduce ProdTeresa Charlin
* Tflite parser * Tflite delegate * Serializer * Deserializer * Ref, CpuAcc and GpuAcc workloads Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I601a9ee1680b372c7955d9a628857d08c3cfd377
2021-09-02IVGCVSW-6294 Added support for LRN to TfLiteParserMike Kelly
* Added support for LRN to TfLiteParser Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ia34441a4adeecd1f17c65af047d6c207729703ec
2021-07-21IVGCVSW-6176 Add support for shape_signature in the tflite parserFinn Williams
* tflite shape_signatures will now be the preferred way to detect dynamic tensors * add test utility to the parser that converts a model's tensors to dynamic * by default tests will run a dynamic version of the model in addition to the original * fix dynamic shape inference of unpack operator * reactivate and fix quantize test * add shape inference to expand dims Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: If11ba19d813cd3590707583dff1e4eb0e6412a1d
2021-07-21Added comparison operators to TfLiteParserBruno Goncalves
E.g. Equal, NotEqual, Greater, GreaterOrEqual, Less and LessOrEqual Signed-off-by: Bruno Goncalves <bruno.slackware@gmail.com> Change-Id: Id56ef3cc19cc5c5daa19354010c9f25766e5fd00
2021-07-01IVGCVSW-6075 Add ParseExpandDims to TfliteParserTeresa Charlin
* Add ExpandDims tests in tfliteparser * Add support for negative axis to squeeze Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I604c9b4ac6514895e9e3d4d85c2937e797d288e0
2021-06-18MLCE-510 Add CpuRef Shape Operator to ArmNNKeith Davis
* Add TfLiteParser and delegate support Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Id3219ba7cc7128b5e73de2c7d8d076a40dcce9c5
2021-05-25IVGCVSW-3649 Add TfLite parser support for Prelu layerNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I3dedcc86efe1a67c709d9da636953e2fc400107b
2021-04-15IVGCVSW-5829 Segfault in tflite-parser, int8 modelsMatthew Sloyan
* Updated ParseSplit TfLiteParser function to read correct axis data. * Improved validation in ParseSplit and ParseSplitV function. * Added TensorFlow BOOL support to TfLiteParser. * Added supported ElementWiseUnary operators to TfLiteParser E.g. ABS, LOGICAL_NOT and RSQRT. * Removed ParseExp and ParseNeg function implementation in favour of reusable ParseElementWiseUnary function. * Removed Exp.cpp and Neg.cpp files and moved tests to ElementWiseUnary.cpp. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ibce36e3ce4d95755dda88abc2ddde1e07e62c5e2
2021-04-12IVGCVSW-5410 Add front-end support for CASTmathad01
IVGCVSW-5415 Add TfLiteParser support for CAST * Added front end support for CAST, including support in the Reference workload, Serialization, Deserializtion, Unit tests, and TfLiteParser. Signed-off-by: mathad01 <matthew.haddon@arm.com> Change-Id: Iaf670ca5912a21ed6bc84f7f83a68b42154846bb
2021-04-09IVGCVSW-5804 TfLiteParser fails to correctly parse ArgMinMaxMatthew Sloyan
* Fix for GitHub#523. * Updated ParseArgMinMax function to read correct axis data. * Improved validation in ParseArgMinMax function. * Added ARG_MIN support to TfLiteParser. * Added ArgMinMax unit tests for TfLiteParser. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib4ce1a7c66e210c47859a130c4896aac958f2654
2021-03-25IVGCVSW-5741 Update FullyConnected in TfLiteParser to support NonConstWeightsFinn Williams
!armnn:5180 * Remove unnecessary memcopy for non permeuted const tensors Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: Idc3ce2ac001e7d6be61819279de486f093730383
2021-02-09MLCE-347 'REDUCE_MIN, REDUCE_MAX, REDUCE_SUM Support'Sadik Armagan
* Added TfLiteParser support for REDUCE_MIN and REDUCE_MAX operators * Added ACL workloads support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators * Added TfLite Delegate support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I8085d59946bfd4ab78a59a61f899031ae53371a8
2021-02-08IVGCVSW-4901 Add semantic versioning to Parsers and TfLite DelegateMatthew Sloyan
* Added Version.hpp to all Parsers * Added Version.hpp to TfLite Delegate * Updated CMakeLists to use new versions * Added GetVersion method to parsers and TfLite Delegate Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: If29e1e6d9e615f9095ec1c01ad47acfff40b1dd5
2021-02-04IVGCVSW-5592 Implement Pimpl Idiom for Tf and TfLite ParsersKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I4a82aca4a2c47b3c598b91bc0075c09397be728a
2021-02-03backends/reference: Add ReduceSum operation supportSadik Armagan
This patch addes ReduceSum operation support for reference backend, which computes the sum of elements across dimensions of a tensor. Changelog v1: - Fix file header descriptions. Chagelog v2: - Fix line limit issue. - Fix type conversion issue. Changelog v3: - Remove tabs. - Modify newly added file headers. Changelog v4: - Symbol on header isn't allowed so drop it from newly added file headers. Changelog v5: - Remove tabs, fix the use of brackets and align lines correctly. Changelog v6: - Add serializer and deserializer support. Changelog v7: - Fix build error add missed code. Changelog v8: - Rename ReduceSumDecriptor to ReduceDescriptor - Update m_KeepDims field data type to bool on ReduceDescriptor - Add ReduceOperation field to ReduceDescriptor - Rename ReduceSumLayer to ReduceLayer - Update ReduceLayer to use ReduceDescriptor - Update ReduceLayer::ValidateTensorShapesFromInputs() function - Rename RefReduceSumWokload to RefReduceWorkload - Update workload to use ReduceDescriptor - Update workload to use Decoders and Encoders - Remove ReduceSum.hpp and ReduceSum.cpp - Added Reduce.hpp and Reduce.cpp - Move Mean.cpp (which is implementing REDUCE_MEAN) functionality to Reduce.cpp - Update RefMeanWorkload to call Reduce function with ReduceOperation::Mean argument - Remove Mean.hpp and Mean.cpp - Update the Serializer/Deserializer ArmnnSchema.fbs for ReduceLayer, ReduceDescriptor, and ReduceOperation - Update Serializer and Deserializer for serializing/parsing ReduceLayer - Added TfLiter parser Sum test for REDUCE_SUM operator - Make corresponding changes on front-end and Ref backend to support REDUCE_SUM operator Changelog v9: - Fixed build errors. Change-Id: I8c8e034f3df73f9565b3c18eff51ecca6c542195 Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
2021-01-22MLCE-335 'DEPTH_TO_SPACE and GATHER operator support in TfLiteParser'Sadik Armagan
* Added GATHER operator support to TfLiteParser * Added DEPTH_TO_SPACE operator support to TfLiteParser Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Id5d3b54e2d850eb9f19417029efbeb73a3029e69
2020-12-17IVGCVSW-5614 Enable Hard Swish and Elu activationsMatthew Sloyan
* Enabled Hard Swish and Elu in TfLiteDelegate * Added support for Elu in TfLiteParser Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: If09321b58568a98e14cabce610a1586556da041e
2020-09-24Add int32 and int64 ArgMax op supportInki Dae
This patch adds int32 and int64 ArgMax op support. Current ARMNN already has ArgMax op but not used, and it doesn't support int64 output type. So this patch adds a new type, Signed64, and also adds ArgMinMax computation function for int64 type support. In default, output tensor type of ArgMax op is int64 in case of tensorflow lite model so this patch makes a proper function - ArgMax op for int64 or int32 - to be called according to parsed output_type value. With this patch, ARMNN supports both types - int64 and int32 - for ArgMinMax op. Changelog v1: - Check if output data type of ArgMinMax op is valid or not. - Use template function to support int32 and int64 types of ArgMinMax function. - Keep using Signed32 as default data type of m_Output_Type. Change-Id: I7a8e7e38dd9e5acc81464571d8b4d51378fc7f14 Signed-off-by: Inki Dae <inki.dae@samsung.com>
2020-07-28Github#433 Add HardSwish support to TfLiteParserJan Eilers
Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Ic476f8d80bba080ab459db9e6a59cbafd307d129
2020-05-27Add NEG support to TFLite parserDarshan Patel
* Added unit tests * Updated Documentation Signed-off-by: Darshan Patel <darsh.jp@gmail.com> Change-Id: Id22ffebe60732a93798f72801eb8a2a23cdd7ec0
2020-05-27IVGCVSW-4187 Add LEAKY_RELU to TFLite parserSadik Armagan
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I3e934142487b92897eb487099a22d032f80e8e07
2020-05-25Add DIV support to TFLite parserDarshan Patel
* Added unit tests * Updated Documentation Signed-off-by: Darshan Patel <darsh.jp@gmail.com> Change-Id: Iadb5c76139d74d755d7f4be4b023b4417efe1e92
2020-04-29IVGCVSW-4186 Parse TfLite Exp and Split_V operatorsDerek Lamberti
Change-Id: I0cac7ebfe22f2782af3198e6231cb37fa51bbd62 Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2020-01-28IVGCVSW-4335 Add support for per-channel QSymm8 to TfLite parserKeith Davis
Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I52f777f56138a27655a821aff376ecd0d3d23511
2020-01-15IVGCVSW-4193 Add QUANTIZE to the TfLite parserSadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I53431c70edb64c9283ae556407cc07e54469d8cc
2019-12-10IVGCVSW-4191 Add DEQUANTIZE to the TfLite ParserFinn Williams
!armnn:2421 Change-Id: Icdb02b7248ed408c3c8ad2e3e38df5b7cda1c545 Signed-off-by: Finn Williams <Finn.Williams@arm.com>
2019-12-05IVGCVSW-4179 Add RESIZE_NEAREST_NEIGHBOUR to the TfLite parserSadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I6359a8a405c86aef04cde75404393dd4ee917fa5
generated by cgit v1.2.1 (git 2.23.0) at 2024-07-07 22:03:52 +0000