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2021-02-12IVGCVSW-4893 Refactor ILayerVisitor using unified interface strategy.Finn Williams
Signed-off-by: Jan Eilers <jan.eilers@arm.com> Signed-off-by: Finn Williams <Finn.Williams@arm.com> Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: Id7bc8255a8e3f9e5aac65d510bec8a559bf37246
2021-02-03backends/reference: Add ReduceSum operation supportSadik Armagan
This patch addes ReduceSum operation support for reference backend, which computes the sum of elements across dimensions of a tensor. Changelog v1: - Fix file header descriptions. Chagelog v2: - Fix line limit issue. - Fix type conversion issue. Changelog v3: - Remove tabs. - Modify newly added file headers. Changelog v4: - Symbol on header isn't allowed so drop it from newly added file headers. Changelog v5: - Remove tabs, fix the use of brackets and align lines correctly. Changelog v6: - Add serializer and deserializer support. Changelog v7: - Fix build error add missed code. Changelog v8: - Rename ReduceSumDecriptor to ReduceDescriptor - Update m_KeepDims field data type to bool on ReduceDescriptor - Add ReduceOperation field to ReduceDescriptor - Rename ReduceSumLayer to ReduceLayer - Update ReduceLayer to use ReduceDescriptor - Update ReduceLayer::ValidateTensorShapesFromInputs() function - Rename RefReduceSumWokload to RefReduceWorkload - Update workload to use ReduceDescriptor - Update workload to use Decoders and Encoders - Remove ReduceSum.hpp and ReduceSum.cpp - Added Reduce.hpp and Reduce.cpp - Move Mean.cpp (which is implementing REDUCE_MEAN) functionality to Reduce.cpp - Update RefMeanWorkload to call Reduce function with ReduceOperation::Mean argument - Remove Mean.hpp and Mean.cpp - Update the Serializer/Deserializer ArmnnSchema.fbs for ReduceLayer, ReduceDescriptor, and ReduceOperation - Update Serializer and Deserializer for serializing/parsing ReduceLayer - Added TfLiter parser Sum test for REDUCE_SUM operator - Make corresponding changes on front-end and Ref backend to support REDUCE_SUM operator Changelog v9: - Fixed build errors. Change-Id: I8c8e034f3df73f9565b3c18eff51ecca6c542195 Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
2020-11-09IVGCVSW-5091 Add Logical ops frontend and ref implJames Conroy
* Add frontend and reference implementation for logical ops NOT, AND, OR. * Unary NOT uses existing ElementwiseUnary layer and ElementwiseUnary descriptor. * Binary AND/OR uses new layer LogicalBinary and new LogicalBinary descriptor. * Add serialization/deserializion support and add missing ElementwiseUnary deserializer code. * Add additional Boolean decoder in BaseIterator.hpp. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: Id343b01174053a166de1b98b6175e04a5065f720
2020-09-24Add int32 and int64 ArgMax op supportInki Dae
This patch adds int32 and int64 ArgMax op support. Current ARMNN already has ArgMax op but not used, and it doesn't support int64 output type. So this patch adds a new type, Signed64, and also adds ArgMinMax computation function for int64 type support. In default, output tensor type of ArgMax op is int64 in case of tensorflow lite model so this patch makes a proper function - ArgMax op for int64 or int32 - to be called according to parsed output_type value. With this patch, ARMNN supports both types - int64 and int32 - for ArgMinMax op. Changelog v1: - Check if output data type of ArgMinMax op is valid or not. - Use template function to support int32 and int64 types of ArgMinMax function. - Keep using Signed32 as default data type of m_Output_Type. Change-Id: I7a8e7e38dd9e5acc81464571d8b4d51378fc7f14 Signed-off-by: Inki Dae <inki.dae@samsung.com>
2020-07-03IVGCVSW-5020 Refactor TensorShape to host dynamic tensors and scalar valuesTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I63f97fad080dbfeec6433c2548f0311173051a6a
2020-06-26IVGCVSW-4928 Introduce "ShapeInferenceMethod" Option.Teresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I70ef1a9f3cefa1d4cf9220f0e13131d11e7c6418
2020-06-03remove BOM from filesLaurent Carlier
Change-Id: Ia4b4bb3be0ed6e933c77d58f8e9879b1370e9537 Signed-off-by: Laurent Carlier <laurent.carlier@arm.com>
2020-03-18IVGCVSW-4463 Change ProfilingService to a member of runtime from a singletonSadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I345c39a10a4693a500aa1687d9a5cee76da791c3
2020-03-11IVGCVSW-3726 Doxygen touch-upRyan OShea
* Doxygen comment touch-ups * Fixed markup in .dox files * Fixed stylesheet * Doxyfile changes * Added logo file * Added header file Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com> Change-Id: I94c7f5a6923a0bbb5c6ed610f1f55d57e2bb8a49
2020-03-03IVGCVSW-4508 Add BFloat16 data typeNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ie2fcf06d0bae9e2ef958e60ab9e8b121fdc7b590
2020-03-02IVGCVSW-4440 : Add HARD_SWISH Support to Activation in CpuRefColm Donelan
* Add a new Activiation type of HardSwish. * Add CpuRef support and tests. Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: I68c3840aa45b7a27d5e416a5d50fe8f99f003ce8
2020-02-28IVGCVSW-4439: Adding Elu support to ActivationDavid Monahan
* Added CpuRef implementation * Added Unit Tests * Added Quantizer Test * Enabled Tests for Neon and CL backends on fp32 only * Added to Serializer Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ic23e1797dbc9352b40678c389d7fe2b836b582ea
2020-02-07IVGCVSW-4386 Add ArmNN reference support for QAsymmS8Ryan OShea
* Added Quantization Scheme for QAsymmS8 * Added Unit Tests for QAsymmS8 * Renamed QAsymm8 calls to QAsymmU8 Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com> Change-Id: I897b4e018ba1d808cc3f8c113f2be2dbad49c8db
2020-01-24IVGCVSW-4370 Deprecate DataType::QuantizedSymm8PerAxisDerek Lamberti
!android-nn-driver:2622 Change-Id: If99d3eff71ff66ba28af1e5af248299fe04511b9 Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2020-01-23IVGCVSW-4259 Add frontend and reference workload for UnaryOperationLayerjosh minor
* Added new layer named ElementwiseUnary * Deprecated existing Abs/Rsqrt layer functions * Updated existing Abs/Rsqrt test infrastructure to use new layer * Added boilerplate for new Exp,Neg,Sqrt elemwise op layers * AbsQuantize test removed pending future commit * Serialization support added !android-nn-driver:2550 Change-Id: Ic595c645925e17b45db568187fd05646daf2e87f Signed-off-by: josh minor <josh.minor@arm.com>
2020-01-21IVGCVSW-4364 Only apply deprecated attribute where availableDerek Lamberti
Change-Id: Ifde03ea6d9057db0949acad95560be8852c05f73 Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2020-01-13Rename quantized data types to remove ambiguity for signed/unsigned payloadsDerek Lamberti
!android-nn-driver:2572 Change-Id: I8fe52ceb09987b3d05c539409510f535165455cc Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2019-12-09IVGCVSW-4211 Add Signed 8 bit Quantisation support into the Reference backendFinn Williams
!android-nn-driver:2435 Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I10ecd4a8937725953396805f33a3562a5384c4d4
2019-11-19MLCE-144 Cts NNAPI test cases failedMike Kelly
* Fixed numerous CTS/VTS failures related to Quantization Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: If5c20256366e80b6b9bbc46b2a1c410a9b8c48e1
2019-11-18IVGCVSW-3980 Implementation of Guid generatorNarumol Prangnawarat
* Improve implementation of Guid Generator to separate the range of Static Guid and Dynamic Guid * Unit tests to ensure non-collision Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I4ad1a75ea0b1f37155da0decafb51fc5a61e4187
2019-11-15IVGCVSW-4129 Fix thread starvation due to low capture periodsColm Donelan
* Set default capture period to 10mSec. * Validate capture period in PeriodicCounterSelectionCommandHandler pull it up to 10mSec if it is lower. * Fix segmentation fault in GatordMock when receive thread closes. Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: I9f7ddc70bd99c102c5baef872d28329976a4dc07
2019-11-08IVGCVSW-4067 Change LayerGuid to use ProfilingGuidjaneil01
* Refactoring to enable ProfilingGuid * Add profiling includes to Android.mk Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Ieb25e15e3dc302eb42817d824ad8411ac76dcfe8
2019-11-07IVGCVSW-4102 Move ProfilingGuid to public interfacejaneil01
* Moved ProfilingGuid to Types.hpp * Refactoring to enable ProfilingGuid Signed-off-by: janeil01 <jan.eilers@arm.com> Change-Id: Ibf77002d74e484f8a63ffd96aa14303c1f0d38ae
2019-11-04IVGCVSW-3835 Create Encoder and Decoder for QSymm8PerAxisKeith Davis
* Add QuantizedSymm8PerAxis to armnn DataType (types.hpp) and * Add Quantize and Dequantize template for int8 in TypeUtils to be able to compute QSymm8 of the weight * Create PerAxisIterator for per-axis quantization * Create QSymm8PerAxisDecoder * Create QSymm8PerAxisEncoder Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Ibcfe0288a197b7ee50b543bdbd77b7edb8a547c2
2019-10-21IVGCVSW-3993 Add frontend and reference workload for ComparisonLayerAron Virginas-Tar
* Added frontend for ComparisonLayer * Added RefComparisonWorkload * Deprecated and removed Equal and Greater layers and workloads * Updated tests to ensure backward compatibility Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Id50c880be1b567c531efff919c0c366d0a71cbe9
2019-09-09IVGCVSW-3722 Add function to specify min or max in ArgMinMaxDescriptorNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I2f9d9968cbfda3ec3eadbe9a746e93e816989a3d
2019-08-16IVGCVSW-3639 Add 5d tensor supportMatthew Jackson
* Increased MaxNumOfTensorDimensions and fixed issues related to its use * Fixed issues caused by assuming 5d tensors are invalid * Updated ArmComputeTensorUtils for 5d tensors * Added 5d tensor unit tests for add, mul, stack and reshape (needed by IVGCVSW-3527) Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I5bcd64942d0d04efcc6c5acb240ad4b88e010743
2019-06-28IVGCVSW-3363 Add frontend support for Resize LayerTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I63493ddb7598515773073deb6db2eb3a635c5dfe
2019-05-03IVGCVSW-3014 Add GetSupportedBackends to IDeviceSpecNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I8d6474389376f715074bfa7a75613dbda35bcc6a
2019-03-29IVGCVSW-2866 Implement RegisterDebugCallback for RefDebugWorkloadNattapat Chaimanowong
Change-Id: I9144fb6b7d05561b5b8fd9db5dbe31c9257f10ca Signed-off-by: Nattapat Chaimanowong <nattapat.chaimanowong@arm.com>
2019-03-26IVGCVSW-2832 Update CL pin to 2761c2f0b60175469e959982a25ff0abdca6c9ceJim Flynn
* Removes data format check from NE and CL CopyLayerKernel to fix customer issue with Resnet v1 and v2 50 models failing to run * COMPMID-2075 Fix Segfault in NELSTM (2761c2f0b60175469e959982a25ff0abdca6c9ce) * Added include <functional> to include/armnn/Types.hpp to fix compile failure on CI !android-nn-driver:891 Change-Id: Icbe58b7e6d3276b0e983bdd1c004906b3d0a7a6e Signed-off-by: Jim Flynn <jim.flynn@arm.com>
2019-03-25IVGCVSW-2882 Fix include order in armnn public headersMatthew Bentham
Change-Id: I111eab934824348f5e9c1d1384be5a24546dc19a Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
2019-03-25IVGCVSW-2865 add missing include of functionalMatthew Bentham
Change-Id: Ib110f8fe8b8980ad948d2ca22061e9d020cb33d7 Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
2019-03-22IVGCVSW-2865 Extend IRuntime to add a new method RegisterDebugCallback(...)Nattapat Chaimanowong
* Made changes to LoadedNetwork and IWorkload to pass on the registered callback function Change-Id: I6ea10f2a299d6de8bf681c8ff36d3fbed1d6d887 Signed-off-by: Nattapat Chaimanowong <nattapat.chaimanowong@arm.com>
2019-03-19IVGCVSW-2839 Add QuantisedSymm16 support to the ArmNN frontendNattapat Chaimanowong
Change-Id: I76f4e7db55b0efbb1a5f7d1a32bf451e66add0c7 Signed-off-by: Nattapat Chaimanowong <nattapat.chaimanowong@arm.com>
2019-02-08IVGCVSW-2672 Code cleanup after changesMatteo Martincigh
* Minor code cleanup and refactoring Change-Id: I9c6390c15944686134ddf4b47839762f2bb13922 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2018-12-13IVGCVSW-2348 Support boolean data typeruoyan01
Change-Id: Ifd28e049192e6f5fe5c0f5d358afb2b530eef882
2018-11-19IVGCVSW-2169 Remove DataLayoutIndexed from public APIMatthew Bentham
Change-Id: If8d8087d9d365e467d3ca9bf9c40d7219cb75cfd
2018-11-05Revert "IVGCVSW-2056 + IVGCVSW-2064 : move ClContextControl to the ClBackend"David Beck
This reverts commit d4dfa684941a21314b70593d01b0fc2167eebad4. Change-Id: Id61ce69215505c3cf5d30ec2a7ec9127fb2554fc
2018-10-26IVGCVSW-2056 + IVGCVSW-2064 : move ClContextControl to the ClBackendDavid Beck
Change-Id: Ice19d3f763298bc14585267df389e99df846320d
2018-10-22IVGCVSW-2037 : separate registry for layer support intrefacesDavid Beck
* because their lifetime is different from backends Change-Id: I9ba525e7e503b148cde1294933f3954b8bad3d68
2018-10-22IVGCVSW-1978: Support NHWC for ResizeBilinear CpuRefJames Conroy
* Adds implementation to plumb DataLayout parameter for ResizeBilinear on CpuRef. * Adds unit tests to execute ResizeBilinear on CpuRef using the NHWC data layout. * Adds DataLayoutIndexed API, allowing easy access to the Channels, Height and Width of a tensor based on its data layout. This reduces code duplication. * Refactors original ResizeBilinear implementation and tests to use the DataLayoutIndexed API when required. Change-Id: Ic2b8916cdd2e370d070175547079d774daf6d7bf
2018-10-22IVGCVSW-1952 : add BackendId class to prepare for the replacement of Compute ↵David Beck
enum !armnn:152674 Change-Id: I1bcdfdfbfb73e502d58f35717e2558e24651013c
2018-10-22IVGCVSW-1987 : registry for backend creation functions (factories)David Beck
Change-Id: I13d2d3dc763e1d05dffddb34472bd4f9e632c776
2018-10-10IVGCVSW-1642 : adding IBackendInternal interfaceDavid Beck
Change-Id: Icd55fed8381af319f11b4cd977cf03103cdf1bd9
2018-10-10IVGCVSW-1642 : introducing the IBackend interfaceDavid Beck
Change-Id: Iaadee0a08c0594c9a3c802a48fe346e15f2cbbb2
2018-10-10IVGCVSW-1883 Add support for different memory layoutsDerek Lamberti
Change-Id: I6e9973bf25acad980fb4e96af8080ac829db0d28
2018-09-17IVGCVSW-1807 : change license text in file headersDavid Beck
All changes are the same: // // Copyright © 2017 ARM Ltd. All rights reserved. -// See LICENSE file in the project root for full license information. +// SPDX-License-Identifier: MIT // Change-Id: I37eae011411133663ca9d2b059714d92f8bf8e24
2018-08-31Release 18.08telsoa01
2018-03-29Release 18.03surmeh01
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