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2023-07-25IVGCVSW-7883 Front end and reference implementation for TILETeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Cian McGriskin <cian.mcgriskin@arm.com> Change-Id: I0afb2403fee11c5c1e58ea65e2525e99594d8f2d
2023-07-04IVGCVSW-7831: Front end and Reference Implementation for REVERSE_V2Tianle Cheng
* Descriptors added for ReverseV2 * Layer definition added * Input validation added * Reference workload implementation for ReverseV2 added * Reference layer unit tests made for ReverseV2 * CompareTensors method updated to support comparison between empty tensors * CMake and other build files updated Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I805738454421309fda77c44218a8df171d68dc18
2023-05-17IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE.John Mcloughlin
* Added 2 new operators as ElementWiseBinary ops * Ref End to End and unit tests * Serialize and Deserialize tests * Delegate and Opaque Delegate tests * TfLite Parser tests Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I537158127f602f0c41ca0402aa31655cd3bd4281
2023-04-19GitHub #640 Add support for CEIL operatorTeresa Charlin
* Reference workload * TfLite Delegate * TfLite Parser * Serializer and Deserializer * Changed fallback tests in delegate to use COS instead of CEIL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I36e0dbff33694182d1dba0c95d463506428e2f04
2023-03-14IVGCVSW-3808 Add ElementwiseBinaryLayerMike Kelly
!android-nn-driver:9329 * Added ElementwiseBinaryLayer that can represent all ElementwiseBinary operations including Add, Div, Sub, Maximum, Mul and Minimum. * Updated Delegate to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated Deserializer to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated OnnxParser to use ElementwiseBinaryLayer instead of the Add layer. * Updated TfLiteParser to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated CL and Neon tests to use ElementwiseBinaryLayer. * Updated CL and Neon Backend Specific Optimizations to accept ElementBinaryLayers as well as Add, Div, Mul, Sub, Maximum and Minimum layers. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I7cbb96b60eb01f0e2b57b0541016d48a08b86c75
2023-01-31Minor update to MemorySource to keep it usable as a bit mask.Colm Donelan
Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I971ea25b3380329aa1ad3936e7f5db1f5039805a
2023-01-12Fix wrong last layer is Types.hppTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I55c1020dbfe13af439236fa72057f114e78e8bd3
2022-11-16IVGCVSW-7214 Disable BF16-Turbo-Mode and remove conversion layersRyan OShea
- Remove Bf16ToFp32 Conversion Layer - Remove Fp32ToBf16 Conversion Layer - Remove B16 Conversion tests * Throw exception if m_ReduceFp32ToBf16 optimzer option is set to true * Provide comments to enable fast math in order to use bf16 * Update docs to inform users to enable fast math for bf16 Execute Network Changes * Require bf16_turbo_mode to also have fast_math_enabled set to true - Remove setting m_ReduceFp32ToBf16 optimizer option Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ibaa6da9d29c96a1ce32ff5196b0847fde9f04a1c
2022-07-27IVGCVSW-7109: Add Batch MatMul front end support - ReferenceSamuel Yap
* Descriptors added for BatchMatMul * Layer definition added * Input validation added (will likely change when opt. param support comes in) * Ref workload implementation for BatchMatMul added (will also change with opt. param support) * Ref layer tests made for BatchMatMul * CMake and other build files updated Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: Ic885301da543ee0fbe7922b85e7f9658c4efc617
2022-07-08IVGCVSW-7060 Add GetMemoryRequirements to IWorkloadFrancis Murtagh
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I8c59f1feb9c44351427715b08d762b5a73320af5
2022-05-03IVGCVSW-6856 Add GATHERNd FrontEnd and Ref ImplementationTeresa Charlin
* Add front end * Add reference workload * Add unit tests * Add EndToEnd test Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4cebd17b18476df86162e2dda3366c10e80bd2f8
2022-03-01IVGCVSW-6704 Change the namespace from armnn::profiling to arm::pipeCathal Corbett
* Updated ABI version to 29 due to being the first ABI break in 22.05 !android-nn-driver:7226 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I9c50007dcd5b5e792757e7bd1213606df5ffec36
2021-11-23IVGCVSW-6610 No bounds checking performed when indexing PermutationVector ↵Cathal Corbett
elements. * Added out of bounds index error checking to PermutationVector operator[] method in Types.hpp. * Added armnn unit tests to UnitsTests.cpp to check error when using PermutationVector alone and with TransposeDescriptor and PermuteDescriptor. * Added pyarmnn unit test to check error when using PermutationVector. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ie5a8090f07b571a6bdf79a8cad621c31cc1891b7
2021-11-17IVGCVSW-6509 Front End + Reference Workload implementationTamás Nyíri
Subtask of story: IVGCVSW-6164 Add a Pooling3d FrontEnd and Ref Implementation * Add front end * Add reference workload * Add corresponding unit tests Change-Id: Icce4146dd0a06a1da46a2def00a82d343e171750 Signed-off-by: Tamas Nyiri <tamas.nyiri@arm.com>
2021-11-05IVGCVSW-6412 Implement CLBackend ICustomAllocatorDavid Monahan
* Added implementation of ClBackendDefaultAllocator * Added back in some pure virtual functions that were mistakenly removed from the CustomMemoryAllocatorSample * Added a new Gralloc MemorySource for memory which originates from the gpu * Added unittests Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: Id2abb33d82697df36426f5709756c616af3e8ed7
2021-10-29Fix armnn_external_delegate option parsingJan Eilers
* Fixed the mechanism in armnn_delegate.cpp which creates the runtime options by moving it to DelegateOptions. BackendOptions are used in the runtime options as well as in the optimizer options but need to be processed separately. * Added runtime options to DelegateOptions to make it easier to differ between backend options of the runtime and the optimization * Updated armnn_external_delegate to use runtime options * Added explanations to OptimizerOptions Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: I34235474147def261821e4576dd41a83ad492258
2021-10-27IVGCVSW-6469 Add MirrorPad FrontEnd and Ref SupportMatthew Sloyan
* Added PaddingMode enum to PaddingDescriptor to enable Symmetric and Reflect padding. * Added Symmetric and Reflect Ref implementation. * Added Serializer & Deserializer support. * Added unit tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I4bed907b31742b32ccefe5e8ca39a6f1e5bd9dee
2021-10-20Add ConstTensorsAsInput support for Conv3dMatthew Sloyan
* Constant weights and biases are now stored as Constant layers. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteParser. * Updated Ref backend to handle constant weights and bias as inputs rather than reading from member variables. * Added Conv3d EndToEnd test. * Added NCDHW DataLayout and unit tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I10cdd354ca5f1c748730f92ffdb36bf810f83c8e
2021-10-08IVGCVSW-6313 Support pre-importing outputsFinn Williams
* Add ClearImportedInputs/Outputs function to IRuntime * Add UnImport function to ITensorHandle * Remove mutex from IWorkingMemHandle Change-Id: I34c9b6e1618755e10f3b4597afa1d9a9ea97e5fe Signed-off-by: Finn Williams <finwil01@e127804.cambridge.arm.com>
2021-10-06IVGCVSW-6338 IMemoryOptimizerStrategy Create a wrapper validator strategyFrancis Murtagh
* Add validator wrapper * Add validation logic: Condition #1: All Memblocks have been assigned to a MemBin Condition #2: No Memblock is assigned to multiple MemBins Condition #3: No two Memblocks overlap in both the X and Y axis Memblocks can overlap on the X axis for SingleAxisPacking Memblocks can overlap on the Y axis or the X for MultiAxisPacking but not both * Add test strategies and tests for overlap, duplicates and unassigned blocks Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I7a779b35538ecf18a33b62b84512eba69eda1f86
2021-10-02IVGCVSW-5985 Remove deprecated codeJan Eilers
* Removes deprecated AddLayer, IsLayerSupported functions * Marks the whole LayerVisitor class as deprecated not just the constructor. This required to wrap all Accept functions in a no deprecate macro because the LayerVisitor is used as a parameter in there * Removes usage of deprecated LayerVisitor and replaces it with ExecuteStrategy. This required a few structural changes in the unit tests * Adds a default implementation for IStrategy called StrategyBase * Changes pyarmnn to use non deprecated constructor for INetworkProperties and adds related unit test * Marks usage of deprecated code in pyarmnn as deprecated. This required to extend INetworkProperties to allow backwards compatibility * Removes deprecated functions from CpuAcc, GpuAcc and Ref backends Note: This patch breaks compatibility with backends that are not updated in this patch !android-nn-driver:6325 Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Id13b6f37a74d26eadeda2da1dc92915e725ed5a5
2021-10-01IVGCVSW-6163 Add Conv3d FrontEnd and Ref ImplementationMatthew Sloyan
* Added front-end * Added Reference workload * Added Serializer & Deserializer support * Added unit tests * Added NDHWC DataLayout Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Iec4d39e7433b5334d52fa44cf8efc6bcd39319d8
2021-09-24IVGCVSW-3705 Add Channel Shuffle Front end and Ref ImplementationSimon Obute
* Add front end * Add reference workload * Add unit tests * Add Serializer and Deserializer * Update ArmNN Versioning Signed-off-by: Simon Obute <simon.obute@arm.com> Change-Id: I9ac1f953af3974382eac8e8d62d794d2344e8f47
2021-09-15IVGCVSW-6312 Support pre-importing inputsFinn Williams
Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: Ifc5e6f2e36767cb2a5cbf281d40ec9989b581abc
2021-09-15IVGCVSW-6298 'IMemoryOptimizerStrategy Add declarations and constant layer ↵Sadik Armagan
strategy' * Added IMemoryOptimizerStrategy interface * Added ConstLayerMemoryOptimizer strategy Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I6a92e659379e5cc39c375b669678eee8a8c08c20
2021-09-03IVGCVSW-6262 Add support for Reduce ProdTeresa Charlin
* Tflite parser * Tflite delegate * Serializer * Deserializer * Ref, CpuAcc and GpuAcc workloads Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I601a9ee1680b372c7955d9a628857d08c3cfd377
2021-08-20IVGCVSW-6249 Add ProfilingDetails Macros to all workloads in Ref, Neon, CLKeith Davis
* Add functionality to only output network details in ExNet Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I0c45e67193f308ce7b86f1bb1a918a266fefba2e
2021-07-22MLCE-530 Add front end support for UnidirectionalSequenceLstm on ArmNNNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I57bcbdec3eb0155f41af0fe7d6abf9bac2ec86eb
2021-06-16MLCE-510 Add CpuRef Shape Operator to ArmNNKeith Davis
* Add front end * Add reference workload * Serialization/Deserialization * Add unit tests * Update ArmNN Versioning Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I6fcb1fa341d6f08dea4003b13544e6e9f53fefd3
2021-06-16IVGCVSW-6088 Add Sin and Log to ElementWiseUnaryTeresa Charlin
* Ref workload * Cl workload * Neon workload * Serializer * Deserializer * Remove boost include from TensorTest.cpp Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I498548169cc77609c55cf3105f1de5a7429772cf
2021-06-01IVGCVSW-5833 Move the ProfilingGuid out of Types.hpp to its own header in ↵Nikhil Raj
profiling common !android-nn-driver:5691 Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ib71af0831e324ac6bd27b1a36f4a6ec1a703b14a
2021-05-31IVGCVSW-6059 Fixing PermutationVector.end() to cope with dimensions < 5Colm Donelan
* PermutationVector.end() was returning the end of the fixed size array m_DimMappings rather than the number of mappings set by the constructor. Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: Ie218f7922e8c9c35c1dc702e43a5ee2fd1a61ff0
2021-05-06IVGCVSW-5813 Add Async Queue to IRuntimeKeith Davis
Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Icc0d131c8ee2e9748e2f14762a75962b39c10f9d
2021-04-29IVGCVSW-5819 5820 5821 Add MemorySourceFlags to ↵Francis Murtagh
TensorHandleFactoryRegistry::GetFactory * Modify Layer::CreateTensorHandles to include MemorySource * Modify INetworkProperties to add MemorySource * Disable Neon/Cl fallback tests until full import implementation complete Change-Id: Ia4fff6ea3d4bf6afca33aae358125ccaec7f9a38 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2021-04-12IVGCVSW-5410 Add front-end support for CASTmathad01
IVGCVSW-5415 Add TfLiteParser support for CAST * Added front end support for CAST, including support in the Reference workload, Serialization, Deserializtion, Unit tests, and TfLiteParser. Signed-off-by: mathad01 <matthew.haddon@arm.com> Change-Id: Iaf670ca5912a21ed6bc84f7f83a68b42154846bb
2021-04-02IVGCVSW-5783 'Add AsyncExecution Capability'Sadik Armagan
* Added AsyncExecution to the BackendCapability enum class. * Logged a warning if backends do not support AsyncExecution capability if AsyncNetwork is created. Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I49f8467297f4b6b8e414cb6a3638a7d3f1bb886a
2021-03-25IVGCVSW-5736 and IVGCVSW-5743 'NonConstWeights: Update front-end and ↵Sadik Armagan
TfLiteDelegate support for FullyConnected Operator' * Added front-end support for non-const weights for FULLY_CONNECTED operator * Added FULLY_CONNECTED end-to-end test * Updated FULLY_CONNECTED operator support in TfLite Arm NN Delegate for non-const weights * Updated the version numbers Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Iffa5b9aa9297aca4c02d923cce4636c88ac21faa
2021-02-12IVGCVSW-4893 Refactor ILayerVisitor using unified interface strategy.Finn Williams
Signed-off-by: Jan Eilers <jan.eilers@arm.com> Signed-off-by: Finn Williams <Finn.Williams@arm.com> Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: Id7bc8255a8e3f9e5aac65d510bec8a559bf37246
2021-02-03backends/reference: Add ReduceSum operation supportSadik Armagan
This patch addes ReduceSum operation support for reference backend, which computes the sum of elements across dimensions of a tensor. Changelog v1: - Fix file header descriptions. Chagelog v2: - Fix line limit issue. - Fix type conversion issue. Changelog v3: - Remove tabs. - Modify newly added file headers. Changelog v4: - Symbol on header isn't allowed so drop it from newly added file headers. Changelog v5: - Remove tabs, fix the use of brackets and align lines correctly. Changelog v6: - Add serializer and deserializer support. Changelog v7: - Fix build error add missed code. Changelog v8: - Rename ReduceSumDecriptor to ReduceDescriptor - Update m_KeepDims field data type to bool on ReduceDescriptor - Add ReduceOperation field to ReduceDescriptor - Rename ReduceSumLayer to ReduceLayer - Update ReduceLayer to use ReduceDescriptor - Update ReduceLayer::ValidateTensorShapesFromInputs() function - Rename RefReduceSumWokload to RefReduceWorkload - Update workload to use ReduceDescriptor - Update workload to use Decoders and Encoders - Remove ReduceSum.hpp and ReduceSum.cpp - Added Reduce.hpp and Reduce.cpp - Move Mean.cpp (which is implementing REDUCE_MEAN) functionality to Reduce.cpp - Update RefMeanWorkload to call Reduce function with ReduceOperation::Mean argument - Remove Mean.hpp and Mean.cpp - Update the Serializer/Deserializer ArmnnSchema.fbs for ReduceLayer, ReduceDescriptor, and ReduceOperation - Update Serializer and Deserializer for serializing/parsing ReduceLayer - Added TfLiter parser Sum test for REDUCE_SUM operator - Make corresponding changes on front-end and Ref backend to support REDUCE_SUM operator Changelog v9: - Fixed build errors. Change-Id: I8c8e034f3df73f9565b3c18eff51ecca6c542195 Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
2020-11-09IVGCVSW-5091 Add Logical ops frontend and ref implJames Conroy
* Add frontend and reference implementation for logical ops NOT, AND, OR. * Unary NOT uses existing ElementwiseUnary layer and ElementwiseUnary descriptor. * Binary AND/OR uses new layer LogicalBinary and new LogicalBinary descriptor. * Add serialization/deserializion support and add missing ElementwiseUnary deserializer code. * Add additional Boolean decoder in BaseIterator.hpp. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: Id343b01174053a166de1b98b6175e04a5065f720
2020-09-24Add int32 and int64 ArgMax op supportInki Dae
This patch adds int32 and int64 ArgMax op support. Current ARMNN already has ArgMax op but not used, and it doesn't support int64 output type. So this patch adds a new type, Signed64, and also adds ArgMinMax computation function for int64 type support. In default, output tensor type of ArgMax op is int64 in case of tensorflow lite model so this patch makes a proper function - ArgMax op for int64 or int32 - to be called according to parsed output_type value. With this patch, ARMNN supports both types - int64 and int32 - for ArgMinMax op. Changelog v1: - Check if output data type of ArgMinMax op is valid or not. - Use template function to support int32 and int64 types of ArgMinMax function. - Keep using Signed32 as default data type of m_Output_Type. Change-Id: I7a8e7e38dd9e5acc81464571d8b4d51378fc7f14 Signed-off-by: Inki Dae <inki.dae@samsung.com>
2020-07-03IVGCVSW-5020 Refactor TensorShape to host dynamic tensors and scalar valuesTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I63f97fad080dbfeec6433c2548f0311173051a6a
2020-06-26IVGCVSW-4928 Introduce "ShapeInferenceMethod" Option.Teresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I70ef1a9f3cefa1d4cf9220f0e13131d11e7c6418
2020-06-03remove BOM from filesLaurent Carlier
Change-Id: Ia4b4bb3be0ed6e933c77d58f8e9879b1370e9537 Signed-off-by: Laurent Carlier <laurent.carlier@arm.com>
2020-03-18IVGCVSW-4463 Change ProfilingService to a member of runtime from a singletonSadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I345c39a10a4693a500aa1687d9a5cee76da791c3
2020-03-11IVGCVSW-3726 Doxygen touch-upRyan OShea
* Doxygen comment touch-ups * Fixed markup in .dox files * Fixed stylesheet * Doxyfile changes * Added logo file * Added header file Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com> Change-Id: I94c7f5a6923a0bbb5c6ed610f1f55d57e2bb8a49
2020-03-03IVGCVSW-4508 Add BFloat16 data typeNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ie2fcf06d0bae9e2ef958e60ab9e8b121fdc7b590
2020-03-02IVGCVSW-4440 : Add HARD_SWISH Support to Activation in CpuRefColm Donelan
* Add a new Activiation type of HardSwish. * Add CpuRef support and tests. Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: I68c3840aa45b7a27d5e416a5d50fe8f99f003ce8
2020-02-28IVGCVSW-4439: Adding Elu support to ActivationDavid Monahan
* Added CpuRef implementation * Added Unit Tests * Added Quantizer Test * Enabled Tests for Neon and CL backends on fp32 only * Added to Serializer Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ic23e1797dbc9352b40678c389d7fe2b836b582ea
2020-02-07IVGCVSW-4386 Add ArmNN reference support for QAsymmS8Ryan OShea
* Added Quantization Scheme for QAsymmS8 * Added Unit Tests for QAsymmS8 * Renamed QAsymm8 calls to QAsymmU8 Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com> Change-Id: I897b4e018ba1d808cc3f8c113f2be2dbad49c8db
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