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2024-02-14Update project number in Doxyfile for 24.02v24.02branches/armnn_24_02Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I33d23163a9e3b204b24e584a19d0e9213d9c4a21
2024-02-14Minor adjustment to the commit for MLCE-1165Tracy Narine
* Rewrote constexpr check to avoid a compile error Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: I09a61314b1b4a5aa1e2baa52711f470802f04131
2024-02-13MLCE-1205 Continue delegate inference following kTfLiteApplicationErrorColm Donelan
* Detect kTfLiteApplicationError from the TfLite runtime and allow inference to continue with a BIG warning. * Fix handling of output tensors in the TfLiteExecutor. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: If99dab7f0ac068fe4d17f338306c7bc5b128250a
2024-02-13IVGCVSW-8284 Out of bounds access error in BasePipeServer.cppColm Donelan
Change-Id: I52c97f003cc8b26aae7e1f5037c79f0d05bd7143 Signed-off-by: Colm Donelan <colm.donelan@arm.com>
2024-02-13MLCE-1165 Model failing to load when pad is folded into Conv2dTracy Narine
* Skipping the optimization which folds pad and conv2d together for a specific case: 1x1 filter and padding size >= filter size Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: I46944e9f736df1ff60469b2d2852e1bba01ab8cd
2024-02-09IVGCVSW-7569 GpuFsa Op: Add Reshape OperatorDeclan-ARM
* Add Reshape EndToEnd tests to all backends Signed-off-by: Declan-ARM <decmce01@arm.com> Change-Id: Ic6d07ba8de0cf3271ed0e4c6d604e070ccb968e3
2024-02-09IVGCVSW-8275 GpuFsa Op: Add Activation functions availableTeresa Charlin
* Currently Sigmoid and TanH Functions are implemented. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: If9483be9201dfe47b86acc41ec7932725ac2e39e
2024-02-08IVGCVSW-7624 GpuFsa Op: Add Softmax operatorJohn Mcloughlin
* Added softmax operator support * Added test cases Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I51d530b110c4cb812f5aab31ad1ee4022d81d19e
2024-02-08IVGCVSW-8276 GpuFsa Op: Add MatMulTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ib95eb0fd71106e684cb7652917b8de9f0ac73f9c
2024-02-08IVGCVSW-7570 GpuFsa Op: Add ElemenWiseBinary Operators availableTeresa Charlin
* Refactor to generalize * Add MUL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I2ee273d50d3a8b114b5a41abc8ee7585b15e3308
2024-02-08Add and tidy up activation and elementwise binary end to end testsTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I9714c4c57e923ac775dcde2951de07cea35c40ee
2024-02-08Update ACL pin to 24.02 release branchNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I156c549b4ecc0679a54a9db76f8f813daf527cb8
2024-02-08IVGCVSW-7625 GpuFsa Op: Add Resize/Scale operatorTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I695ef452d004ed7b606020037cad681ef1fc80c3
2024-02-07IVGCVSW-7622 GpuFsa Op: Add Cast operatorTracy Narine
* Added cast operator support Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: Ie12cb1559a7a059ff35e1c395bc77243499243cd
2024-02-07IVGCVSW-7675 Rework more DelegateUnitTests so backends are subcases.Colm Donelan
The intent of this change is to remove the per backend test cases in the delegate unit tests. They will be replaced by using DocTest SUBCASES. The sub cases are paramaterized by the available backends. The list of available backends are determined by the compilation flags. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I6dd0369491c4582b8e2467b911dfd085dddcf576
2024-02-07IVGCVSW-7623: GpuFsa Op: Add Pool2d operatorTeresa Charlin
* Add Pool2d EndToEnd tests to all backends * Add utility functions for the attributes in a separate file * Remove some unnecessary includes Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0f82ebbf7b3301c6368462fb4fb4d4d02b246fc6
2024-02-06Update ACL pin toe695579911fbe6aa06b11dbeeec7af5637a92f2bTeresa Charlin
* arm_gemm: SME: Remove artificial single-thread constraint on quantized int8 kernels Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iaf3fce5dedaf5171dae77be8faca997e281d490e
2024-02-06Update ACL pin to 0c17c4b42e6b819b0140f36527dbaf6166f37b2bNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I497d25fd89946a1d02681c8a45a85718734695c4
2024-02-02Update ACL pin to 2b9fa593a0a172bf36a02b5cdb840c6b9b361d7cTeresa Charlin
* Use the stable CKW API in the GPU dynamic fusion backend Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Id8d5b1f3fe5c3bd2f9f1fda7c8c6463933df9782
2024-02-01Update ACL pin to 7ab7fca87cca8775f82b0e9efec6a40975910c17Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ie5cd9e79c33e4f29503099aa1dfb5069926fe5c8
2024-02-01Removing unnecessary includes from GpuFsa operators.Colm Donelan
Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I3d089e7f1b75596501130d3ece3a94dd326cc27e
2024-01-31IVGCVSW-7568 Implement Sub ElementwiseBinary operator GpuFsaJohn Mcloughlin
* Added support for Gpu Sub operator * Added unit tests Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I1efaa485772a3716e3781566843bd50bd9bab811
2024-01-30Update ACL pin to fb92e22c642985a5ea7906e7e7f46285d1d47718Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ibb73c0e1d265b30c6c9537553e16f62b087dbd77
2024-01-30IVGCVSW-7550 GpuFsa Op: Add ElementWiseBinary Operator ADDTracy Narine
* Adding support for Gpu Add operator * Added tests for layer support, end to end and optimization Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: Ie9328d269c5c0ff60a7e10133b728ac9265033af
2024-01-26IVGCVSW-7571 GpuFsa Op: Add Depthwise Conv2dTianle Cheng
* Added DepthwiseConv2d support for GpuFsa backend. * Updated DepthwiseConv2d End-to-End test Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I646839980d138ae235a00990c97c6e66a4418a5e
2024-01-25Update ACL pin to 2aec5f1870b6cd5edd7de6403b5cf75530eb77f5Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I48a8d4fac4a68eaa34458003123e67df780e62fb
2024-01-23IVGCVSW-7628 Update GpuFsa to use ACLs latest fixesOrlaith Monahan
* Updates to the existing GpuFsa backend to incorporate patch: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10990 * Update the ACL pin to include the patch with the fixes Change-Id: I08d111265f4617657ee7f20249aeb111f64ba7a9 Signed-off-by: David Monahan <david.monahan@arm.com>
2024-01-23Minor fixes related to the LeakyRelu Activation support commit (IVGCVSW-7344)Tracy Narine
* Using the tosa defines from the serialization library to avoid compile errors in other backends * Fixing a bug in the version compat macro Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: Ie4ee80666c6f8033bb72e0e6cb8ca5ef41933990
2024-01-22IVGCVSW-7165 - PreCompiledWorkload and Conv2d Integration work for GpuFsaDavid Monahan
* Add PreCompiledWorkload implementation for GpuFsa * Add ConstantWorkload implementation for GpuFsa * Add Input/Output workloads for GpuFsa * Added CopyMemGeneric workload for GpuFsa * Separate creation and validation of sketch tensors into seperate functions Signed-off-by: Kevin May <kevin.may@arm.com> Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ie7299a4c61073b5ca03d9f8681458869ef7ce743
2024-01-22Update ACL pin to 3a704ae94fc5cbfce1053886f543b31977f1774cNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I143949b1d3b39f704ac822c44521284ea8d64491
2024-01-18IVGCVSW-8201 Update get_tensorflow.sh script in Arm NN with Tf 2.15Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I6002e8df95a6f4bdba6eb5ea5de5b09f6ef1676e
2024-01-18Bugfix: Remove implicit sign conversion causing -Werror=sign-conversionFrancis Murtagh
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: If2d5005889b8b0011e4592b46276367798556751
2024-01-18IVGCVSW-8200 Update Build Tool to TF v2.15Declan-ARM
* Tag updated from v2.14 to v2.15 in common build-tool script Signed-off-by: Declan-ARM <decmce01@arm.com> Change-Id: Ib216d242a75f66429b3db0f59555e2f2f95cc0dd Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
2024-01-17IVGCVSW-7344 Add LeakyRelu Activation support to TOSA Reference BackendTracy Narine
* Adding a one to many FP32 tosa mapping for Leaky Relu * Added a few utilities that are needed * Added new tests Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: If1d7c57a523961581777a244416a7346a9310803
2024-01-17IVGCVSW-7663 Update build_android_ndk_guide scriptJohn Mcloughlin
* Change parameters to build with NDKr26 Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: If497b53e285fe00de3bd2d4c5307d3e7da3b47c6
2024-01-17IVGCVSW-8202 Update documents after TF 2.15 updateTracy Narine
* Updated .md files with new version number Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: I351d141838b95aca29f3ebe43f7e2f9944ec3417
2024-01-17Update ACL pin to 27dee1e276dc8816a5b9f4e04d8b31d5c5816ca0Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I54a345f04cf20b0445977f59c81537e67b714bd0
2024-01-12Update ACL pin to c5df0c6c5d41a1c4c42ed9b9106d4a2c87689b38Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I44dc27cd0eeb0f221089fe82149cbb5d7dc2e821
2024-01-11Update ACL pin to 5d7a93a331b556b29bb00d436286fb7674a49f1aNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I8c84db797cbb63c3031092a4ec8e2f7e8b770006
2024-01-05Update ACL pin to 7fe7791468978429ab02343a8485b51b39832027Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I985309714c11ed29e320ac5c5455891f7432bfea
2024-01-03IVGCVSW-8118 Added Two-Layer and Three-Layer Maxpool2d EndToEnd tests.Tianle Cheng
Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I4d04fef5ce97901cd687e29adf86b18cb54a5d9a
2024-01-03Update ACL pin to c310c11a4baa1eca4e4007b3250f4a771989f36fTeresa Charlin
* Fix nightly issue caused by gemm_reshaped_only_rhs_mmul kernel Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iff1edca64a000387c33f12756f15b1ef2fe575cd
2024-01-02Fix for Resize with align corners = true creates a memory leak when using ↵Teresa Charlin
valgrind * Add end to end unit test to CpuRef, CpuAcc and GpuAcc backends Resolves: IVGCVSW-8193 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7be226f084ec814ac72c2c9b3c47c07b3baf0aa5
2023-12-22IVGCVSW-8178 Update build tool with Android ndk r26Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I86deb3bb2a587e59f10cfc3efce7118c2156c169
2023-12-21Add Quantize Support to TOSA Ref BackendTeresa Charlin
* Adding a one to many tosa mapping for Quantize * Added tests * Resolves IVGCVSW-7175 Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ia0852fefb618b4a29c2601b9de8b6b2731229801
2023-12-21Remove the 2 resize tests with align corners from RefEndToEnd.Teresa Charlin
* Relates to IVGCVSW-8193 and IVGCVSW-7346 Change-Id: Ieccee93672a5c73297c4ce69d1eaec588e858df0 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I44df03acd348532a54b66541d91610d382a222b7
2023-12-20IVGCVSW-7830 Remove Reshape where possibleMike Kelly
* Remove reshape on ClBackend * Remove unnecessary restriction on NeonBackend remove Reshape Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I79940c9f8609d19b79f2fbe55225ffc8f0d90c25
2023-12-20Update ACL pin to 306a8a9fb0dacd2c1e5d65f76420c12162203986Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ib3b3b450197bb08e0f5879be8c7a129f44a49d06
2023-12-18IVGCVSW-7675 Rework DelegateUnitTests so backends are subcases.Colm Donelan
The intent of this change is to remove the per backend test cases in the delegate unit tests. They will be replaced by using DocTest SUBCASES. The sub cases are paramaterized by the available backends. The list of available backends are determined by the compilation flags. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Ia377c7a7399d0e30dc287d7217b3e3b52e1ea074
2023-12-15IVGCVSW-8113 Update EndToEnd tests and TosaReference support for MaximumTianle Cheng
* Added ElementwiseBinary EndToEnd tests with inputs of the same shape to avoid Reshape * Added Slice EndToEnd tests with 4D tensors * Added TosaReference support for Maximum and TosaRefEndToEnd tests Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I4fa24435a75559e00b110d0e542b4f2bf07b21b4
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