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2023-05-15Fix versions in Delegate Quick start guidev23.05branches/armnn_23_05Nikhil Raj
* Fix tflite_runtime version * Fix Arm NN version * Fix Tf version Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I3baa3e2ccfcad524d81ee30b1e12468cd7be2cad
2023-05-11Revert "IVGCVSW-7454 Enable dynamic bias in CpuAcc and GpuAcc in Conv2d ↵TeresaARM
DWConv and FC" This reverts commit fecd9ed396705a17805ffc49839bd82ae24c892b. Reason for revert: IVGCVSW-7727 Dynamic bias CTS failing Change-Id: I53f67d60fca0e60a81298f90450ceef26b97c321 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
2023-05-09IVGCVSW-7454 Enable dynamic bias in CpuAcc and GpuAcc in Conv2d DWConv and FCTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ib6914a9a208475b68e969eba6f70fae4061efa9b
2023-05-09Removing "shiftID" from BackendProfilingCounterRegisterMockBackendTestNikhil Raj
This test case has caused several problems over the years. All the problems are around using counter indices to identify counters rather than names. Updating the test to check for registered counter names. Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Ic5ebc9b2d53f2db301a3067ecce4befc14dcb8a5
2023-05-09IVGCVSW-7626 Change sequence of Interpreter BuildingNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I3f0e224c90a4eea9945183028c9de1b61e75e510
2023-05-09IVGCVSW-5846 Remove TODO statements from Armnn CodeDavid Monahan
* Removed all instances of TODO statements from comments * Removed statements are noted as part of IVGCVSW-5846 * Removed ProtoxtFixture.cpp from the Onnx Parser tests as it's not used Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ia0a15f8a0d4123c8831638634eaa0d1018c40e2c
2023-05-08IVGCVSW-7197 Bugfix: typos - member variables prefixed with p_ not m_Francis Murtagh
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I7df65ff96ce232dedd80debc34e23a595f99fd06
2023-05-08IVGCVSW-7454 Fix CpuAcc FC dynamic weightsTeresa Charlin
* Pass to ACL the flag for constant weights and bias in FC, conv and DWconv workloads Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iae2810c8d1a402d4afc1e757846665315a80d3ea
2023-05-08IVGCVSW-7454 Enable NonConstWeights in GpuAccTeresa Charlin
* Set flag for constant weights and bias in ACL tensorInfo in ACl workloads * Set flag for constant weights and bias in Unit Tests * Add to dot file for FullyConnected layer the constantWeights flag Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I87e1fef516ce4a8a59245dfdf7d92c153418e1d6
2023-05-08Improve reusability of code that is defined out by cmake build pathsRyan OShea
* Added new ARMNN_STUB_PROFILING and ARMNN_DISABLE_DYNAMIC_BACKEND defines to replace BUILD_BARE_METAL and BUILD_EXECUTE_NETWORK_STATIC * Add new CMake variables to disable sample apps and dynamic backends * Improve BUILD_SHARED_LIBS CMake variable * Add new archive output location to various libraries so that the static libraries appear in the same location as the shared libraries * Fixes for bare metal build * Add ARMNN_DISABLE_FILE_SYSTEM defines to missing locations Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: I1db9a8f483e7134bd261294b35240cf21b150d45
2023-05-08IVGCVSW-7485 Update operator support documentation for 23.05Matthew Sloyan
* Added CEIL and other missing operators to TfLiteParser and TfLite Delegate documentation. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ic30a3367a13d3b64aca2f7a8d8cc5b16616a0bcc
2023-05-08IVGCVSW-7626 Add Execute Network for Opaque DelegateNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ibdded86713368ecfdf31c4118dfe8a3404d1e3b8
2023-05-08IVGCVSW-7308 Add GpuAcc Batch MatMul workloadTeresa Charlin
* Call dedicated MatMul kernel in ACL * Add int8 tests * Add int8 to documentation * Force tensors to be dynamic (nonConst) as per request of ACL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7b7ac20deec8637dc46ca990d339d92c4587cbe4
2023-05-08IVGCVSW-7307 Add CpuAcc Batch MatMul WorkloadTeresa Charlin
* Call dedicated MatMul kernel in ACL * Add int8 tests * Add int8 to documentation * Force tensors to be dynamic (nonConst) as per request of ACL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I992ae9aae1174214607bf29305f21cdeaf3fdc1b
2023-05-08BugFix: Calculate explicit padding for Delegate Transpose Convolution using ↵Matthew Sloyan
output size * Added fix to Classic and Opaque Delegate which now matches the TfLiteParser. * Removed uses of single parameter IsValid function in classic Convolution visit functions. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I5be91ec25c11354a9b8472d0a429e71e02df6f9c
2023-05-06Update ACL pin to 23.05 release branchNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Iadba213e78f4c7eed7d1eea2206dcd1d977446b5
2023-05-05MLCE-1050 Error handing Slice operatorsMike Kelly
* If the dimension Size[n] in a Slice is -1 then it should be treated as "InputShape[n] - Begin[n]" but the Delegate simply cast the Size to uint and treated it as 4294967295. * Added the layer name that includes the node index to the Slice to aid debugging. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I45fa88b24982c3c97f48d0dc05cf7d9bb6db4074
2023-05-05IVGCVSW-7423 Add ArmnnDelegatePluginNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ie02021ac56a512598760e4c6d05ef1a80f4aec8d
2023-05-05IVGCVSW-7618 Implement UnidirectionalSequenceLstm operator for Opaque DelegateMatthew Sloyan
* Intermediate tensors aren't accessible through the new Opaque interface yet, so we have to cast to TfLiteNode for now. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ifd91131e5d5ff6cc057b80729fea9afa68ed240b
2023-05-05IVGCVSW-7484 Update versions in Arm NN for 23.05Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ib0d7835355e82d94b66b27a25b56b788c4606ae8
2023-05-05Update ACL pin to 352c07ddd49842b5c3a8e5a2b5a90832bfb70091Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Iaf3242b4d06bd043fe25a00722da6cb6406d013b
2023-05-04IVGCVSW-7605 IVGCVSW-7604 Implement Squeeze and ExpandDims operators for ↵Matthew Sloyan
Classic and Opaque Delegate * Implemented unsupported operators in Classic Delegate. * Added unit tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib39eeea53c114b15943e8dc2e796ce64c40cb3a5
2023-05-04IVGCVSW-7612 Implement Split OperatorsDavid Monahan
* Added implementation for Split / SplitV in Opaque Delegate Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I1ad2925aece7d4e0567e63ecb768348152a70a7a
2023-05-04Add tflite-opaque-delegate flag in build-tool validation scriptNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I402a4c74610b5dc8a3ca6e22218b58fbe59474ed
2023-05-04Update ACL pin to 57132943e0df00aa008b90614ea5a9fa8b2dc18aTeresa Charlin
# Fix im2col for fast-maths mode with padding. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6140f5435b81598d29a30f1f6747fd59e2304101
2023-05-03Minor fixes to the build android ndk guide scriptNikhil Raj
* Aligns both sh script and md file * Change default branch to main as 'latest' release will change every 3 month * Clones github repos instead of mlplatform repos Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I4bed6c4c231b5f3bab0abf92b0febf825ddb4ce7
2023-05-03Fix bug in the build-armnn.sh in build toolNikhil Raj
* flag should be flag_tflite_classic_delegate instead of flag_tflite_delegate Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I4c1f6406d88ee91c032f8edcf1196f2e8e8bcb92
2023-05-03IVGCVSW-7528 Update Arm NN documentation to reflect use of Tensorflow 2.12Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ib3aaba6d2bbe52978fc3e8873c78e4c2989131ed
2023-05-03Update ACL pin to 60ab4e66ea3cb85042035fd1aafbfea666bb4ea7Teresa Charlin
* Fix export_to_cl_image issue in the fp16 GeMM implementation Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I07440e48243abb599a0bd9e6d96d8c3291e87e91
2023-05-02IVGCVSW-7404 Replacing asserts with exceptions in CopyTensorContentsGenericColm Donelan
* The source and destination size checks in CopyTensorContentsGeneric are handled by asserts instead of exceptions. * Adding unit tests. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Ia00c07158afde6768002dc6059067fd08e47fcff
2023-05-02IVGCVSW-7603 Implement Reshape operators for Opaque DelegateMatthew Sloyan
* Moved CreateOutputTensorShape function to common DelegateUtils.hpp Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I3d8a9834ecd6b7cda170cce958677a0dde62824a
2023-05-02Update ACL pin to f0ff76dbfc9137d0dfc5e99666e24c7a2ca8b072Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I5d8b9e38b50ee56e03c8421e4ddb9a02eade5d47
2023-05-02IVGCVSW-7536 Update Build Tool for Opaque DelegateNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Iaf3f1b5e4e41d0d946a21504c6d44e47d83273e0
2023-04-28IVGCVSW-7610 IVGCVSW-7616 Slice and StridedSlice for opaque delegateTeresa Charlin
* Change alignment in Shape.hpp Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ibc21cf5c56a1ba2daa7507a5d5c2b7311756f17f
2023-04-28IVGCVSW-7606 IVGCVSW-7607 Add Resize and Reduce to Opaque DelegateJohn Mcloughlin
* Added 2 opaque delegate operators and associated test cases * Removed IsDynamicTensor check from BatchMatMul as covered by IsValid. Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: If7c58cb23ae5c5b8a9451dddfd7b6dfcbf248d4c
2023-04-28IVGCVSW-7611 IVGCVSW-7614 IVGCVSW-7615 IVGCVSW-7617 Softmax, SpaceToDepth, ↵Teresa Charlin
DepthToSpace and Tranpose for opaque delegate Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ie0c608f94a76956e9be75f555824cef865cab395
2023-04-28IVGCVSW-7602 IVGCVSW-7602 Implement opaque delegate for Quantize + ↵Francis Murtagh
Dequantize operator Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I318cb25f526dfe0f7aa6afcf77971afd8d437209
2023-04-28IVGCVSW-7596 IVGCVSW-7619 IVGCVSW-7597 Pack, Unpack and Pad for opaque delegateTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I25415793497f0ee08d880539e265b133875a20f7
2023-04-28Update ACL pin to 99b6fd210d84511b5d746871b8510a482a2950b8Nikhil Raj
* Fix filelist issue with CPU MatMul Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Iaeaae6467df23b36e48fe6aa707d61c28515ad16
2023-04-28Make Convert workloads use arm_compute::NECast in CpuAcc backendMatthew Bentham
NECast can use conversion instructions where they are available so this should in general be faster. Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com> Change-Id: I3f259e17b280a4f4c36f363965ffbc8ee8c4c29f
2023-04-28IVGCVSW-7588 Implement ElementWiseBinary Op for Opaque DelegateDavid Monahan
* Added visit functions for ElementwiseBinary Ops * Moved MultiLayerFacade.hpp to common directory and updated both delegates to use it Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I84b8bd74d15a194895e63da47c29be994531a889
2023-04-28IVGCVSW-7608 IVGCVSW-7594 IVGCVSW-7598 IVGCVSW-7599 Implement Floor,Matthew Sloyan
Lstm, Pooling2d and Pooling3d operators for Opaque Delegate Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ic9af1c50589285ab359661699d32a889cd267cd9
2023-04-27IVGCVSW-7576 IVGCVSW-7609 Add BatchMatMul and Shape to Opaque DelegateJohn Mcloughlin
Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: Id4b02b951ed81c69171f6af2d0d327175c6e5d3c
2023-04-27IVGCVSW-7584 IVGCVSW-7585 Implement Conv3d and TransposeConv2d operators for ↵Francis Murtagh
opaque delegate * Add check for TF version so tests work with opaque and classic Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I3a6699150afabfc6200e1cd4d264a1f7c65c5f60
2023-04-27Add unit test for Neon Convert workloadsMatthew Bentham
Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com> Change-Id: I501a3e01932d44eca796e93a9383378dafc758c5
2023-04-27IVGCVSW-7589 IVGCVSW-7595 IVGCVSW-7593 ElementwiseUnary, Normalization and ↵Teresa Charlin
LogicalBinary operators for opaque delegate * Report the operator as part of the layer name for: - LogicalBinary, - ElementwiseUnary - Comparison - Activation * Fixing indentation in Gather.hpp * Removing not needed includes in Gather, GatherNd and Comparison * Correct end of namespace comment in Comparison * Correct log from TfLiteArmnnDelegate to TfLiteArmnnOpaqueDelegate Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ia0d497709309e912d31eb4b6db0fef9e79b7a3af
2023-04-27Update ACL pin to f16eed979ecaa234b308c8eb145c5f9512673a54Nikhil Raj
* Change fp16 GeMM heuristic for Arm® Mali™-G77 Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I7b39b20f9d428750e05333e5a8f4aec49353c5f9
2023-04-27IVGCVSW-7574 IVGCVSW-7590 IVGCVSW-7600 Implement Activation, FullyConnected ↵Matthew Sloyan
and Prelu operators for Opaque Delegate * Added missing headers to opaque/CMakeLists.txt (Control and Comparison) * Cleaned up Control.hpp headers. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I442edb9c467b515b130fbaf02879f0802006255f
2023-04-27IVGCVSW-7687 Update TF SHA in build-toolNikhil Raj
* Updating TF to the 2.12 SHA Arm NN will be using * Turn Off JNI build Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ib75e16687ac3a2dd4a77ed68f97bf14fdd86eec0
2023-04-27IVGCVSW-7591 IVGCVSW-7592 Add Gather and GatherNd to Opaque DelegateKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: Id2b6a4f70b1cb50e5f7f7ab4e30487b3816c9ad4
generated by cgit v1.2.1 (git 2.23.0) at 2024-05-16 13:42:12 +0000