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-rw-r--r--src/backends/reference/RefLayerSupport.cpp13
-rw-r--r--src/backends/reference/RefLayerSupport.hpp5
-rw-r--r--src/backends/reference/RefWorkloadFactory.cpp2
-rw-r--r--src/backends/reference/backend.mk2
-rw-r--r--src/backends/reference/test/RefLayerTests.cpp21
-rw-r--r--src/backends/reference/workloads/CMakeLists.txt4
-rw-r--r--src/backends/reference/workloads/RefSpaceToBatchNdWorkload.cpp34
-rw-r--r--src/backends/reference/workloads/RefSpaceToBatchNdWorkload.hpp33
-rw-r--r--src/backends/reference/workloads/RefWorkloads.hpp1
-rw-r--r--src/backends/reference/workloads/SpaceToBatchNd.cpp123
-rw-r--r--src/backends/reference/workloads/SpaceToBatchNd.hpp21
11 files changed, 258 insertions, 1 deletions
diff --git a/src/backends/reference/RefLayerSupport.cpp b/src/backends/reference/RefLayerSupport.cpp
index 629903ec2c..0902b0fd17 100644
--- a/src/backends/reference/RefLayerSupport.cpp
+++ b/src/backends/reference/RefLayerSupport.cpp
@@ -434,6 +434,19 @@ bool RefLayerSupport::IsSoftmaxSupported(const TensorInfo& input,
&TrueFunc<>);
}
+bool RefLayerSupport::IsSpaceToBatchNdSupported(const TensorInfo& input,
+ const TensorInfo& output,
+ const SpaceToBatchNdDescriptor& descriptor,
+ Optional<std::string&> reasonIfUnsupported) const
+{
+ ignore_unused(output);
+ ignore_unused(descriptor);
+ return IsSupportedForDataTypeRef(reasonIfUnsupported,
+ input.GetDataType(),
+ &TrueFunc<>,
+ &TrueFunc<>);
+}
+
bool RefLayerSupport::IsSplitterSupported(const TensorInfo& input,
const ViewsDescriptor& descriptor,
Optional<std::string&> reasonIfUnsupported) const
diff --git a/src/backends/reference/RefLayerSupport.hpp b/src/backends/reference/RefLayerSupport.hpp
index 0da59986a9..b161f5c7cf 100644
--- a/src/backends/reference/RefLayerSupport.hpp
+++ b/src/backends/reference/RefLayerSupport.hpp
@@ -159,6 +159,11 @@ public:
const SoftmaxDescriptor& descriptor,
Optional<std::string&> reasonIfUnsupported = EmptyOptional()) const override;
+ bool IsSpaceToBatchNdSupported(const TensorInfo& input,
+ const TensorInfo& output,
+ const SpaceToBatchNdDescriptor& descriptor,
+ Optional<std::string&> reasonIfUnsupported = EmptyOptional()) const override;
+
bool IsSplitterSupported(const TensorInfo& input,
const ViewsDescriptor& descriptor,
Optional<std::string&> reasonIfUnsupported = EmptyOptional()) const override;
diff --git a/src/backends/reference/RefWorkloadFactory.cpp b/src/backends/reference/RefWorkloadFactory.cpp
index 177c5edd4e..a238d5f545 100644
--- a/src/backends/reference/RefWorkloadFactory.cpp
+++ b/src/backends/reference/RefWorkloadFactory.cpp
@@ -217,7 +217,7 @@ std::unique_ptr<IWorkload> RefWorkloadFactory::CreateReshape(const ReshapeQueueD
std::unique_ptr<IWorkload> RefWorkloadFactory::CreateSpaceToBatchNd(const SpaceToBatchNdQueueDescriptor& descriptor,
const WorkloadInfo& info) const
{
- return MakeWorkload<NullWorkload, NullWorkload>(descriptor, info);
+ return MakeWorkload<RefSpaceToBatchNdFloat32Workload, RefSpaceToBatchNdUint8Workload>(descriptor, info);
}
std::unique_ptr<IWorkload> RefWorkloadFactory::CreateFloor(const FloorQueueDescriptor& descriptor,
diff --git a/src/backends/reference/backend.mk b/src/backends/reference/backend.mk
index 007efceb9b..cc8c24f394 100644
--- a/src/backends/reference/backend.mk
+++ b/src/backends/reference/backend.mk
@@ -54,9 +54,11 @@ BACKEND_SOURCES := \
workloads/RefResizeBilinearUint8Workload.cpp \
workloads/RefSoftmaxFloat32Workload.cpp \
workloads/RefSoftmaxUint8Workload.cpp \
+ workloads/RefSpaceToBatchNdWorkload.cpp \
workloads/RefSplitterFloat32Workload.cpp \
workloads/RefSplitterUint8Workload.cpp \
workloads/ResizeBilinear.cpp \
+ workloads/SpaceToBatchNd.cpp \
workloads/Softmax.cpp
# BACKEND_TEST_SOURCES contains the list of files to be included
diff --git a/src/backends/reference/test/RefLayerTests.cpp b/src/backends/reference/test/RefLayerTests.cpp
index e79953fe65..df0e37866d 100644
--- a/src/backends/reference/test/RefLayerTests.cpp
+++ b/src/backends/reference/test/RefLayerTests.cpp
@@ -355,4 +355,25 @@ ARMNN_AUTO_TEST_CASE(MeanVtsFloat3, MeanVtsFloat3Test)
ARMNN_AUTO_TEST_CASE(AdditionAfterMaxPool, AdditionAfterMaxPoolTest)
+// Space To Batch Nd
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdSimpleFloat32, SpaceToBatchNdSimpleFloat32Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiChannelsFloat32, SpaceToBatchNdMultiChannelsFloat32Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiBlockFloat32, SpaceToBatchNdMultiBlockFloat32Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdPaddingFloat32, SpaceToBatchNdPaddingFloat32Test)
+
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdSimpleUint8, SpaceToBatchNdSimpleUint8Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiChannelsUint8, SpaceToBatchNdMultiChannelsUint8Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiBlockUint8, SpaceToBatchNdMultiBlockUint8Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdPaddingUint8, SpaceToBatchNdPaddingUint8Test)
+
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdSimpleNHWCFloat32, SpaceToBatchNdSimpleNHWCFloat32Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiChannelsNHWCFloat32, SpaceToBatchNdMultiChannelsNHWCFloat32Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiBlockNHWCFloat32, SpaceToBatchNdMultiBlockNHWCFloat32Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdPaddingNHWCFloat32, SpaceToBatchNdPaddingNHWCFloat32Test)
+
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdSimpleNHWCUint8, SpaceToBatchNdSimpleNHWCUint8Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiChannelsNHWCUint8, SpaceToBatchNdMultiChannelsNHWCUint8Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiBlockNHWCUint8, SpaceToBatchNdMultiBlockNHWCUint8Test)
+ARMNN_AUTO_TEST_CASE(SpaceToBatchNdPaddingNHWCUint8, SpaceToBatchNdPaddingNHWCUint8Test)
+
BOOST_AUTO_TEST_SUITE_END()
diff --git a/src/backends/reference/workloads/CMakeLists.txt b/src/backends/reference/workloads/CMakeLists.txt
index 7dc72891c7..4cef2d0771 100644
--- a/src/backends/reference/workloads/CMakeLists.txt
+++ b/src/backends/reference/workloads/CMakeLists.txt
@@ -86,6 +86,8 @@ list(APPEND armnnRefBackendWorkloads_sources
RefSoftmaxFloat32Workload.hpp
RefSoftmaxUint8Workload.cpp
RefSoftmaxUint8Workload.hpp
+ RefSpaceToBatchNdWorkload.cpp
+ RefSpaceToBatchNdWorkload.hpp
RefSplitterFloat32Workload.cpp
RefSplitterFloat32Workload.hpp
RefSplitterUint8Workload.cpp
@@ -96,6 +98,8 @@ list(APPEND armnnRefBackendWorkloads_sources
ResizeBilinear.hpp
Softmax.cpp
Softmax.hpp
+ SpaceToBatchNd.hpp
+ SpaceToBatchNd.cpp
Splitter.hpp
TensorBufferArrayView.hpp
Mean.cpp
diff --git a/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.cpp b/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.cpp
new file mode 100644
index 0000000000..fb98118536
--- /dev/null
+++ b/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.cpp
@@ -0,0 +1,34 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "RefSpaceToBatchNdWorkload.hpp"
+#include "SpaceToBatchNd.hpp"
+
+#include "RefWorkloadUtils.hpp"
+#include "TypeUtils.hpp"
+
+namespace armnn
+{
+
+template<armnn::DataType DataType>
+void RefSpaceToBatchNdWorkload<DataType>::Execute() const
+{
+ using T = ResolveType<DataType>;
+
+ ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, GetName() + "_Execute");
+
+ const TensorInfo& inputInfo = GetTensorInfo(m_Data.m_Inputs[0]);
+ const TensorInfo& outputInfo = GetTensorInfo(m_Data.m_Outputs[0]);
+
+ const T* inputData = GetInputTensorData<T>(0, m_Data);
+ T* outputData = GetOutputTensorData<T>(0, m_Data);
+
+ SpaceToBatchNd(inputInfo, outputInfo, m_Data.m_Parameters, inputData, outputData);
+}
+
+template class RefSpaceToBatchNdWorkload<DataType::Float32>;
+template class RefSpaceToBatchNdWorkload<DataType::QuantisedAsymm8>;
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.hpp b/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.hpp
new file mode 100644
index 0000000000..3a08662ff7
--- /dev/null
+++ b/src/backends/reference/workloads/RefSpaceToBatchNdWorkload.hpp
@@ -0,0 +1,33 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+#pragma once
+
+#include "backendsCommon/Workload.hpp"
+
+#include <armnn/TypesUtils.hpp>
+
+namespace armnn
+{
+
+template <armnn::DataType DataType>
+class RefSpaceToBatchNdWorkload : public TypedWorkload<SpaceToBatchNdQueueDescriptor, DataType>
+{
+public:
+ static const std::string& GetName()
+ {
+ static const std::string name = std::string("RefSpaceToBatchNd") + GetDataTypeName(DataType) + "Workload";
+ return name;
+ }
+
+ using TypedWorkload<SpaceToBatchNdQueueDescriptor, DataType>::m_Data;
+ using TypedWorkload<SpaceToBatchNdQueueDescriptor, DataType>::TypedWorkload;
+
+ void Execute() const override;
+};
+
+using RefSpaceToBatchNdFloat32Workload = RefSpaceToBatchNdWorkload<DataType::Float32>;
+using RefSpaceToBatchNdUint8Workload = RefSpaceToBatchNdWorkload<DataType::QuantisedAsymm8>;
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/RefWorkloads.hpp b/src/backends/reference/workloads/RefWorkloads.hpp
index 14e6699a73..03907a6b91 100644
--- a/src/backends/reference/workloads/RefWorkloads.hpp
+++ b/src/backends/reference/workloads/RefWorkloads.hpp
@@ -41,6 +41,7 @@
#include "BatchNormImpl.hpp"
#include "Activation.hpp"
#include "Merger.hpp"
+#include "RefSpaceToBatchNdWorkload.hpp"
#include "RefSplitterFloat32Workload.hpp"
#include "RefConstantFloat32Workload.hpp"
#include "RefActivationFloat32Workload.hpp"
diff --git a/src/backends/reference/workloads/SpaceToBatchNd.cpp b/src/backends/reference/workloads/SpaceToBatchNd.cpp
new file mode 100644
index 0000000000..48c212764f
--- /dev/null
+++ b/src/backends/reference/workloads/SpaceToBatchNd.cpp
@@ -0,0 +1,123 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "SpaceToBatchNd.hpp"
+
+namespace armnn
+{
+
+unsigned int GetOffset(const TensorShape& shape,
+ unsigned int b,
+ unsigned int h,
+ unsigned int w,
+ unsigned int c,
+ const DataLayoutIndexed& dataLayout)
+{
+ if (dataLayout.GetDataLayout() == DataLayout::NHWC)
+ {
+ return ((b * shape[dataLayout.GetHeightIndex()] + h) * shape[dataLayout.GetWidthIndex()] + w) *
+ shape[dataLayout.GetChannelsIndex()] + c;
+ }
+ else
+ {
+ return ((b * shape[dataLayout.GetChannelsIndex()] + c) * shape[dataLayout.GetHeightIndex()] + h) *
+ shape[dataLayout.GetWidthIndex()] + w;
+ }
+}
+
+template<typename T>
+void SpaceToBatchNd(const TensorInfo& inputInfo,
+ const TensorInfo& outputInfo,
+ const SpaceToBatchNdDescriptor& params,
+ const T* inputData,
+ T* outputData)
+{
+ DataLayoutIndexed dataLayout = params.m_DataLayout;
+
+ const TensorShape& inputShape = inputInfo.GetShape();
+ const TensorShape& outputShape = outputInfo.GetShape();
+
+ const unsigned int channels = inputShape[dataLayout.GetChannelsIndex()];
+
+ const unsigned int inputBatchSize = inputShape[0];
+ const unsigned int inputHeight = inputShape[dataLayout.GetHeightIndex()];
+ const unsigned int inputWidth = inputShape[dataLayout.GetWidthIndex()];
+
+ const unsigned int outputBatchSize = outputShape[0];
+ const unsigned int outputHeight = outputShape[dataLayout.GetHeightIndex()];
+ const unsigned int outputWidth = outputShape[dataLayout.GetWidthIndex()];
+
+ const unsigned int blockHeight = params.m_BlockShape[0];
+ const unsigned int blockWidth = params.m_BlockShape[1];
+
+ const unsigned int paddingTop = params.m_PadList[0].first;
+ const unsigned int paddingLeft = params.m_PadList[1].first;
+
+ for (unsigned int outB = 0; outB < outputBatchSize; outB++)
+ {
+ unsigned int inB = outB % inputBatchSize;
+
+ unsigned int shiftW = (outB / inputBatchSize) % blockWidth;
+ unsigned int shiftH = (outB / inputBatchSize) / blockWidth;
+
+ for (unsigned int outH = 0; outH < outputHeight; outH++)
+ {
+ for (unsigned int outW = 0; outW < outputWidth; outW++)
+ {
+ if (outH * blockHeight + shiftH < paddingTop ||
+ outH * blockHeight + shiftH >= paddingTop + inputHeight ||
+ outW * blockWidth + shiftW < paddingLeft ||
+ outW * blockWidth + shiftW >= paddingLeft + inputWidth)
+ {
+ for (unsigned int c = 0; c < channels; c++)
+ {
+ unsigned int outOffset = GetOffset(outputShape,
+ outB,
+ outH,
+ outW,
+ c,
+ dataLayout);
+ outputData[outOffset] = 0;
+ }
+ }
+ else
+ {
+ for (unsigned int c = 0; c < channels; c++)
+ {
+ unsigned int inOffset = GetOffset(inputShape,
+ inB,
+ (outH * blockHeight + shiftH) - paddingTop,
+ (outW * blockWidth + shiftW) - paddingLeft,
+ c,
+ dataLayout);
+
+ unsigned int outOffset = GetOffset(outputShape,
+ outB,
+ outH,
+ outW,
+ c,
+ dataLayout);
+
+ outputData[outOffset] = inputData[inOffset];
+ }
+ }
+ }
+ }
+ }
+}
+
+template void SpaceToBatchNd<float>(const TensorInfo& inputInfo,
+ const TensorInfo& outputInfo,
+ const SpaceToBatchNdDescriptor& params,
+ const float* inputData,
+ float* outData);
+
+template void SpaceToBatchNd<uint8_t>(const TensorInfo& inputInfo,
+ const TensorInfo& outputInfo,
+ const SpaceToBatchNdDescriptor& params,
+ const uint8_t* inputData,
+ uint8_t* outData);
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/SpaceToBatchNd.hpp b/src/backends/reference/workloads/SpaceToBatchNd.hpp
new file mode 100644
index 0000000000..e74e457a72
--- /dev/null
+++ b/src/backends/reference/workloads/SpaceToBatchNd.hpp
@@ -0,0 +1,21 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <armnn/Descriptors.hpp>
+#include "armnn/Tensor.hpp"
+
+namespace armnn
+{
+
+template <typename T>
+void SpaceToBatchNd(const TensorInfo& inputInfo,
+ const TensorInfo& outputInfo,
+ const SpaceToBatchNdDescriptor& params,
+ const T* inputData,
+ T* outputData);
+
+} //namespace armnn
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-08 08:52:11 +0000