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Diffstat (limited to 'src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp')
| -rw-r--r-- | src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp b/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp new file mode 100644 index 0000000000..199e926142 --- /dev/null +++ b/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp @@ -0,0 +1,83 @@ +// +// Copyright © 2020 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "NeonSpaceToBatchNdWorkload.hpp" + +#include "NeonWorkloadUtils.hpp" +#include <ResolveType.hpp> + +namespace armnn +{ + +using namespace armcomputetensorutils; + +arm_compute::Status NeonSpaceToBatchNdWorkloadValidate(const TensorInfo& input, + const TensorInfo& output, + const SpaceToBatchNdDescriptor& descriptor) +{ + const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout); + const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout); + + // ArmNN blockShape is [H, W] Cl asks for W, H + int32_t blockHeight = boost::numeric_cast<int32_t>(descriptor.m_BlockShape[0]); + int32_t blockWidth = boost::numeric_cast<int32_t>(descriptor.m_BlockShape[1]); + + arm_compute::Size2D paddingLeftTop = BuildArmComputeSize2D( + descriptor.m_PadList[1].first, descriptor.m_PadList[0].first); + arm_compute::Size2D paddingRightBottom = BuildArmComputeSize2D( + descriptor.m_PadList[1].second, descriptor.m_PadList[0].second); + + return arm_compute::NESpaceToBatchLayer::validate(&aclInputInfo, + blockWidth, + blockHeight, + paddingLeftTop, + paddingRightBottom, + &aclOutputInfo); +} + +NeonSpaceToBatchNdWorkload::NeonSpaceToBatchNdWorkload(const SpaceToBatchNdQueueDescriptor& desc, + const WorkloadInfo& info) + : BaseWorkload<SpaceToBatchNdQueueDescriptor>(desc, info) +{ + m_Data.ValidateInputsOutputs("NESpaceToBatchNdWorkload", 1, 1); + + arm_compute::ITensor& input = + boost::polymorphic_pointer_downcast<IAclTensorHandle>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ITensor& output = + boost::polymorphic_pointer_downcast<IAclTensorHandle>(m_Data.m_Outputs[0])->GetTensor(); + + // ArmNN blockShape is [H, W] Cl asks for W, H + int32_t blockHeight = boost::numeric_cast<int32_t>(m_Data.m_Parameters.m_BlockShape[0]); + int32_t blockWidth = boost::numeric_cast<int32_t>(m_Data.m_Parameters.m_BlockShape[1]); + + arm_compute::Size2D paddingLeftTop = BuildArmComputeSize2D( + m_Data.m_Parameters.m_PadList[1].first, m_Data.m_Parameters.m_PadList[0].first); + arm_compute::Size2D paddingRightBottom = BuildArmComputeSize2D( + m_Data.m_Parameters.m_PadList[1].second, m_Data.m_Parameters.m_PadList[0].second); + + arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout); + input.info()->set_data_layout(aclDataLayout); + output.info()->set_data_layout(aclDataLayout); + + m_Layer.reset(new arm_compute::NESpaceToBatchLayer()); + m_Layer->configure(&input, + blockWidth, + blockHeight, + paddingLeftTop, + paddingRightBottom, + &output); + m_Layer->prepare(); +} + +void NeonSpaceToBatchNdWorkload::Execute() const +{ + if (m_Layer) + { + ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonSpaceToBatchNdWorkload_Execute"); + m_Layer->run(); + } +} + +} //namespace armnn
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