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-rw-r--r--src/backends/backendsCommon/WorkloadData.cpp32
-rwxr-xr-xsrc/backends/backendsCommon/test/LayerTests.cpp81
-rw-r--r--src/backends/backendsCommon/test/LayerTests.hpp20
-rw-r--r--src/backends/backendsCommon/test/SpaceToBatchNdTestImpl.hpp243
4 files changed, 363 insertions, 13 deletions
diff --git a/src/backends/backendsCommon/WorkloadData.cpp b/src/backends/backendsCommon/WorkloadData.cpp
index 62cbd05c13..7c02947b32 100644
--- a/src/backends/backendsCommon/WorkloadData.cpp
+++ b/src/backends/backendsCommon/WorkloadData.cpp
@@ -749,21 +749,14 @@ void SpaceToBatchNdQueueDescriptor::Validate(const WorkloadInfo& workloadInfo) c
ValidateTensorNumDimensions(workloadInfo.m_InputTensorInfos[0], "SpaceToBatchNdQueueDescriptor", 4, "input");
ValidateTensorNumDimensions(workloadInfo.m_OutputTensorInfos[0], "SpaceToBatchNdQueueDescriptor", 4, "output");
- if (workloadInfo.m_InputTensorInfos[0].GetNumElements() != workloadInfo.m_OutputTensorInfos[0].GetNumElements())
- {
- throw InvalidArgumentException("SpaceToBatchNdQueueDescriptor: Input tensor has " +
- to_string(workloadInfo.m_InputTensorInfos[0].GetNumElements()) + " but output tensor has " +
- to_string(workloadInfo.m_OutputTensorInfos[0].GetNumElements()) + " elements.");
- }
-
if (m_Parameters.m_BlockShape.size() != 2)
{
- throw InvalidArgumentException("Block Shape must contains 2 spatial dimensions");
+ throw InvalidArgumentException("Block Shape must contain 2 spatial dimensions");
}
if (m_Parameters.m_BlockShape.size() != m_Parameters.m_PadList.size())
{
- throw InvalidArgumentException("Pad List must contains the same number of dimensions as Block Shape.");
+ throw InvalidArgumentException("Pad List must contain the same number of dimensions as Block Shape.");
}
const TensorShape inputShape = workloadInfo.m_InputTensorInfos[0].GetShape();
@@ -771,10 +764,23 @@ void SpaceToBatchNdQueueDescriptor::Validate(const WorkloadInfo& workloadInfo) c
std::pair<unsigned int, unsigned int> heightPad = m_Parameters.m_PadList[0];
std::pair<unsigned int, unsigned int> widthPad = m_Parameters.m_PadList[1];
- if ((inputShape[m_Parameters.m_DataLayout.GetHeightIndex()] + heightPad.first + heightPad.second)
- % m_Parameters.m_BlockShape[0] != 0 ||
- (inputShape[m_Parameters.m_DataLayout.GetWidthIndex()] + widthPad.first + widthPad.second)
- % m_Parameters.m_BlockShape[1] != 0)
+ unsigned int inputHeight = inputShape[m_Parameters.m_DataLayout.GetHeightIndex()]
+ + heightPad.first + heightPad.second;
+
+ unsigned int inputWidth = inputShape[m_Parameters.m_DataLayout.GetWidthIndex()]
+ + widthPad.first + widthPad.second;
+
+ unsigned int numInputElements = inputShape[0] * inputHeight * inputWidth
+ * inputShape[m_Parameters.m_DataLayout.GetChannelsIndex()];
+
+ if (workloadInfo.m_OutputTensorInfos[0].GetNumElements() != numInputElements)
+ {
+ throw InvalidArgumentException("SpaceToBatchNdQueueDescriptor: Input tensor has " +
+ to_string(numInputElements) + " after padding but output tensor has " +
+ to_string(workloadInfo.m_OutputTensorInfos[0].GetNumElements()) + " elements.");
+ }
+
+ if (inputHeight % m_Parameters.m_BlockShape[0] != 0 || inputWidth % m_Parameters.m_BlockShape[1] != 0)
{
throw InvalidArgumentException(
"Input shape after padding must be divisible by Block Shape in all spatial dimensions");
diff --git a/src/backends/backendsCommon/test/LayerTests.cpp b/src/backends/backendsCommon/test/LayerTests.cpp
index 6b5fa726b8..cdc989fe6d 100755
--- a/src/backends/backendsCommon/test/LayerTests.cpp
+++ b/src/backends/backendsCommon/test/LayerTests.cpp
@@ -26,6 +26,7 @@
#include "Pooling2dTestImpl.hpp"
#include "ReshapeTestImpl.hpp"
#include "FullyConnectedTestImpl.hpp"
+#include "SpaceToBatchNdTestImpl.hpp"
#include "SplitterTestImpl.hpp"
#include "SoftmaxTestImpl.hpp"
#include "NormTestImpl.hpp"
@@ -6088,3 +6089,83 @@ LayerTestResult<float, 4> AdditionAfterMaxPoolTest(armnn::IWorkloadFactory& work
return addRet;
}
+
+LayerTestResult<float, 4> SpaceToBatchNdSimpleFloat32Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdSimpleTest<float>(workloadFactory);
+}
+
+LayerTestResult<float, 4> SpaceToBatchNdMultiChannelsFloat32Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdMultiChannelsTest<float>(workloadFactory);
+}
+
+LayerTestResult<float, 4> SpaceToBatchNdMultiBlockFloat32Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdMultiBlockTest<float>(workloadFactory);
+}
+
+LayerTestResult<float, 4> SpaceToBatchNdPaddingFloat32Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdPaddingTest<float>(workloadFactory);
+}
+
+LayerTestResult<uint8_t, 4> SpaceToBatchNdSimpleUint8Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdSimpleTest<uint8_t>(workloadFactory);
+}
+
+LayerTestResult<uint8_t, 4> SpaceToBatchNdMultiChannelsUint8Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdMultiChannelsTest<uint8_t>(workloadFactory);
+}
+
+LayerTestResult<uint8_t, 4> SpaceToBatchNdMultiBlockUint8Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdMultiBlockTest<uint8_t>(workloadFactory);
+}
+
+LayerTestResult<uint8_t, 4> SpaceToBatchNdPaddingUint8Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdPaddingTest<uint8_t>(workloadFactory);
+}
+
+LayerTestResult<float, 4> SpaceToBatchNdSimpleNHWCFloat32Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdSimpleNHWCTest<float>(workloadFactory);
+}
+
+LayerTestResult<float, 4> SpaceToBatchNdMultiChannelsNHWCFloat32Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdMultiChannelsNHWCTest<float>(workloadFactory);
+}
+
+LayerTestResult<float, 4> SpaceToBatchNdMultiBlockNHWCFloat32Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdMultiBlockNHWCTest<float>(workloadFactory);
+}
+
+LayerTestResult<float, 4> SpaceToBatchNdPaddingNHWCFloat32Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdPaddingNHWCTest<float>(workloadFactory);
+}
+
+LayerTestResult<uint8_t, 4> SpaceToBatchNdSimpleNHWCUint8Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdSimpleNHWCTest<uint8_t>(workloadFactory);
+}
+
+LayerTestResult<uint8_t, 4> SpaceToBatchNdMultiChannelsNHWCUint8Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdMultiChannelsNHWCTest<uint8_t>(workloadFactory);
+}
+
+LayerTestResult<uint8_t, 4> SpaceToBatchNdMultiBlockNHWCUint8Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdMultiBlockNHWCTest<uint8_t>(workloadFactory);
+}
+
+LayerTestResult<uint8_t, 4> SpaceToBatchNdPaddingNHWCUint8Test(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdPaddingNHWCTest<uint8_t>(workloadFactory);
+}
diff --git a/src/backends/backendsCommon/test/LayerTests.hpp b/src/backends/backendsCommon/test/LayerTests.hpp
index 57383d3276..66032c8f2a 100644
--- a/src/backends/backendsCommon/test/LayerTests.hpp
+++ b/src/backends/backendsCommon/test/LayerTests.hpp
@@ -414,3 +414,23 @@ LayerTestResult<float, 3> MeanVtsFloat2Test(armnn::IWorkloadFactory& workloadFac
LayerTestResult<float, 3> MeanVtsFloat3Test(armnn::IWorkloadFactory& workloadFactory);
LayerTestResult<float, 4> AdditionAfterMaxPoolTest(armnn::IWorkloadFactory& workloadFactory);
+
+LayerTestResult<float, 4> SpaceToBatchNdSimpleFloat32Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<float, 4> SpaceToBatchNdMultiChannelsFloat32Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<float, 4> SpaceToBatchNdMultiBlockFloat32Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<float, 4> SpaceToBatchNdPaddingFloat32Test(armnn::IWorkloadFactory& workloadFactory);
+
+LayerTestResult<uint8_t, 4> SpaceToBatchNdSimpleUint8Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<uint8_t, 4> SpaceToBatchNdMultiChannelsUint8Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<uint8_t, 4> SpaceToBatchNdMultiBlockUint8Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<uint8_t, 4> SpaceToBatchNdPaddingUint8Test(armnn::IWorkloadFactory& workloadFactory);
+
+LayerTestResult<float, 4> SpaceToBatchNdSimpleNHWCFloat32Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<float, 4> SpaceToBatchNdMultiChannelsNHWCFloat32Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<float, 4> SpaceToBatchNdMultiBlockNHWCFloat32Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<float, 4> SpaceToBatchNdPaddingNHWCFloat32Test(armnn::IWorkloadFactory& workloadFactory);
+
+LayerTestResult<uint8_t, 4> SpaceToBatchNdSimpleNHWCUint8Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<uint8_t, 4> SpaceToBatchNdMultiChannelsNHWCUint8Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<uint8_t, 4> SpaceToBatchNdMultiBlockNHWCUint8Test(armnn::IWorkloadFactory& workloadFactory);
+LayerTestResult<uint8_t, 4> SpaceToBatchNdPaddingNHWCUint8Test(armnn::IWorkloadFactory& workloadFactory);
diff --git a/src/backends/backendsCommon/test/SpaceToBatchNdTestImpl.hpp b/src/backends/backendsCommon/test/SpaceToBatchNdTestImpl.hpp
new file mode 100644
index 0000000000..5dd21bf3c6
--- /dev/null
+++ b/src/backends/backendsCommon/test/SpaceToBatchNdTestImpl.hpp
@@ -0,0 +1,243 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+#pragma once
+
+#include <armnn/ArmNN.hpp>
+#include <armnn/Tensor.hpp>
+#include <armnn/TypesUtils.hpp>
+
+#include <backendsCommon/CpuTensorHandle.hpp>
+#include <backendsCommon/WorkloadFactory.hpp>
+
+#include <test/TensorHelpers.hpp>
+
+template<typename T>
+LayerTestResult<T, 4> SpaceToBatchNdTestImpl(
+ const armnn::IWorkloadFactory& workloadFactory,
+ armnn::TensorInfo& inputTensorInfo,
+ armnn::TensorInfo& outputTensorInfo,
+ std::vector<float>& inputData,
+ std::vector<float>& outputExpectedData,
+ armnn::SpaceToBatchNdQueueDescriptor descriptor,
+ const float qScale = 1.0f,
+ const int32_t qOffset = 0)
+{
+ const armnn::PermutationVector NCHWToNHWC = {0, 3, 1, 2};
+ if (descriptor.m_Parameters.m_DataLayout == armnn::DataLayout::NHWC)
+ {
+ inputTensorInfo = armnnUtils::Permuted(inputTensorInfo, NCHWToNHWC);
+ outputTensorInfo = armnnUtils::Permuted(outputTensorInfo, NCHWToNHWC);
+
+ std::vector<float> inputTmp(inputData.size());
+ armnnUtils::Permute(inputTensorInfo.GetShape(), NCHWToNHWC, inputData.data(), inputTmp.data());
+ inputData = inputTmp;
+
+ std::vector<float> outputTmp(outputExpectedData.size());
+ armnnUtils::Permute(outputTensorInfo.GetShape(), NCHWToNHWC, outputExpectedData.data(), outputTmp.data());
+ outputExpectedData = outputTmp;
+ }
+
+ if(armnn::IsQuantizedType<T>())
+ {
+ inputTensorInfo.SetQuantizationScale(qScale);
+ inputTensorInfo.SetQuantizationOffset(qOffset);
+ outputTensorInfo.SetQuantizationScale(qScale);
+ outputTensorInfo.SetQuantizationOffset(qOffset);
+ }
+
+ boost::multi_array<T, 4> input = MakeTensor<T, 4>(inputTensorInfo, QuantizedVector<T>(qScale, qOffset, inputData));
+
+ LayerTestResult<T, 4> ret(outputTensorInfo);
+ ret.outputExpected = MakeTensor<T, 4>(outputTensorInfo, QuantizedVector<T>(qScale, qOffset, outputExpectedData));
+
+ std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.CreateTensorHandle(inputTensorInfo);
+ std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.CreateTensorHandle(outputTensorInfo);
+
+ armnn::WorkloadInfo info;
+ AddInputToWorkload(descriptor, info, inputTensorInfo, inputHandle.get());
+ AddOutputToWorkload(descriptor, info, outputTensorInfo, outputHandle.get());
+
+ std::unique_ptr<armnn::IWorkload> workload = workloadFactory.CreateSpaceToBatchNd(descriptor, info);
+
+ inputHandle->Allocate();
+ outputHandle->Allocate();
+
+ CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
+
+ workload->Execute();
+
+ CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
+
+ return ret;
+}
+
+template <typename T>
+LayerTestResult<T, 4> SpaceToBatchNdSimpleTest(armnn::IWorkloadFactory& workloadFactory,
+ armnn::DataLayout dataLayout = armnn::DataLayout::NCHW)
+{
+ armnn::TensorInfo inputTensorInfo;
+ armnn::TensorInfo outputTensorInfo;
+
+ unsigned int inputShape[] = {1, 1, 2, 2};
+ unsigned int outputShape[] = {4, 1, 1, 1};
+
+ armnn::SpaceToBatchNdQueueDescriptor desc;
+ desc.m_Parameters.m_DataLayout = dataLayout;
+ desc.m_Parameters.m_BlockShape = {2, 2};
+ desc.m_Parameters.m_PadList = {{0, 0}, {0, 0}};
+
+ inputTensorInfo = armnn::TensorInfo(4, inputShape, armnn::GetDataType<T>());
+ outputTensorInfo = armnn::TensorInfo(4, outputShape, armnn::GetDataType<T>());
+
+ std::vector<float> input = std::vector<float>(
+ {
+ 1.0f, 2.0f, 3.0f, 4.0f
+ });
+
+ std::vector<float> outputExpected = std::vector<float>(
+ {
+ 1.0f, 2.0f, 3.0f, 4.0f
+ });
+
+ return SpaceToBatchNdTestImpl<T>(workloadFactory, inputTensorInfo, outputTensorInfo, input, outputExpected, desc);
+}
+
+template <typename T>
+LayerTestResult<T, 4> SpaceToBatchNdMultiChannelsTest(armnn::IWorkloadFactory& workloadFactory,
+ armnn::DataLayout dataLayout = armnn::DataLayout::NCHW)
+{
+ armnn::TensorInfo inputTensorInfo;
+ armnn::TensorInfo outputTensorInfo;
+
+ unsigned int inputShape[] = {1, 3, 2, 2};
+ unsigned int outputShape[] = {4, 3, 1, 1};
+
+ armnn::SpaceToBatchNdQueueDescriptor desc;
+ desc.m_Parameters.m_DataLayout = dataLayout;
+ desc.m_Parameters.m_BlockShape = {2, 2};
+ desc.m_Parameters.m_PadList = {{0, 0}, {0, 0}};
+
+ inputTensorInfo = armnn::TensorInfo(4, inputShape, armnn::GetDataType<T>());
+ outputTensorInfo = armnn::TensorInfo(4, outputShape, armnn::GetDataType<T>());
+
+ std::vector<float> input = std::vector<float>(
+ {
+ 1.0f, 4.0f, 7.0f, 10.0f,
+ 2.0f, 5.0, 8.0, 11.0f,
+ 3.0f, 6.0f, 9.0f, 12.0f
+ });
+
+ std::vector<float> outputExpected = std::vector<float>(
+ {
+ 1.0f, 2.0f, 3.0f,
+ 4.0f, 5.0f, 6.0f,
+ 7.0f, 8.0f, 9.0f,
+ 10.0f, 11.0f, 12.0f
+ });
+
+ return SpaceToBatchNdTestImpl<T>(workloadFactory, inputTensorInfo, outputTensorInfo, input, outputExpected, desc);
+}
+
+template <typename T>
+LayerTestResult<T, 4> SpaceToBatchNdMultiBlockTest(armnn::IWorkloadFactory& workloadFactory,
+ armnn::DataLayout dataLayout = armnn::DataLayout::NCHW)
+{
+ armnn::TensorInfo inputTensorInfo;
+ armnn::TensorInfo outputTensorInfo;
+
+ unsigned int inputShape[] = {1, 1, 4, 4};
+ unsigned int outputShape[] = {4, 1, 2, 2};
+
+ armnn::SpaceToBatchNdQueueDescriptor desc;
+ desc.m_Parameters.m_DataLayout = dataLayout;
+ desc.m_Parameters.m_BlockShape = {2, 2};
+ desc.m_Parameters.m_PadList = {{0, 0}, {0, 0}};
+
+ inputTensorInfo = armnn::TensorInfo(4, inputShape, armnn::GetDataType<T>());
+ outputTensorInfo = armnn::TensorInfo(4, outputShape, armnn::GetDataType<T>());
+
+ std::vector<float> input = std::vector<float>(
+ {
+ 1.0f, 2.0f, 3.0f, 4.0f,
+ 5.0f, 6.0f, 7.0f, 8.0f,
+ 9.0f, 10.0f, 11.0f, 12.0f,
+ 13.0f, 14.0f, 15.0f, 16.0f
+ });
+
+ std::vector<float> outputExpected = std::vector<float>(
+ {
+ 1.0f, 3.0f, 9.0f, 11.0f,
+ 2.0f, 4.0f, 10.0f, 12.0f,
+ 5.0f, 7.0f, 13.0f, 15.0f,
+ 6.0f, 8.0f, 14.0f, 16.0f
+ });
+
+ return SpaceToBatchNdTestImpl<T>(workloadFactory, inputTensorInfo, outputTensorInfo, input, outputExpected, desc);
+}
+
+template <typename T>
+LayerTestResult<T, 4> SpaceToBatchNdPaddingTest(armnn::IWorkloadFactory& workloadFactory,
+ armnn::DataLayout dataLayout = armnn::DataLayout::NCHW)
+{
+ armnn::TensorInfo inputTensorInfo;
+ armnn::TensorInfo outputTensorInfo;
+
+ unsigned int inputShape[] = {2, 1, 2, 4};
+ unsigned int outputShape[] = {8, 1, 1, 3};
+
+ armnn::SpaceToBatchNdQueueDescriptor desc;
+ desc.m_Parameters.m_DataLayout = dataLayout;
+ desc.m_Parameters.m_BlockShape = {2, 2};
+ desc.m_Parameters.m_PadList = {{0, 0}, {2, 0}};
+
+ inputTensorInfo = armnn::TensorInfo(4, inputShape, armnn::GetDataType<T>());
+ outputTensorInfo = armnn::TensorInfo(4, outputShape, armnn::GetDataType<T>());
+
+ std::vector<float> input = std::vector<float>(
+ {
+ 1.0f, 2.0f, 3.0f, 4.0f,
+ 5.0f, 6.0f, 7.0f, 8.0f,
+ 9.0f, 10.0f, 11.0f, 12.0f,
+ 13.0f, 14.0f, 15.0f, 16.0f
+ });
+
+ std::vector<float> outputExpected = std::vector<float>(
+ {
+ 0.0f, 1.0f, 3.0f,
+ 0.0f, 9.0f, 11.0f,
+ 0.0f, 2.0f, 4.0f,
+ 0.0f, 10.0f, 12.0f,
+ 0.0f, 5.0f, 7.0f,
+ 0.0f, 13.0f, 15.0f,
+ 0.0f, 6.0f, 8.0f,
+ 0.0f, 14.0f, 16.0f
+ });
+
+ return SpaceToBatchNdTestImpl<T>(workloadFactory, inputTensorInfo, outputTensorInfo, input, outputExpected, desc);
+}
+
+template <typename T>
+LayerTestResult<T, 4> SpaceToBatchNdSimpleNHWCTest(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdSimpleTest<T>(workloadFactory, armnn::DataLayout::NHWC);
+}
+
+template <typename T>
+LayerTestResult<T, 4> SpaceToBatchNdMultiChannelsNHWCTest(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdMultiChannelsTest<T>(workloadFactory, armnn::DataLayout::NHWC);
+}
+
+template <typename T>
+LayerTestResult<T, 4> SpaceToBatchNdMultiBlockNHWCTest(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdMultiBlockTest<T>(workloadFactory, armnn::DataLayout::NHWC);
+}
+
+template <typename T>
+LayerTestResult<T, 4> SpaceToBatchNdPaddingNHWCTest(armnn::IWorkloadFactory& workloadFactory)
+{
+ return SpaceToBatchNdPaddingTest<T>(workloadFactory, armnn::DataLayout::NHWC);
+}
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-01 17:13:00 +0000