diff options
Diffstat (limited to 'delegate/test/BatchSpaceTest.cpp')
| -rw-r--r-- | delegate/test/BatchSpaceTest.cpp | 144 |
1 files changed, 20 insertions, 124 deletions
diff --git a/delegate/test/BatchSpaceTest.cpp b/delegate/test/BatchSpaceTest.cpp index dd6047a61e..78cde2e3c5 100644 --- a/delegate/test/BatchSpaceTest.cpp +++ b/delegate/test/BatchSpaceTest.cpp @@ -15,7 +15,7 @@ namespace armnnDelegate { // BatchToSpaceND Operator -void BatchToSpaceNDFp32Test(std::vector<armnn::BackendId>& backends) +void BatchToSpaceNDFp32Test() { std::vector<int32_t> inputShape { 4, 1, 1, 1 }; std::vector<int32_t> expectedOutputShape { 1, 2, 2, 1 }; @@ -28,7 +28,6 @@ void BatchToSpaceNDFp32Test(std::vector<armnn::BackendId>& backends) BatchSpaceTest<float>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND, ::tflite::TensorType_FLOAT32, - backends, inputShape, expectedOutputShape, inputValues, @@ -37,7 +36,7 @@ void BatchToSpaceNDFp32Test(std::vector<armnn::BackendId>& backends) expectedOutputValues); } -void BatchToSpaceNDFp32BatchOneTest(std::vector<armnn::BackendId>& backends) +void BatchToSpaceNDFp32BatchOneTest() { std::vector<int32_t> inputShape { 1, 2, 2, 1 }; std::vector<int32_t> expectedOutputShape { 1, 2, 2, 1 }; @@ -50,7 +49,6 @@ void BatchToSpaceNDFp32BatchOneTest(std::vector<armnn::BackendId>& backends) BatchSpaceTest<float>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND, ::tflite::TensorType_FLOAT32, - backends, inputShape, expectedOutputShape, inputValues, @@ -59,7 +57,7 @@ void BatchToSpaceNDFp32BatchOneTest(std::vector<armnn::BackendId>& backends) expectedOutputValues); } -void BatchToSpaceNDUint8Test(std::vector<armnn::BackendId>& backends) +void BatchToSpaceNDUint8Test() { std::vector<int32_t> inputShape { 4, 1, 1, 3 }; std::vector<int32_t> expectedOutputShape { 1, 2, 2, 3 }; @@ -72,7 +70,6 @@ void BatchToSpaceNDUint8Test(std::vector<armnn::BackendId>& backends) BatchSpaceTest<uint8_t>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND, ::tflite::TensorType_UINT8, - backends, inputShape, expectedOutputShape, inputValues, @@ -82,7 +79,7 @@ void BatchToSpaceNDUint8Test(std::vector<armnn::BackendId>& backends) } // SpaceToBatchND Operator -void SpaceToBatchNDFp32Test(std::vector<armnn::BackendId>& backends) +void SpaceToBatchNDFp32Test() { std::vector<int32_t> inputShape { 1, 2, 2, 1 }; std::vector<int32_t> expectedOutputShape { 4, 1, 1, 1 }; @@ -95,7 +92,6 @@ void SpaceToBatchNDFp32Test(std::vector<armnn::BackendId>& backends) BatchSpaceTest<float>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND, ::tflite::TensorType_FLOAT32, - backends, inputShape, expectedOutputShape, inputValues, @@ -104,7 +100,7 @@ void SpaceToBatchNDFp32Test(std::vector<armnn::BackendId>& backends) expectedOutputValues); } -void SpaceToBatchNDFp32PaddingTest(std::vector<armnn::BackendId>& backends) +void SpaceToBatchNDFp32PaddingTest() { std::vector<int32_t> inputShape { 2, 2, 4, 1 }; std::vector<int32_t> expectedOutputShape { 8, 1, 3, 1 }; @@ -124,7 +120,6 @@ void SpaceToBatchNDFp32PaddingTest(std::vector<armnn::BackendId>& backends) BatchSpaceTest<float>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND, ::tflite::TensorType_FLOAT32, - backends, inputShape, expectedOutputShape, inputValues, @@ -133,7 +128,7 @@ void SpaceToBatchNDFp32PaddingTest(std::vector<armnn::BackendId>& backends) expectedOutputValues); } -void SpaceToBatchNDUint8Test(std::vector<armnn::BackendId>& backends) +void SpaceToBatchNDUint8Test() { std::vector<int32_t> inputShape { 1, 2, 2, 3 }; std::vector<int32_t> expectedOutputShape { 4, 1, 1, 3 }; @@ -146,7 +141,6 @@ void SpaceToBatchNDUint8Test(std::vector<armnn::BackendId>& backends) BatchSpaceTest<uint8_t>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND, ::tflite::TensorType_UINT8, - backends, inputShape, expectedOutputShape, inputValues, @@ -156,141 +150,43 @@ void SpaceToBatchNDUint8Test(std::vector<armnn::BackendId>& backends) } // BatchToSpaceND Tests -TEST_SUITE("BatchToSpaceND_CpuAccTests") +TEST_SUITE("BatchToSpaceNDTests") { -TEST_CASE ("BatchToSpaceND_Fp32_CpuAcc_Test") +TEST_CASE ("BatchToSpaceND_Fp32_Test") { - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; - BatchToSpaceNDFp32Test(backends); + BatchToSpaceNDFp32Test(); } -TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_CpuAcc_Test") +TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_Test") { - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; - BatchToSpaceNDFp32BatchOneTest(backends); + BatchToSpaceNDFp32BatchOneTest(); } -TEST_CASE ("BatchToSpaceND_Uint8_CpuAcc_Test") +TEST_CASE ("BatchToSpaceND_Uint8_Test") { - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; - BatchToSpaceNDUint8Test(backends); -} - -} - -TEST_SUITE("BatchToSpaceND_GpuAccTests") -{ - -TEST_CASE ("BatchToSpaceND_Fp32_GpuAcc_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; - BatchToSpaceNDFp32Test(backends); -} - -TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_GpuAcc_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; - BatchToSpaceNDFp32BatchOneTest(backends); -} - -TEST_CASE ("BatchToSpaceND_Uint8_GpuAcc_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; - BatchToSpaceNDUint8Test(backends); -} - -} - -TEST_SUITE("BatchToSpaceND_CpuRefTests") -{ - -TEST_CASE ("BatchToSpaceND_Fp32_CpuRef_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; - BatchToSpaceNDFp32Test(backends); -} - -TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_CpuRef_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; - BatchToSpaceNDFp32BatchOneTest(backends); -} - -TEST_CASE ("BatchToSpaceND_Uint8_CpuRef_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; - BatchToSpaceNDUint8Test(backends); + BatchToSpaceNDUint8Test(); } } // SpaceToBatchND Tests -TEST_SUITE("SpaceToBatchND_CpuAccTests") -{ - -TEST_CASE ("SpaceToBatchND_Fp32_CpuAcc_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; - SpaceToBatchNDFp32Test(backends); -} - -TEST_CASE ("SpaceToBatchND_Fp32_Padding_CpuAcc_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; - SpaceToBatchNDFp32PaddingTest(backends); -} - -TEST_CASE ("SpaceToBatchND_Uint8_CpuAcc_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; - SpaceToBatchNDUint8Test(backends); -} - -} - -TEST_SUITE("SpaceToBatchND_GpuAccTests") -{ - -TEST_CASE ("SpaceToBatchND_Fp32_GpuAcc_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; - SpaceToBatchNDFp32Test(backends); -} - -TEST_CASE ("SpaceToBatchND_Fp32_Padding_GpuAcc_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; - SpaceToBatchNDFp32PaddingTest(backends); -} - -TEST_CASE ("SpaceToBatchND_Uint8_GpuAcc_Test") -{ - std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; - SpaceToBatchNDUint8Test(backends); -} - -} - -TEST_SUITE("SpaceToBatchND_CpuRefTests") +TEST_SUITE("SpaceToBatchND_Tests") { -TEST_CASE ("SpaceToBatchND_Fp32_CpuRef_Test") +TEST_CASE ("SpaceToBatchND_Fp32_Test") { - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; - SpaceToBatchNDFp32Test(backends); + SpaceToBatchNDFp32Test(); } -TEST_CASE ("SpaceToBatchND_Fp32_Padding_CpuRef_Test") +TEST_CASE ("SpaceToBatchND_Fp32_Padding_Test") { - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; - SpaceToBatchNDFp32PaddingTest(backends); + SpaceToBatchNDFp32PaddingTest(); } -TEST_CASE ("SpaceToBatchND_Uint8_CpuRef_Test") +TEST_CASE ("SpaceToBatchND_Uint8_Test") { - std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; - SpaceToBatchNDUint8Test(backends); + SpaceToBatchNDUint8Test(); } } |