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| author | Teresa Charlin <teresa.charlinreyes@arm.com> | 2023-06-01 16:15:13 +0100 |
|---|---|---|
| committer | TeresaARM <teresa.charlinreyes@arm.com> | 2023-06-22 14:12:28 +0000 |
| commit | f77cab57b3eca1425384d4d5bfe44d76fc7023b9 (patch) | |
| tree | e51066218697f652a0bc40b618ca279a0f7be3f6 /src/backends/reference/workloads/BatchToSpaceNd.hpp | |
| parent | fd5dbe98c780ae7bd390fae536c2dc636e7b61cc (diff) | |
| download | armnn-f77cab57b3eca1425384d4d5bfe44d76fc7023b9.tar.gz | |
IVGCVSW-7785 Extend support for 3D tensors BATCH_TO_SPACE and SPACE_TO_BATCH in CpuRef
* Both layers were assuming 4D tensors, now 3D is supported too.
* Remove some unnecessary includes
* Add Unit Tests
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I7bdd11e4936a27cd97ec65fd915e6ccaa1494cff
Diffstat (limited to 'src/backends/reference/workloads/BatchToSpaceNd.hpp')
| -rw-r--r-- | src/backends/reference/workloads/BatchToSpaceNd.hpp | 22 |
1 files changed, 8 insertions, 14 deletions
diff --git a/src/backends/reference/workloads/BatchToSpaceNd.hpp b/src/backends/reference/workloads/BatchToSpaceNd.hpp index 0fcef58554..acacda4e86 100644 --- a/src/backends/reference/workloads/BatchToSpaceNd.hpp +++ b/src/backends/reference/workloads/BatchToSpaceNd.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017-2019,2021,2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -9,21 +9,15 @@ #include "Decoders.hpp" #include "Encoders.hpp" -#include <armnn/Types.hpp> - -#include <armnnUtils/DataLayoutIndexed.hpp> - -#include <armnn/backends/Workload.hpp> -#include <armnn/backends/WorkloadData.hpp> +#include <armnn/Descriptors.hpp> namespace armnn { -void BatchToSpaceNd(const armnnUtils::DataLayoutIndexed& dataLayout, - const TensorInfo& inputTensorInfo, - const TensorInfo& outputTensorInfo, - const std::vector<unsigned int>& blockShape, - const std::vector<std::pair<unsigned int, unsigned int>>& cropsData, - Decoder<float>& inputDecoder, - Encoder<float>& outputEncoder); +void BatchToSpaceNd(const TensorInfo& inputInfo, + const TensorInfo& outputInfo, + const BatchToSpaceNdDescriptor& params, + Decoder<float>& inputData, + Encoder<float>& outputData); + } // namespace armnn |