IVGCVSW-7968 Update Doxygen docu for 24.02

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I8c1e45815c6cf78f80d6f2c0959a5bbba6cd11de

1 files changed, 5 insertions, 5 deletions

diff --git a/latest/_ref_unidirectional_sequence_lstm_workload_8cpp_source.html b/latest/_ref_unidirectional_sequence_lstm_workload_8cpp_source.html
index 44ed637d06..6bdc430f1b 100644
--- a/latest/_ref_unidirectional_sequence_lstm_workload_8cpp_source.html
+++ b/latest/_ref_unidirectional_sequence_lstm_workload_8cpp_source.html
@@ -36,7 +36,7 @@
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   <td id="projectalign" style="padding-left: 0.9em;">
    <div id="projectname">
-   &#160;<span id="projectnumber">23.11</span>
+   &#160;<span id="projectnumber">24.02</span>
    </div>
   </td>
  </tr>
@@ -411,7 +411,7 @@ $(document).ready(function(){initNavTree('_ref_unidirectional_sequence_lstm_work
 <div class="line"><a name="l00313"></a><span class="lineno">  313</span>&#160;} <span class="comment">//namespace armnn</span></div>
 </div><!-- fragment --></div><!-- contents -->
 </div><!-- doc-content -->
-<div class="ttc" id="aclassarmnn_1_1_tensor_info_html_a8846406ac37fbd2204f0be16ee05d5b7"><div class="ttname"><a href="classarmnn_1_1_tensor_info.html#a8846406ac37fbd2204f0be16ee05d5b7">armnn::TensorInfo::GetNumElements</a></div><div class="ttdeci">unsigned int GetNumElements() const</div><div class="ttdef"><b>Definition:</b> <a href="_tensor_8hpp_source.html#l00196">Tensor.hpp:196</a></div></div>
+<div class="ttc" id="aclassarmnn_1_1_tensor_info_html_a8846406ac37fbd2204f0be16ee05d5b7"><div class="ttname"><a href="classarmnn_1_1_tensor_info.html#a8846406ac37fbd2204f0be16ee05d5b7">armnn::TensorInfo::GetNumElements</a></div><div class="ttdeci">unsigned int GetNumElements() const</div><div class="ttdef"><b>Definition:</b> <a href="_tensor_8hpp_source.html#l00198">Tensor.hpp:198</a></div></div>
 <div class="ttc" id="astructarmnn_1_1_lstm_descriptor_html_a3dcd10ca3ea2e132558b1e2814668c15"><div class="ttname"><a href="structarmnn_1_1_lstm_descriptor.html#a3dcd10ca3ea2e132558b1e2814668c15">armnn::LstmDescriptor::m_TimeMajor</a></div><div class="ttdeci">bool m_TimeMajor</div><div class="ttdoc">Enable/disable time major.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01154">Descriptors.hpp:1154</a></div></div>
 <div class="ttc" id="a_lstm_8hpp_html"><div class="ttname"><a href="_lstm_8hpp.html">Lstm.hpp</a></div></div>
 <div class="ttc" id="astructarmnn_1_1experimental_1_1_execution_data_html_ad2b382076f26f48cd44783cfca2e3642"><div class="ttname"><a href="structarmnn_1_1experimental_1_1_execution_data.html#ad2b382076f26f48cd44783cfca2e3642">armnn::experimental::ExecutionData::m_Data</a></div><div class="ttdeci">void * m_Data</div><div class="ttdef"><b>Definition:</b> <a href="_execution_data_8hpp_source.html#l00016">ExecutionData.hpp:16</a></div></div>
@@ -437,11 +437,11 @@ $(document).ready(function(){initNavTree('_ref_unidirectional_sequence_lstm_work
 <div class="ttc" id="a_ref_workload_utils_8hpp_html"><div class="ttname"><a href="_ref_workload_utils_8hpp.html">RefWorkloadUtils.hpp</a></div></div>
 <div class="ttc" id="astructarmnn_1_1_lstm_descriptor_html_ad474e5c51a0b194ef32e812b86c0cbdb"><div class="ttname"><a href="structarmnn_1_1_lstm_descriptor.html#ad474e5c51a0b194ef32e812b86c0cbdb">armnn::LstmDescriptor::m_CifgEnabled</a></div><div class="ttdeci">bool m_CifgEnabled</div><div class="ttdoc">Enable/disable cifg (coupled input &amp; forget gate).</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01146">Descriptors.hpp:1146</a></div></div>
 <div class="ttc" id="aclassarmnn_1_1_base_workload_html_afb8d2c8817c75de9d01a4c0e0d5c160b"><div class="ttname"><a href="classarmnn_1_1_base_workload.html#afb8d2c8817c75de9d01a4c0e0d5c160b">armnn::BaseWorkload&lt; UnidirectionalSequenceLstmQueueDescriptor &gt;::m_Data</a></div><div class="ttdeci">UnidirectionalSequenceLstmQueueDescriptor m_Data</div><div class="ttdef"><b>Definition:</b> <a href="_workload_8hpp_source.html#l00089">Workload.hpp:89</a></div></div>
-<div class="ttc" id="aclassarmnn_1_1_tensor_info_html_a8b5d0f8a24e9d9238f412260a552acf8"><div class="ttname"><a href="classarmnn_1_1_tensor_info.html#a8b5d0f8a24e9d9238f412260a552acf8">armnn::TensorInfo::GetShape</a></div><div class="ttdeci">const TensorShape &amp; GetShape() const</div><div class="ttdef"><b>Definition:</b> <a href="_tensor_8hpp_source.html#l00191">Tensor.hpp:191</a></div></div>
+<div class="ttc" id="aclassarmnn_1_1_tensor_info_html_a8b5d0f8a24e9d9238f412260a552acf8"><div class="ttname"><a href="classarmnn_1_1_tensor_info.html#a8b5d0f8a24e9d9238f412260a552acf8">armnn::TensorInfo::GetShape</a></div><div class="ttdeci">const TensorShape &amp; GetShape() const</div><div class="ttdef"><b>Definition:</b> <a href="_tensor_8hpp_source.html#l00193">Tensor.hpp:193</a></div></div>
 <div class="ttc" id="astructarmnn_1_1_lstm_descriptor_html_a4a8ec49f130084445d44297549254780"><div class="ttname"><a href="structarmnn_1_1_lstm_descriptor.html#a4a8ec49f130084445d44297549254780">armnn::LstmDescriptor::m_LayerNormEnabled</a></div><div class="ttdeci">bool m_LayerNormEnabled</div><div class="ttdoc">Enable/disable layer normalization.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01152">Descriptors.hpp:1152</a></div></div>
 <div class="ttc" id="a_decoders_8hpp_html"><div class="ttname"><a href="_decoders_8hpp.html">Decoders.hpp</a></div></div>
 <div class="ttc" id="astructarmnn_1_1experimental_1_1_working_mem_descriptor_html_a4b50e46a6810018f3edecfb68b2a76b3"><div class="ttname"><a href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html#a4b50e46a6810018f3edecfb68b2a76b3">armnn::experimental::WorkingMemDescriptor::m_Inputs</a></div><div class="ttdeci">std::vector&lt; ITensorHandle * &gt; m_Inputs</div><div class="ttdef"><b>Definition:</b> <a href="_working_mem_descriptor_8hpp_source.html#l00020">WorkingMemDescriptor.hpp:20</a></div></div>
-<div class="ttc" id="aclassarmnn_1_1_tensor_info_html_abe8889e8150beef5fd204b2d87b49298"><div class="ttname"><a href="classarmnn_1_1_tensor_info.html#abe8889e8150beef5fd204b2d87b49298">armnn::TensorInfo::SetShape</a></div><div class="ttdeci">void SetShape(const TensorShape &amp;newShape)</div><div class="ttdef"><b>Definition:</b> <a href="_tensor_8hpp_source.html#l00193">Tensor.hpp:193</a></div></div>
+<div class="ttc" id="aclassarmnn_1_1_tensor_info_html_abe8889e8150beef5fd204b2d87b49298"><div class="ttname"><a href="classarmnn_1_1_tensor_info.html#abe8889e8150beef5fd204b2d87b49298">armnn::TensorInfo::SetShape</a></div><div class="ttdeci">void SetShape(const TensorShape &amp;newShape)</div><div class="ttdef"><b>Definition:</b> <a href="_tensor_8hpp_source.html#l00195">Tensor.hpp:195</a></div></div>
 <div class="ttc" id="anamespacearmnn_html"><div class="ttname"><a href="namespacearmnn.html">armnn</a></div><div class="ttdoc">Copyright (c) 2021 ARM Limited and Contributors.</div><div class="ttdef"><b>Definition:</b> <a href="01__00__quick__start_8dox_source.html#l00006">01_00_quick_start.dox:6</a></div></div>
 <div class="ttc" id="astructarmnn_1_1experimental_1_1_working_mem_descriptor_html"><div class="ttname"><a href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html">armnn::experimental::WorkingMemDescriptor</a></div><div class="ttdef"><b>Definition:</b> <a href="_working_mem_descriptor_8hpp_source.html#l00018">WorkingMemDescriptor.hpp:18</a></div></div>
 <div class="ttc" id="astructarmnn_1_1_lstm_descriptor_html_a6c9de81fc65b3c4924cab11907075a17"><div class="ttname"><a href="structarmnn_1_1_lstm_descriptor.html#a6c9de81fc65b3c4924cab11907075a17">armnn::LstmDescriptor::m_ProjectionEnabled</a></div><div class="ttdeci">bool m_ProjectionEnabled</div><div class="ttdoc">Enable/disable the projection layer.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01150">Descriptors.hpp:1150</a></div></div>
@@ -457,7 +457,7 @@ $(document).ready(function(){initNavTree('_ref_unidirectional_sequence_lstm_work
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_68267d1309a1af8e8297ef4c3efbcdba.html">src</a></li><li class="navelem"><a class="el" href="dir_0f3cdec46afbc61a1ded8e1687c9c9a0.html">backends</a></li><li class="navelem"><a class="el" href="dir_efae4012d0e357ebeaba7d02491d70e5.html">reference</a></li><li class="navelem"><a class="el" href="dir_d2f3b8e2e64df3181ebe92efcc0a3012.html">workloads</a></li><li class="navelem"><a class="el" href="_ref_unidirectional_sequence_lstm_workload_8cpp.html">RefUnidirectionalSequenceLstmWorkload.cpp</a></li>
-    <li class="footer">Generated on Wed Nov 22 2023 10:57:08 for Arm NN by
+    <li class="footer">Generated on Wed Feb 14 2024 16:36:17 for Arm NN by
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