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| author | Nikhil Raj <nikhil.raj@arm.com> | 2023-11-22 11:41:15 +0000 |
|---|---|---|
| committer | Nikhil Raj <nikhil.raj@arm.com> | 2023-11-22 11:41:15 +0000 |
| commit | 6f92c8e9f8bb38dcf5dccf8deeff5112ecd8e37c (patch) | |
| tree | 0c076149c03ac45c2617f5e02a77b79287ff5a0f /latest/_ref_q_lstm_workload_8cpp_source.html | |
| parent | 03c7ff3f6188240baaeaeb405a357a0c58195fec (diff) | |
| download | armnn-6f92c8e9f8bb38dcf5dccf8deeff5112ecd8e37c.tar.gz | |
Update Doxygen for 23.11
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I47cd933f5002cb94a73aa97689d7b3d9c93cb849
Diffstat (limited to 'latest/_ref_q_lstm_workload_8cpp_source.html')
| -rw-r--r-- | latest/_ref_q_lstm_workload_8cpp_source.html | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/latest/_ref_q_lstm_workload_8cpp_source.html b/latest/_ref_q_lstm_workload_8cpp_source.html index 78afb419f2..0b324b3de9 100644 --- a/latest/_ref_q_lstm_workload_8cpp_source.html +++ b/latest/_ref_q_lstm_workload_8cpp_source.html @@ -36,7 +36,7 @@ <img alt="ArmNN" src="Arm_NN_horizontal_blue.png" style="max-width: 15rem; margin-top: .5rem; margin-left 13px"/> <td id="projectalign" style="padding-left: 0.9em;"> <div id="projectname"> -  <span id="projectnumber">23.08</span> +  <span id="projectnumber">23.11</span> </div> </td> </tr> @@ -648,8 +648,8 @@ $(document).ready(function(){initNavTree('_ref_q_lstm_workload_8cpp_source.html' </div><!-- fragment --></div><!-- contents --> </div><!-- doc-content --> <div class="ttc" id="a_lstm_utils_8cpp_html_a5b81dc0a1a9a2bccab8bb79dfa3e77b7"><div class="ttname"><a href="_lstm_utils_8cpp.html#a5b81dc0a1a9a2bccab8bb79dfa3e77b7">VectorVectorCwiseProduct</a></div><div class="ttdeci">void VectorVectorCwiseProduct(armnn::Decoder< float > &vector1, armnn::Decoder< float > &vector2, uint32_t vSize, armnn::Encoder< float > &outResult)</div><div class="ttdef"><b>Definition:</b> <a href="_lstm_utils_8cpp_source.html#l00187">LstmUtils.cpp:187</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_afec7f36158448f723b426a9527acb189"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#afec7f36158448f723b426a9527acb189">armnn::QLstmDescriptor::m_ForgetIntermediateScale</a></div><div class="ttdeci">float m_ForgetIntermediateScale</div><div class="ttdoc">Forget intermediate quantization scale.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01407">Descriptors.hpp:1407</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a6c9de81fc65b3c4924cab11907075a17"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a6c9de81fc65b3c4924cab11907075a17">armnn::QLstmDescriptor::m_ProjectionEnabled</a></div><div class="ttdeci">bool m_ProjectionEnabled</div><div class="ttdoc">Enable/disable the projection layer.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01401">Descriptors.hpp:1401</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_afec7f36158448f723b426a9527acb189"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#afec7f36158448f723b426a9527acb189">armnn::QLstmDescriptor::m_ForgetIntermediateScale</a></div><div class="ttdeci">float m_ForgetIntermediateScale</div><div class="ttdoc">Forget intermediate quantization scale.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01428">Descriptors.hpp:1428</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a6c9de81fc65b3c4924cab11907075a17"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a6c9de81fc65b3c4924cab11907075a17">armnn::QLstmDescriptor::m_ProjectionEnabled</a></div><div class="ttdeci">bool m_ProjectionEnabled</div><div class="ttdoc">Enable/disable the projection layer.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01422">Descriptors.hpp:1422</a></div></div> <div class="ttc" id="a_lstm_utils_8cpp_html_a0ed27dd6d6125a06bf654080f4184360"><div class="ttname"><a href="_lstm_utils_8cpp.html#a0ed27dd6d6125a06bf654080f4184360">MeanStddevNormalization</a></div><div class="ttdeci">void MeanStddevNormalization(armnn::Decoder< float > &input_vector, armnn::Encoder< float > &output_vector, uint32_t v_size, uint32_t n_batch, float normalization_epsilon)</div><div class="ttdef"><b>Definition:</b> <a href="_lstm_utils_8cpp_source.html#l00040">LstmUtils.cpp:40</a></div></div> <div class="ttc" id="a_lstm_utils_8cpp_html_a796323e16216b880043dc5ebbaa2372b"><div class="ttname"><a href="_lstm_utils_8cpp.html#a796323e16216b880043dc5ebbaa2372b">VectorBatchVectorCwiseProductAccumulate</a></div><div class="ttdeci">void VectorBatchVectorCwiseProductAccumulate(armnn::Decoder< float > &vector, uint32_t vSize, armnn::Decoder< float > &batchVector, uint32_t nBatch, armnn::Encoder< float > &outResult)</div><div class="ttdef"><b>Definition:</b> <a href="_lstm_utils_8cpp_source.html#l00131">LstmUtils.cpp:131</a></div></div> <div class="ttc" id="a_lstm_utils_8cpp_html_a389c4bbafd0fff7060cbb183f20a2134"><div class="ttname"><a href="_lstm_utils_8cpp.html#a389c4bbafd0fff7060cbb183f20a2134">VectorBatchVectorAdd</a></div><div class="ttdeci">void VectorBatchVectorAdd(armnn::Decoder< float > &vector, uint32_t vSize, armnn::Decoder< float > &batchVector, uint32_t nBatch, armnn::Encoder< float > &outResult)</div><div class="ttdef"><b>Definition:</b> <a href="_lstm_utils_8cpp_source.html#l00016">LstmUtils.cpp:16</a></div></div> @@ -663,10 +663,10 @@ $(document).ready(function(){initNavTree('_ref_q_lstm_workload_8cpp_source.html' <div class="ttc" id="a_lstm_utils_8cpp_html_a8618ae0c77638e01069fdb0063cabb3f"><div class="ttname"><a href="_lstm_utils_8cpp.html#a8618ae0c77638e01069fdb0063cabb3f">AssignScopedTensorHandle</a></div><div class="ttdeci">std::unique_ptr< armnn::ScopedTensorHandle > AssignScopedTensorHandle(const armnn::ConstTensorHandle *ptr)</div><div class="ttdef"><b>Definition:</b> <a href="_lstm_utils_8cpp_source.html#l00299">LstmUtils.cpp:299</a></div></div> <div class="ttc" id="a_lstm_utils_8cpp_html_ab93a2c78551c3d3aba8ddcafb792a36d"><div class="ttname"><a href="_lstm_utils_8cpp.html#ab93a2c78551c3d3aba8ddcafb792a36d">MatrixBatchVectorMultiplyAccumulate</a></div><div class="ttdeci">void MatrixBatchVectorMultiplyAccumulate(armnn::Decoder< float > &matrix, uint32_t mRows, uint32_t mCols, armnn::Decoder< float > &vector, uint32_t nBatch, armnn::Encoder< float > &outResult)</div><div class="ttdef"><b>Definition:</b> <a href="_lstm_utils_8cpp_source.html#l00087">LstmUtils.cpp:87</a></div></div> <div class="ttc" id="a_ref_workload_utils_8hpp_html_a06acca4fd832e0fb179604112c0505af"><div class="ttname"><a href="_ref_workload_utils_8hpp.html#a06acca4fd832e0fb179604112c0505af">ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID</a></div><div class="ttdeci">#define ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID(label)</div><div class="ttdoc">Creates a profiling event that uses GetGuid() and GetName() from the calling class.</div><div class="ttdef"><b>Definition:</b> <a href="_ref_workload_utils_8hpp_source.html#l00022">RefWorkloadUtils.hpp:22</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a09e1f097944f61cc901240f9300364cf"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a09e1f097944f61cc901240f9300364cf">armnn::QLstmDescriptor::m_InputIntermediateScale</a></div><div class="ttdeci">float m_InputIntermediateScale</div><div class="ttdoc">Input intermediate quantization scale.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01405">Descriptors.hpp:1405</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a09e1f097944f61cc901240f9300364cf"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a09e1f097944f61cc901240f9300364cf">armnn::QLstmDescriptor::m_InputIntermediateScale</a></div><div class="ttdeci">float m_InputIntermediateScale</div><div class="ttdoc">Input intermediate quantization scale.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01426">Descriptors.hpp:1426</a></div></div> <div class="ttc" id="a_lstm_utils_8cpp_html_a00d8a623c04f1120f6fee3fe38d1cee9"><div class="ttname"><a href="_lstm_utils_8cpp.html#a00d8a623c04f1120f6fee3fe38d1cee9">CopyVector</a></div><div class="ttdeci">void CopyVector(armnn::Decoder< float > &vector, uint32_t vSize, armnn::Encoder< float > &outResult)</div><div class="ttdef"><b>Definition:</b> <a href="_lstm_utils_8cpp_source.html#l00244">LstmUtils.cpp:244</a></div></div> <div class="ttc" id="a_lstm_utils_8cpp_html_aca7bd1dff180b6a5de894537f8220793"><div class="ttname"><a href="_lstm_utils_8cpp.html#aca7bd1dff180b6a5de894537f8220793">Sub1Vector</a></div><div class="ttdeci">void Sub1Vector(armnn::Decoder< float > &vector, uint32_t vSize, armnn::Encoder< float > &result)</div><div class="ttdef"><b>Definition:</b> <a href="_lstm_utils_8cpp_source.html#l00173">LstmUtils.cpp:173</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a0477ee1b44ace6090119178eea78cb0b"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a0477ee1b44ace6090119178eea78cb0b">armnn::QLstmDescriptor::m_CellIntermediateScale</a></div><div class="ttdeci">float m_CellIntermediateScale</div><div class="ttdoc">Cell intermediate quantization scale.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01409">Descriptors.hpp:1409</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a0477ee1b44ace6090119178eea78cb0b"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a0477ee1b44ace6090119178eea78cb0b">armnn::QLstmDescriptor::m_CellIntermediateScale</a></div><div class="ttdeci">float m_CellIntermediateScale</div><div class="ttdoc">Cell intermediate quantization scale.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01430">Descriptors.hpp:1430</a></div></div> <div class="ttc" id="anamespacearmnn_html_ad8ed01ff3ff33333d8e19db4d2818bb6a053c769dcf82d66ef326c86980c02ba7"><div class="ttname"><a href="namespacearmnn.html#ad8ed01ff3ff33333d8e19db4d2818bb6a053c769dcf82d66ef326c86980c02ba7">armnn::DataType::QSymmS16</a></div><div class="ttdeci">@ QSymmS16</div></div> <div class="ttc" id="a_ref_q_lstm_workload_8hpp_html"><div class="ttname"><a href="_ref_q_lstm_workload_8hpp.html">RefQLstmWorkload.hpp</a></div></div> <div class="ttc" id="aclassarmnn_1_1_tensor_shape_html"><div class="ttname"><a href="classarmnn_1_1_tensor_shape.html">armnn::TensorShape</a></div><div class="ttdef"><b>Definition:</b> <a href="_tensor_8hpp_source.html#l00020">Tensor.hpp:20</a></div></div> @@ -675,10 +675,10 @@ $(document).ready(function(){initNavTree('_ref_q_lstm_workload_8cpp_source.html' <div class="ttc" id="anamespacearmnn_html_ad8ed01ff3ff33333d8e19db4d2818bb6"><div class="ttname"><a href="namespacearmnn.html#ad8ed01ff3ff33333d8e19db4d2818bb6">armnn::DataType</a></div><div class="ttdeci">DataType</div><div class="ttdef"><b>Definition:</b> <a href="_types_8hpp_source.html#l00048">Types.hpp:48</a></div></div> <div class="ttc" id="anamespacearmnn_html_aa815fde54f6d8e8aa5b4f0301cf4178b"><div class="ttname"><a href="namespacearmnn.html#aa815fde54f6d8e8aa5b4f0301cf4178b">armnn::GetTensorInfo</a></div><div class="ttdeci">const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)</div><div class="ttdoc">float32 helpers</div><div class="ttdef"><b>Definition:</b> <a href="_ref_workload_utils_8hpp_source.html#l00033">RefWorkloadUtils.hpp:33</a></div></div> <div class="ttc" id="a_activation_8hpp_html"><div class="ttname"><a href="_activation_8hpp.html">Activation.hpp</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_aa6a518b65088f34803b3214334bdff61"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#aa6a518b65088f34803b3214334bdff61">armnn::QLstmDescriptor::m_ProjectionClip</a></div><div class="ttdeci">float m_ProjectionClip</div><div class="ttdoc">Clipping threshold value for the projection.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01395">Descriptors.hpp:1395</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_queue_descriptor_html"><div class="ttname"><a href="structarmnn_1_1_q_lstm_queue_descriptor.html">armnn::QLstmQueueDescriptor</a></div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.html#l00557">WorkloadData.hpp:557</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_aa6a518b65088f34803b3214334bdff61"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#aa6a518b65088f34803b3214334bdff61">armnn::QLstmDescriptor::m_ProjectionClip</a></div><div class="ttdeci">float m_ProjectionClip</div><div class="ttdoc">Clipping threshold value for the projection.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01416">Descriptors.hpp:1416</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_queue_descriptor_html"><div class="ttname"><a href="structarmnn_1_1_q_lstm_queue_descriptor.html">armnn::QLstmQueueDescriptor</a></div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.html#l00562">WorkloadData.hpp:562</a></div></div> <div class="ttc" id="anamespacearmnn_html_a4dc0adc6737b5944e7671bee71788407acaf9b6b99962bf5c2264824231d7a40c"><div class="ttname"><a href="namespacearmnn.html#a4dc0adc6737b5944e7671bee71788407acaf9b6b99962bf5c2264824231d7a40c">armnn::BoostLogSeverityMapping::info</a></div><div class="ttdeci">@ info</div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_aa43409f9b457352c95c89f20ce5d844d"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#aa43409f9b457352c95c89f20ce5d844d">armnn::QLstmDescriptor::m_OutputIntermediateScale</a></div><div class="ttdeci">float m_OutputIntermediateScale</div><div class="ttdoc">Output intermediate quantization scale.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01411">Descriptors.hpp:1411</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_aa43409f9b457352c95c89f20ce5d844d"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#aa43409f9b457352c95c89f20ce5d844d">armnn::QLstmDescriptor::m_OutputIntermediateScale</a></div><div class="ttdeci">float m_OutputIntermediateScale</div><div class="ttdoc">Output intermediate quantization scale.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01432">Descriptors.hpp:1432</a></div></div> <div class="ttc" id="astructarmnn_1_1_queue_descriptor_html_a6abd491bb99ffe88bd472c1ae5a1ed1a"><div class="ttname"><a href="structarmnn_1_1_queue_descriptor.html#a6abd491bb99ffe88bd472c1ae5a1ed1a">armnn::QueueDescriptor::m_Outputs</a></div><div class="ttdeci">std::vector< ITensorHandle * > m_Outputs</div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.html#l00027">WorkloadData.hpp:27</a></div></div> <div class="ttc" id="anamespacearmnn_html_ad8ed01ff3ff33333d8e19db4d2818bb6accedffbc6e5308e33d3843e8bdc0dad7"><div class="ttname"><a href="namespacearmnn.html#ad8ed01ff3ff33333d8e19db4d2818bb6accedffbc6e5308e33d3843e8bdc0dad7">armnn::DataType::Signed32</a></div><div class="ttdeci">@ Signed32</div></div> <div class="ttc" id="a_lstm_utils_8cpp_html_a4c20bc573b70e89327b334f924da97b5"><div class="ttname"><a href="_lstm_utils_8cpp.html#a4c20bc573b70e89327b334f924da97b5">ZeroVector</a></div><div class="ttdeci">void ZeroVector(armnn::Encoder< float > &vector, uint32_t vSize)</div><div class="ttdef"><b>Definition:</b> <a href="_lstm_utils_8cpp_source.html#l00076">LstmUtils.cpp:76</a></div></div> @@ -686,24 +686,24 @@ $(document).ready(function(){initNavTree('_ref_q_lstm_workload_8cpp_source.html' <div class="ttc" id="a_ref_workload_utils_8hpp_html"><div class="ttname"><a href="_ref_workload_utils_8hpp.html">RefWorkloadUtils.hpp</a></div></div> <div class="ttc" id="aclassarmnn_1_1_base_workload_html_afb8d2c8817c75de9d01a4c0e0d5c160b"><div class="ttname"><a href="classarmnn_1_1_base_workload.html#afb8d2c8817c75de9d01a4c0e0d5c160b">armnn::BaseWorkload< QLstmQueueDescriptor >::m_Data</a></div><div class="ttdeci">QLstmQueueDescriptor m_Data</div><div class="ttdef"><b>Definition:</b> <a href="_workload_8hpp_source.html#l00089">Workload.hpp:89</a></div></div> <div class="ttc" id="aclassarmnn_1_1_tensor_info_html_a8b5d0f8a24e9d9238f412260a552acf8"><div class="ttname"><a href="classarmnn_1_1_tensor_info.html#a8b5d0f8a24e9d9238f412260a552acf8">armnn::TensorInfo::GetShape</a></div><div class="ttdeci">const TensorShape & GetShape() const</div><div class="ttdef"><b>Definition:</b> <a href="_tensor_8hpp_source.html#l00191">Tensor.hpp:191</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a4556cbd764d4848d8ad0637a9eed580d"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a4556cbd764d4848d8ad0637a9eed580d">armnn::QLstmDescriptor::m_HiddenStateZeroPoint</a></div><div class="ttdeci">int32_t m_HiddenStateZeroPoint</div><div class="ttdoc">Hidden State zero point.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01413">Descriptors.hpp:1413</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a4556cbd764d4848d8ad0637a9eed580d"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a4556cbd764d4848d8ad0637a9eed580d">armnn::QLstmDescriptor::m_HiddenStateZeroPoint</a></div><div class="ttdeci">int32_t m_HiddenStateZeroPoint</div><div class="ttdoc">Hidden State zero point.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01434">Descriptors.hpp:1434</a></div></div> <div class="ttc" id="aclassarmnn_1_1_ref_q_lstm_workload_html_ae071e8822437c78baea75c3aef3a263a"><div class="ttname"><a href="classarmnn_1_1_ref_q_lstm_workload.html#ae071e8822437c78baea75c3aef3a263a">armnn::RefQLstmWorkload::Execute</a></div><div class="ttdeci">void Execute() const override</div><div class="ttdef"><b>Definition:</b> <a href="_ref_q_lstm_workload_8cpp_source.html#l00046">RefQLstmWorkload.cpp:46</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_ad474e5c51a0b194ef32e812b86c0cbdb"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#ad474e5c51a0b194ef32e812b86c0cbdb">armnn::QLstmDescriptor::m_CifgEnabled</a></div><div class="ttdeci">bool m_CifgEnabled</div><div class="ttdoc">Enable/disable CIFG (coupled input & forget gate).</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01397">Descriptors.hpp:1397</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_ad474e5c51a0b194ef32e812b86c0cbdb"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#ad474e5c51a0b194ef32e812b86c0cbdb">armnn::QLstmDescriptor::m_CifgEnabled</a></div><div class="ttdeci">bool m_CifgEnabled</div><div class="ttdoc">Enable/disable CIFG (coupled input & forget gate).</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01418">Descriptors.hpp:1418</a></div></div> <div class="ttc" id="a_decoders_8hpp_html"><div class="ttname"><a href="_decoders_8hpp.html">Decoders.hpp</a></div></div> <div class="ttc" id="anamespacearmnn_html_a56943a0946e5f15e5e58054b8e7a04a4a46f3ea056caa3126b91f3f70beea068c"><div class="ttname"><a href="namespacearmnn.html#a56943a0946e5f15e5e58054b8e7a04a4a46f3ea056caa3126b91f3f70beea068c">armnn::LayerType::Map</a></div><div class="ttdeci">@ Map</div></div> <div class="ttc" id="a_lstm_utils_8cpp_html_a2e653f948d93f4177f267a7b1b4ed47d"><div class="ttname"><a href="_lstm_utils_8cpp.html#a2e653f948d93f4177f267a7b1b4ed47d">VectorVectorCwiseProductAccumulate</a></div><div class="ttdeci">void VectorVectorCwiseProductAccumulate(armnn::Decoder< float > &vector1, armnn::Decoder< float > &vector2, uint32_t vSize, armnn::Encoder< float > &outResult)</div><div class="ttdef"><b>Definition:</b> <a href="_lstm_utils_8cpp_source.html#l00204">LstmUtils.cpp:204</a></div></div> <div class="ttc" id="astructarmnn_1_1experimental_1_1_working_mem_descriptor_html_a4b50e46a6810018f3edecfb68b2a76b3"><div class="ttname"><a href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html#a4b50e46a6810018f3edecfb68b2a76b3">armnn::experimental::WorkingMemDescriptor::m_Inputs</a></div><div class="ttdeci">std::vector< ITensorHandle * > m_Inputs</div><div class="ttdef"><b>Definition:</b> <a href="_working_mem_descriptor_8hpp_source.html#l00020">WorkingMemDescriptor.hpp:20</a></div></div> <div class="ttc" id="anamespacearmnn_html"><div class="ttname"><a href="namespacearmnn.html">armnn</a></div><div class="ttdoc">Copyright (c) 2021 ARM Limited and Contributors.</div><div class="ttdef"><b>Definition:</b> <a href="01__00__quick__start_8dox_source.html#l00006">01_00_quick_start.dox:6</a></div></div> <div class="ttc" id="astructarmnn_1_1experimental_1_1_working_mem_descriptor_html"><div class="ttname"><a href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html">armnn::experimental::WorkingMemDescriptor</a></div><div class="ttdef"><b>Definition:</b> <a href="_working_mem_descriptor_8hpp_source.html#l00018">WorkingMemDescriptor.hpp:18</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_af8f724af7210b52529216feefa993c98"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#af8f724af7210b52529216feefa993c98">armnn::QLstmDescriptor::m_HiddenStateScale</a></div><div class="ttdeci">float m_HiddenStateScale</div><div class="ttdoc">Hidden State quantization scale.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01415">Descriptors.hpp:1415</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_ac81fb0e66dc623dc37c77f219f53a6d3"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#ac81fb0e66dc623dc37c77f219f53a6d3">armnn::QLstmDescriptor::m_CellClip</a></div><div class="ttdeci">float m_CellClip</div><div class="ttdoc">Clipping threshold value for the cell state.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01393">Descriptors.hpp:1393</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_af8f724af7210b52529216feefa993c98"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#af8f724af7210b52529216feefa993c98">armnn::QLstmDescriptor::m_HiddenStateScale</a></div><div class="ttdeci">float m_HiddenStateScale</div><div class="ttdoc">Hidden State quantization scale.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01436">Descriptors.hpp:1436</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_ac81fb0e66dc623dc37c77f219f53a6d3"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#ac81fb0e66dc623dc37c77f219f53a6d3">armnn::QLstmDescriptor::m_CellClip</a></div><div class="ttdeci">float m_CellClip</div><div class="ttdoc">Clipping threshold value for the cell state.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01414">Descriptors.hpp:1414</a></div></div> <div class="ttc" id="anamespacearmnn_html_a7636fbbc4f8ea2d0cf9f3ac2d12a4c62"><div class="ttname"><a href="namespacearmnn.html#a7636fbbc4f8ea2d0cf9f3ac2d12a4c62">armnn::Activation</a></div><div class="ttdeci">float Activation(float in, ActivationFunction function, float a, float b)</div><div class="ttdef"><b>Definition:</b> <a href="_activation_8cpp_source.html#l00013">Activation.cpp:13</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a4a8ec49f130084445d44297549254780"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a4a8ec49f130084445d44297549254780">armnn::QLstmDescriptor::m_LayerNormEnabled</a></div><div class="ttdeci">bool m_LayerNormEnabled</div><div class="ttdoc">Enable/disable layer normalization.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01403">Descriptors.hpp:1403</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a4a8ec49f130084445d44297549254780"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a4a8ec49f130084445d44297549254780">armnn::QLstmDescriptor::m_LayerNormEnabled</a></div><div class="ttdeci">bool m_LayerNormEnabled</div><div class="ttdoc">Enable/disable layer normalization.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01424">Descriptors.hpp:1424</a></div></div> <div class="ttc" id="a_lstm_utils_8hpp_html"><div class="ttname"><a href="_lstm_utils_8hpp.html">LstmUtils.hpp</a></div></div> <div class="ttc" id="aclassarmnn_1_1_tensor_info_html_a770b51078da02f44a819e9f95d8058b5"><div class="ttname"><a href="classarmnn_1_1_tensor_info.html#a770b51078da02f44a819e9f95d8058b5">armnn::TensorInfo::GetQuantizationOffset</a></div><div class="ttdeci">int32_t GetQuantizationOffset() const</div><div class="ttdef"><b>Definition:</b> <a href="_tensor_8cpp_source.html#l00478">Tensor.cpp:478</a></div></div> <div class="ttc" id="a_encoders_8hpp_html"><div class="ttname"><a href="_encoders_8hpp.html">Encoders.hpp</a></div></div> <div class="ttc" id="aclassarmnn_1_1_ref_base_workload_html"><div class="ttname"><a href="classarmnn_1_1_ref_base_workload.html">armnn::RefBaseWorkload</a></div><div class="ttdef"><b>Definition:</b> <a href="_ref_base_workload_8hpp_source.html#l00013">RefBaseWorkload.hpp:13</a></div></div> -<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a2837b4396f20c956952d1a7286cab5f8"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a2837b4396f20c956952d1a7286cab5f8">armnn::QLstmDescriptor::m_PeepholeEnabled</a></div><div class="ttdeci">bool m_PeepholeEnabled</div><div class="ttdoc">Enable/disable peephole.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01399">Descriptors.hpp:1399</a></div></div> +<div class="ttc" id="astructarmnn_1_1_q_lstm_descriptor_html_a2837b4396f20c956952d1a7286cab5f8"><div class="ttname"><a href="structarmnn_1_1_q_lstm_descriptor.html#a2837b4396f20c956952d1a7286cab5f8">armnn::QLstmDescriptor::m_PeepholeEnabled</a></div><div class="ttdeci">bool m_PeepholeEnabled</div><div class="ttdoc">Enable/disable peephole.</div><div class="ttdef"><b>Definition:</b> <a href="_descriptors_8hpp_source.html#l01420">Descriptors.hpp:1420</a></div></div> <div class="ttc" id="aclassarmnn_1_1_ref_q_lstm_workload_html_ae1c43d025fc90382d7aff7a500937e2c"><div class="ttname"><a href="classarmnn_1_1_ref_q_lstm_workload.html#ae1c43d025fc90382d7aff7a500937e2c">armnn::RefQLstmWorkload::ExecuteAsync</a></div><div class="ttdeci">void ExecuteAsync(ExecutionData &executionData) override</div><div class="ttdef"><b>Definition:</b> <a href="_ref_q_lstm_workload_8cpp_source.html#l00051">RefQLstmWorkload.cpp:51</a></div></div> <div class="ttc" id="astructarmnn_1_1experimental_1_1_working_mem_descriptor_html_a6abd491bb99ffe88bd472c1ae5a1ed1a"><div class="ttname"><a href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html#a6abd491bb99ffe88bd472c1ae5a1ed1a">armnn::experimental::WorkingMemDescriptor::m_Outputs</a></div><div class="ttdeci">std::vector< ITensorHandle * > m_Outputs</div><div class="ttdef"><b>Definition:</b> <a href="_working_mem_descriptor_8hpp_source.html#l00021">WorkingMemDescriptor.hpp:21</a></div></div> <div class="ttc" id="astructarmnn_1_1_queue_descriptor_html_a4b50e46a6810018f3edecfb68b2a76b3"><div class="ttname"><a href="structarmnn_1_1_queue_descriptor.html#a4b50e46a6810018f3edecfb68b2a76b3">armnn::QueueDescriptor::m_Inputs</a></div><div class="ttdeci">std::vector< ITensorHandle * > m_Inputs</div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.html#l00026">WorkloadData.hpp:26</a></div></div> @@ -714,7 +714,7 @@ $(document).ready(function(){initNavTree('_ref_q_lstm_workload_8cpp_source.html' <div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> <ul> <li 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