MLCE-347 'REDUCE_MIN, REDUCE_MAX, REDUCE_SUM Support'

* Added TfLiteParser support for REDUCE_MIN and REDUCE_MAX operators
* Added ACL workloads support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators
* Added TfLite Delegate support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I8085d59946bfd4ab78a59a61f899031ae53371a8

5 files changed, 695 insertions, 0 deletions

diff --git a/delegate/CMakeLists.txt b/delegate/CMakeLists.txt
index 777702e0b4..74390c8a93 100644
--- a/delegate/CMakeLists.txt
+++ b/delegate/CMakeLists.txt
@@ -37,6 +37,7 @@ list(APPEND armnnDelegate_sources
         src/Pooling.hpp
         src/Quantization.hpp
         src/Redefine.hpp
+        src/Reduce.hpp
         src/Resize.hpp
         src/Round.hpp
         src/Slice.hpp
@@ -143,6 +144,8 @@ if(BUILD_UNIT_TESTS)
         src/test/QuantizationTest.cpp
         src/test/QuantizationTestHelper.hpp
         src/test/RedefineTestHelper.hpp
+        src/test/ReduceTest.cpp
+        src/test/ReduceTestHelper.hpp
         src/test/ReshapeTest.cpp
         src/test/ResizeTest.cpp
         src/test/ResizeTestHelper.hpp
diff --git a/delegate/src/Reduce.hpp b/delegate/src/Reduce.hpp
new file mode 100644
index 0000000000..13a11d3e61
--- /dev/null
+++ b/delegate/src/Reduce.hpp
@@ -0,0 +1,133 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <tensorflow/lite/builtin_ops.h>
+#include <tensorflow/lite/c/builtin_op_data.h>
+#include <tensorflow/lite/c/common.h>
+#include <tensorflow/lite/kernels/internal/tensor_ctypes.h>
+#include <tensorflow/lite/minimal_logging.h>
+
+namespace armnnDelegate
+{
+
+TfLiteStatus VisitReduceOperator(DelegateData& delegateData,
+                                 TfLiteContext* tfLiteContext,
+                                 TfLiteNode* tfLiteNode,
+                                 int nodeIndex,
+                                 int32_t reduceOperatorCode)
+{
+    TF_LITE_ENSURE_STATUS(ValidateNumInputs(tfLiteContext, tfLiteNode, 2, nodeIndex));
+    TF_LITE_ENSURE_STATUS(ValidateNumOutputs(tfLiteContext, tfLiteNode, 1, nodeIndex));
+
+    const TfLiteTensor* tfLiteTensors = tfLiteContext->tensors;
+    const TfLiteTensor& tfLiteInputTensor = tfLiteTensors[tfLiteNode->inputs->data[0]];
+    if (!IsValid(tfLiteContext, tfLiteInputTensor, reduceOperatorCode, nodeIndex))
+    {
+        return kTfLiteError;
+    }
+
+    const TfLiteTensor& tfLiteOutputTensor = tfLiteTensors[tfLiteNode->outputs->data[0]];
+    if (!IsValid(tfLiteContext, tfLiteOutputTensor, reduceOperatorCode, nodeIndex))
+    {
+        return kTfLiteError;
+    }
+
+    const armnn::TensorInfo& inputTensorInfo  = GetTensorInfoForTfLiteTensor(tfLiteInputTensor);
+    const armnn::TensorInfo& outputTensorInfo = GetTensorInfoForTfLiteTensor(tfLiteOutputTensor);
+
+    // Get const axis value from model and set it to descriptor.
+    const TfLiteTensor& tfLiteAxisTensor = tfLiteTensors[tfLiteNode->inputs->data[1]];
+    if (!IsValid(tfLiteContext, tfLiteAxisTensor, reduceOperatorCode, nodeIndex))
+    {
+        return kTfLiteError;
+    }
+
+    const armnn::TensorInfo& axisTensorInfo =   GetTensorInfoForTfLiteTensor(tfLiteAxisTensor);
+    auto* axisTensorData = tflite::GetTensorData<int32_t>(&tfLiteAxisTensor);
+
+    std::vector<int32_t> axis;
+    // Add axis data to vector to be converter to unsigned int and assigned to descriptor axis.
+    if (axisTensorData != nullptr)
+    {
+        for (unsigned int i = 0; i < axisTensorInfo.GetNumElements(); ++i)
+        {
+            axis.emplace_back(axisTensorData[i]);
+        }
+    }
+    else
+    {
+        for (unsigned int i = 0; i < inputTensorInfo.GetNumDimensions(); ++i)
+        {
+            axis.push_back(i);
+        }
+    }
+
+    // Convert the axis to unsigned int and remove duplicates.
+    unsigned int rank = inputTensorInfo.GetNumDimensions();
+    std::set<unsigned int> uniqueAxis;
+    std::transform(axis.begin(),
+                   axis.end(),
+                   std::inserter(uniqueAxis, uniqueAxis.begin()),
+                   [rank](int i)->unsigned int{ return (i + rank) % rank; });
+
+    armnn::ReduceDescriptor desc;
+    desc.m_vAxis.assign(uniqueAxis.begin(), uniqueAxis.end());
+
+    auto* reducerParameters = reinterpret_cast<TfLiteReducerParams*>(tfLiteNode->builtin_data);
+    desc.m_KeepDims = reducerParameters->keep_dims;
+    if (reduceOperatorCode == kTfLiteBuiltinReduceMax)
+    {
+        desc.m_ReduceOperation = armnn::ReduceOperation::Max;
+    }
+    else if (reduceOperatorCode == kTfLiteBuiltinReduceMin)
+    {
+        desc.m_ReduceOperation = armnn::ReduceOperation::Min;
+    }
+    else if (reduceOperatorCode == kTfLiteBuiltinSum)
+    {
+        desc.m_ReduceOperation = armnn::ReduceOperation::Sum;
+    }
+    else
+    {
+        TF_LITE_MAYBE_KERNEL_LOG(
+            tfLiteContext,
+            "TfLiteArmnnDelegate: Unsupported Reduction Operator #%d node #%d: ",
+            reduceOperatorCode, nodeIndex);
+        return kTfLiteError;
+    }
+
+    bool isSupported = false;
+    auto validateFunc = [&](const armnn::TensorInfo& outInfo, bool& isSupported)
+    {
+        FORWARD_LAYER_SUPPORT_FUNC(__func__,
+                                   tfLiteContext,
+                                   IsReduceSupported,
+                                   delegateData.m_Backends,
+                                   isSupported,
+                                   inputTensorInfo,
+                                   outInfo,
+                                   desc);
+    };
+
+    if (!delegateData.m_Network)
+    {
+        validateFunc(outputTensorInfo, isSupported);
+        return isSupported ? kTfLiteOk : kTfLiteError;
+    }
+
+    // Add an Reduce layer
+    armnn::IConnectableLayer* layer = delegateData.m_Network->AddReduceLayer(desc);
+    ARMNN_ASSERT(layer != nullptr);
+
+    armnn::IOutputSlot& outputSlot = layer->GetOutputSlot(0);
+    outputSlot.SetTensorInfo(outputTensorInfo);
+
+    // Connect
+    return Connect(layer, tfLiteNode, delegateData);
+}
+
+} // namespace armnnDelegate
diff --git a/delegate/src/armnn_delegate.cpp b/delegate/src/armnn_delegate.cpp
index 3ebc0cc6b5..2b07fc7098 100644
--- a/delegate/src/armnn_delegate.cpp
+++ b/delegate/src/armnn_delegate.cpp
@@ -25,6 +25,7 @@
 #include "Pooling.hpp"
 #include "Quantization.hpp"
 #include "Redefine.hpp"
+#include "Reduce.hpp"
 #include "Resize.hpp"
 #include "Round.hpp"
 #include "Slice.hpp"
@@ -733,6 +734,18 @@ TfLiteStatus ArmnnSubgraph::VisitNode(DelegateData& delegateData,
                                         tfLiteNode,
                                         nodeIndex,
                                         kTfLiteBuiltinRank);
+        case kTfLiteBuiltinReduceMax:
+            return VisitReduceOperator(delegateData,
+                                       tfLiteContext,
+                                       tfLiteNode,
+                                       nodeIndex,
+                                       kTfLiteBuiltinReduceMax);
+        case kTfLiteBuiltinReduceMin:
+            return VisitReduceOperator(delegateData,
+                                       tfLiteContext,
+                                       tfLiteNode,
+                                       nodeIndex,
+                                       kTfLiteBuiltinReduceMin);
         case kTfLiteBuiltinRelu:
             return VisitActivationOperator(delegateData,
                                            tfLiteContext,
@@ -805,6 +818,12 @@ TfLiteStatus ArmnnSubgraph::VisitNode(DelegateData& delegateData,
                                       tfLiteNode,
                                       nodeIndex,
                                       kTfLiteBuiltinStridedSlice);
+        case kTfLiteBuiltinSum:
+            return VisitReduceOperator(delegateData,
+                                       tfLiteContext,
+                                       tfLiteNode,
+                                       nodeIndex,
+                                       kTfLiteBuiltinSum);
         case kTfLiteBuiltinTranspose:
             return VisitTransposeOperator(delegateData,
                                           tfLiteContext,
diff --git a/delegate/src/test/ReduceTest.cpp b/delegate/src/test/ReduceTest.cpp
new file mode 100644
index 0000000000..49608b6a2c
--- /dev/null
+++ b/delegate/src/test/ReduceTest.cpp
@@ -0,0 +1,354 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ReduceTestHelper.hpp"
+
+#include <armnn_delegate.hpp>
+
+#include <flatbuffers/flatbuffers.h>
+#include <tensorflow/lite/schema/schema_generated.h>
+
+#include <doctest/doctest.h>
+
+namespace armnnDelegate
+{
+
+void ReduceUint8KeepDimsTest(tflite::BuiltinOperator reduceOperatorCode,
+                             std::vector<armnn::BackendId>& backends,
+                             std::vector<uint8_t>& expectedOutputValues)
+{
+    std::vector<int32_t> input0Shape { 1, 1, 2, 3 };
+    std::vector<int32_t> input1Shape { 1 };
+    std::vector<int32_t> expectedOutputShape { 1, 1, 1, 3 };
+
+    std::vector<uint8_t> input0Values { 1, 2, 3,
+                                        4, 3, 1  }; // Inputs
+    std::vector<int32_t> input1Values { 2 }; // Axis
+
+    ReduceTest<uint8_t>(reduceOperatorCode,
+                        ::tflite::TensorType_UINT8,
+                        backends,
+                        input0Shape,
+                        input1Shape,
+                        expectedOutputShape,
+                        input0Values,
+                        input1Values,
+                        expectedOutputValues,
+                        true);
+}
+
+void ReduceUint8Test(tflite::BuiltinOperator reduceOperatorCode,
+                     std::vector<armnn::BackendId>& backends,
+                     std::vector<uint8_t>& expectedOutputValues)
+{
+    std::vector<int32_t> input0Shape { 1, 1, 2, 3 };
+    std::vector<int32_t> input1Shape { 1 };
+    std::vector<int32_t> expectedOutputShape { 1, 1, 3 };
+
+    std::vector<uint8_t> input0Values { 1, 2, 3,
+                                        4, 3, 1 }; // Inputs
+    std::vector<int32_t> input1Values { 2 }; // Axis
+
+    ReduceTest<uint8_t>(reduceOperatorCode,
+                        ::tflite::TensorType_UINT8,
+                        backends,
+                        input0Shape,
+                        input1Shape,
+                        expectedOutputShape,
+                        input0Values,
+                        input1Values,
+                        expectedOutputValues,
+                        false);
+}
+
+void ReduceFp32KeepDimsTest(tflite::BuiltinOperator reduceOperatorCode,
+                            std::vector<armnn::BackendId>& backends,
+                            std::vector<float>& expectedOutputValues)
+{
+    std::vector<int32_t> input0Shape { 1, 1, 2, 3 };
+    std::vector<int32_t> input1Shape { 1 };
+    std::vector<int32_t> expectedOutputShape { 1, 1, 1, 3 };
+
+    std::vector<float>   input0Values { 1001.0f, 11.0f,   1003.0f,
+                                        10.0f,   1002.0f, 12.0f }; // Inputs
+    std::vector<int32_t> input1Values { 2 }; // Axis
+
+    ReduceTest<float>(reduceOperatorCode,
+                      ::tflite::TensorType_FLOAT32,
+                      backends,
+                      input0Shape,
+                      input1Shape,
+                      expectedOutputShape,
+                      input0Values,
+                      input1Values,
+                      expectedOutputValues,
+                      true);
+}
+
+void ReduceFp32Test(tflite::BuiltinOperator reduceOperatorCode,
+                    std::vector<armnn::BackendId>& backends,
+                    std::vector<float>& expectedOutputValues)
+{
+    std::vector<int32_t> input0Shape { 1, 1, 2, 3 };
+    std::vector<int32_t> input1Shape { 1 };
+    std::vector<int32_t> expectedOutputShape { 1, 1, 3 };
+
+    std::vector<float>   input0Values { 1001.0f, 11.0f,   1003.0f,
+                                        10.0f,   1002.0f, 12.0f }; // Inputs
+    std::vector<int32_t> input1Values { 2 }; // Axis
+
+    ReduceTest<float>(reduceOperatorCode,
+                      ::tflite::TensorType_FLOAT32,
+                      backends,
+                      input0Shape,
+                      input1Shape,
+                      expectedOutputShape,
+                      input0Values,
+                      input1Values,
+                      expectedOutputValues,
+                      false);
+}
+
+// REDUCE_MAX Tests
+TEST_SUITE("ReduceMax_CpuRefTests")
+{
+
+TEST_CASE ("ReduceMax_Uint8_KeepDims_CpuRef_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
+    std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
+    ReduceUint8KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
+                            backends,
+                            expectedOutputValues);
+}
+
+TEST_CASE ("ReduceMax_Uint8_CpuRef_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
+    std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
+    ReduceUint8Test(tflite::BuiltinOperator_REDUCE_MAX,
+                    backends,
+                    expectedOutputValues);
+}
+
+TEST_CASE ("ReduceMax_Fp32_KeepDims_CpuRef_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
+    std::vector<float>   expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
+    ReduceFp32KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
+                           backends,
+                           expectedOutputValues);
+}
+
+TEST_CASE ("ReduceMax_Fp32_CpuRef_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
+    std::vector<float>   expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
+    ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MAX,
+                   backends,
+                   expectedOutputValues);
+}
+
+} // End of ReduceMax_CpuRefTests
+
+TEST_SUITE("ReduceMax_CpuAccTests")
+{
+
+TEST_CASE ("ReduceMax_Uint8_KeepDims_CpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
+    std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
+    ReduceUint8KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
+                            backends,
+                            expectedOutputValues);
+}
+
+TEST_CASE ("ReduceMax_Uint8_CpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
+    std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
+    ReduceUint8Test(tflite::BuiltinOperator_REDUCE_MAX,
+                    backends,
+                    expectedOutputValues);
+}
+
+
+TEST_CASE ("ReduceMax_Fp32_KeepDims_CpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
+    std::vector<float>   expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
+    ReduceFp32KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
+                           backends,
+                           expectedOutputValues);
+}
+
+TEST_CASE ("ReduceMax_Fp32_CpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
+    std::vector<float>   expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
+    ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MAX,
+                   backends,
+                   expectedOutputValues);
+}
+
+} // End of ReduceMax_CpuAccTests
+
+TEST_SUITE("ReduceMax_GpuAccTests")
+{
+
+TEST_CASE ("ReduceMax_Uint8_KeepDims_GpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
+    std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
+    ReduceUint8KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
+                            backends,
+                            expectedOutputValues);
+}
+
+TEST_CASE ("ReduceMax_Uint8_GpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
+    std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
+    ReduceUint8Test(tflite::BuiltinOperator_REDUCE_MAX,
+                    backends,
+                    expectedOutputValues);
+}
+
+
+TEST_CASE ("ReduceMax_Fp32_KeepDims_GpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
+    std::vector<float>   expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
+    ReduceFp32KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
+                           backends,
+                           expectedOutputValues);
+}
+
+TEST_CASE ("ReduceMax_Fp32_GpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
+    std::vector<float>   expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
+    ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MAX,
+                   backends,
+                   expectedOutputValues);
+}
+
+} // End of ReduceMax_GpuAccTests
+
+// REDUCE_MIN Tests
+TEST_SUITE("ReduceMin_CpuRefTests")
+{
+
+TEST_CASE ("ReduceMin_Fp32_CpuRef_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
+    std::vector<float>   expectedOutputValues { 10.0f, 11.0f, 12.0f };
+    ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MIN,
+                   backends,
+                   expectedOutputValues);
+}
+
+} // End of ReduceMin_CpuRefTests
+
+TEST_SUITE("ReduceMin_CpuAccTests")
+{
+
+TEST_CASE ("ReduceMin_Fp32_CpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
+    std::vector<float>   expectedOutputValues { 10.0f, 11.0f, 12.0f };
+    ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MIN,
+                   backends,
+                   expectedOutputValues);
+}
+
+} // End of ReduceMin_CpuAccTests
+
+TEST_SUITE("ReduceMin_GpuAccTests")
+{
+
+TEST_CASE ("ReduceMin_Fp32_GpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
+    std::vector<float>   expectedOutputValues { 10.0f, 11.0f, 12.0f };
+    ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MIN,
+                   backends,
+                   expectedOutputValues);
+}
+
+} // End of ReduceMin_GpuAccTests
+
+// SUM Tests
+TEST_SUITE("Sum_CpuRefTests")
+{
+
+TEST_CASE ("Sum_Uint8_KeepDims_CpuRef_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
+    std::vector<uint8_t> expectedOutputValues { 5, 5, 4 };
+    ReduceUint8KeepDimsTest(tflite::BuiltinOperator_SUM,
+                            backends,
+                            expectedOutputValues);
+}
+
+TEST_CASE ("Sum_Fp32_CpuRef_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
+    std::vector<float>   expectedOutputValues { 1011.0f, 1013.0f, 1015.0f };
+    ReduceFp32Test(tflite::BuiltinOperator_SUM,
+                   backends,
+                   expectedOutputValues);
+}
+
+} // End of Sum_CpuRefTests
+
+TEST_SUITE("Sum_CpuAccTests")
+{
+
+TEST_CASE ("Sum_Uint8_KeepDims_CpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
+    std::vector<uint8_t> expectedOutputValues { 5, 5, 4 };
+    ReduceUint8KeepDimsTest(tflite::BuiltinOperator_SUM,
+                            backends,
+                            expectedOutputValues);
+}
+
+TEST_CASE ("Sum_Fp32_CpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
+    std::vector<float>   expectedOutputValues { 1011.0f, 1013.0f, 1015.0f };
+    ReduceFp32Test(tflite::BuiltinOperator_SUM,
+                   backends,
+                   expectedOutputValues);
+}
+
+} // End of Sum_CpuAccTests
+
+TEST_SUITE("Sum_GpuAccTests")
+{
+
+TEST_CASE ("Sum_Uint8_KeepDims_GpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
+    std::vector<uint8_t> expectedOutputValues { 5, 5, 4 };
+    ReduceUint8KeepDimsTest(tflite::BuiltinOperator_SUM,
+                            backends,
+                            expectedOutputValues);
+}
+
+TEST_CASE ("Sum_Fp32_GpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
+    std::vector<float>   expectedOutputValues { 1011.0f, 1013.0f, 1015.0f };
+    ReduceFp32Test(tflite::BuiltinOperator_SUM,
+                   backends,
+                   expectedOutputValues);
+}
+
+} // End of Sum_GpuAccTests
+
+
+} // namespace armnnDelegate
\ No newline at end of file
diff --git a/delegate/src/test/ReduceTestHelper.hpp b/delegate/src/test/ReduceTestHelper.hpp
new file mode 100644
index 0000000000..b41fcfa39b
--- /dev/null
+++ b/delegate/src/test/ReduceTestHelper.hpp
@@ -0,0 +1,186 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include "TestUtils.hpp"
+
+#include <armnn_delegate.hpp>
+
+#include <flatbuffers/flatbuffers.h>
+#include <tensorflow/lite/interpreter.h>
+#include <tensorflow/lite/kernels/register.h>
+#include <tensorflow/lite/model.h>
+#include <tensorflow/lite/schema/schema_generated.h>
+#include <tensorflow/lite/version.h>
+
+#include <doctest/doctest.h>
+
+#include <string>
+
+namespace
+{
+
+std::vector<char> CreateReduceTfLiteModel(tflite::BuiltinOperator reduceOperatorCode,
+                                        tflite::TensorType tensorType,
+                                        std::vector<int32_t>& input0TensorShape,
+                                        std::vector<int32_t>& input1TensorShape,
+                                        const std::vector <int32_t>& outputTensorShape,
+                                        std::vector<int32_t>& axisData,
+                                        const bool keepDims,
+                                        float quantScale = 1.0f,
+                                        int quantOffset  = 0)
+{
+    using namespace tflite;
+    flatbuffers::FlatBufferBuilder flatBufferBuilder;
+
+    std::array<flatbuffers::Offset<tflite::Buffer>, 2> buffers;
+    buffers[0] = CreateBuffer(flatBufferBuilder, flatBufferBuilder.CreateVector({}));
+    buffers[1] = CreateBuffer(flatBufferBuilder,
+                              flatBufferBuilder.CreateVector(reinterpret_cast<const uint8_t*>(axisData.data()),
+                                                             sizeof(int32_t) * axisData.size()));
+
+    auto quantizationParameters =
+            CreateQuantizationParameters(flatBufferBuilder,
+                                         0,
+                                         0,
+                                         flatBufferBuilder.CreateVector<float>({ quantScale }),
+                                         flatBufferBuilder.CreateVector<int64_t>({ quantOffset }));
+
+    std::array<flatbuffers::Offset<Tensor>, 3> tensors;
+    tensors[0] = CreateTensor(flatBufferBuilder,
+                              flatBufferBuilder.CreateVector<int32_t>(input0TensorShape.data(),
+                                                                      input0TensorShape.size()),
+                              tensorType,
+                              0,
+                              flatBufferBuilder.CreateString("input"),
+                              quantizationParameters);
+
+    tensors[1] = CreateTensor(flatBufferBuilder,
+                              flatBufferBuilder.CreateVector<int32_t>(input1TensorShape.data(),
+                                                                      input1TensorShape.size()),
+                              ::tflite::TensorType_INT32,
+                              1,
+                              flatBufferBuilder.CreateString("axis"),
+                              quantizationParameters);
+
+    // Create output tensor
+    tensors[2] = CreateTensor(flatBufferBuilder,
+                              flatBufferBuilder.CreateVector<int32_t>(outputTensorShape.data(),
+                                                                      outputTensorShape.size()),
+                              tensorType,
+                              0,
+                              flatBufferBuilder.CreateString("output"),
+                              quantizationParameters);
+
+    // Create operator. Reduce operations MIN, MAX, SUM, MEAN uses ReducerOptions.
+    tflite::BuiltinOptions operatorBuiltinOptionsType = tflite::BuiltinOptions_ReducerOptions;
+    flatbuffers::Offset<void> operatorBuiltinOptions = CreateReducerOptions(flatBufferBuilder, keepDims).Union();
+
+    const std::vector<int> operatorInputs{ {0, 1} };
+    const std::vector<int> operatorOutputs{ 2 };
+    flatbuffers::Offset <Operator> reduceOperator =
+            CreateOperator(flatBufferBuilder,
+                           0,
+                           flatBufferBuilder.CreateVector<int32_t>(operatorInputs.data(), operatorInputs.size()),
+                           flatBufferBuilder.CreateVector<int32_t>(operatorOutputs.data(), operatorOutputs.size()),
+                           operatorBuiltinOptionsType,
+                           operatorBuiltinOptions);
+
+    const std::vector<int> subgraphInputs{ {0, 1} };
+    const std::vector<int> subgraphOutputs{ 2 };
+    flatbuffers::Offset <SubGraph> subgraph =
+            CreateSubGraph(flatBufferBuilder,
+                           flatBufferBuilder.CreateVector(tensors.data(), tensors.size()),
+                           flatBufferBuilder.CreateVector<int32_t>(subgraphInputs.data(), subgraphInputs.size()),
+                           flatBufferBuilder.CreateVector<int32_t>(subgraphOutputs.data(), subgraphOutputs.size()),
+                           flatBufferBuilder.CreateVector(&reduceOperator, 1));
+
+    flatbuffers::Offset <flatbuffers::String> modelDescription =
+            flatBufferBuilder.CreateString("ArmnnDelegate: Reduce Operator Model");
+    flatbuffers::Offset <OperatorCode> operatorCode = CreateOperatorCode(flatBufferBuilder, reduceOperatorCode);
+
+    flatbuffers::Offset <Model> flatbufferModel =
+            CreateModel(flatBufferBuilder,
+                        TFLITE_SCHEMA_VERSION,
+                        flatBufferBuilder.CreateVector(&operatorCode, 1),
+                        flatBufferBuilder.CreateVector(&subgraph, 1),
+                        modelDescription,
+                        flatBufferBuilder.CreateVector(buffers.data(), buffers.size()));
+
+    flatBufferBuilder.Finish(flatbufferModel);
+
+    return std::vector<char>(flatBufferBuilder.GetBufferPointer(),
+                             flatBufferBuilder.GetBufferPointer() + flatBufferBuilder.GetSize());
+}
+
+template <typename T>
+void ReduceTest(tflite::BuiltinOperator reduceOperatorCode,
+                tflite::TensorType tensorType,
+                std::vector<armnn::BackendId>& backends,
+                std::vector<int32_t>& input0Shape,
+                std::vector<int32_t>& input1Shape,
+                std::vector<int32_t>& expectedOutputShape,
+                std::vector<T>& input0Values,
+                std::vector<int32_t>& input1Values,
+                std::vector<T>& expectedOutputValues,
+                const bool keepDims,
+                float quantScale = 1.0f,
+                int quantOffset  = 0)
+{
+    using namespace tflite;
+    std::vector<char> modelBuffer = CreateReduceTfLiteModel(reduceOperatorCode,
+                                                            tensorType,
+                                                            input0Shape,
+                                                            input1Shape,
+                                                            expectedOutputShape,
+                                                            input1Values,
+                                                            keepDims,
+                                                            quantScale,
+                                                            quantOffset);
+
+    const Model* tfLiteModel = GetModel(modelBuffer.data());
+
+    // Create TfLite Interpreters
+    std::unique_ptr<Interpreter> armnnDelegateInterpreter;
+    CHECK(InterpreterBuilder(tfLiteModel, ::tflite::ops::builtin::BuiltinOpResolver())
+                  (&armnnDelegateInterpreter) == kTfLiteOk);
+    CHECK(armnnDelegateInterpreter != nullptr);
+    CHECK(armnnDelegateInterpreter->AllocateTensors() == kTfLiteOk);
+
+    std::unique_ptr<Interpreter> tfLiteInterpreter;
+    CHECK(InterpreterBuilder(tfLiteModel, ::tflite::ops::builtin::BuiltinOpResolver())
+                  (&tfLiteInterpreter) == kTfLiteOk);
+    CHECK(tfLiteInterpreter != nullptr);
+    CHECK(tfLiteInterpreter->AllocateTensors() == kTfLiteOk);
+
+    // Create the ArmNN Delegate
+    armnnDelegate::DelegateOptions delegateOptions(backends);
+    std::unique_ptr<TfLiteDelegate, decltype(&armnnDelegate::TfLiteArmnnDelegateDelete)>
+            theArmnnDelegate(armnnDelegate::TfLiteArmnnDelegateCreate(delegateOptions),
+                             armnnDelegate::TfLiteArmnnDelegateDelete);
+    CHECK(theArmnnDelegate != nullptr);
+
+    // Modify armnnDelegateInterpreter to use armnnDelegate
+    CHECK(armnnDelegateInterpreter->ModifyGraphWithDelegate(theArmnnDelegate.get()) == kTfLiteOk);
+
+    // Set input data
+    armnnDelegate::FillInput<T>(tfLiteInterpreter, 0, input0Values);
+    armnnDelegate::FillInput<T>(armnnDelegateInterpreter, 0, input0Values);
+
+    // Run EnqueWorkload
+    CHECK(tfLiteInterpreter->Invoke() == kTfLiteOk);
+    CHECK(armnnDelegateInterpreter->Invoke() == kTfLiteOk);
+
+    // Compare output data
+    armnnDelegate::CompareOutputData<T>(tfLiteInterpreter,
+                                        armnnDelegateInterpreter,
+                                        expectedOutputShape,
+                                        expectedOutputValues);
+
+    armnnDelegateInterpreter.reset(nullptr);
+}
+
+} // anonymous namespace
\ No newline at end of file