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authorMike Kelly <mike.kelly@arm.com>2021-10-14 12:35:58 +0100
committerMike Kelly <mike.kelly@arm.com>2021-10-14 12:35:58 +0100
commite2d611e4502fb5dce8b8a398ccfc8d7ef29da96b (patch)
tree79d9178420924d57ed0ab23db46ff57159279886 /test/1.0
parent4bd8f7c96e01e081276c376fe5c34018e7b70d17 (diff)
downloadandroid-nn-driver-e2d611e4502fb5dce8b8a398ccfc8d7ef29da96b.tar.gz
IVGCVSW-6428 Remove asserts
* Changed asserts to check for errors and return appropriate values or throw exceptions * Changed unit tests to use Doctest's long macro names as the short macro names clashed with Android's Logging macros * Removed unused #includes * Clarified ambiguous #includes Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ice92a37590df727fd581d3be5ff2716665f26a13
Diffstat (limited to 'test/1.0')
-rw-r--r--test/1.0/Convolution2D.cpp13
-rw-r--r--test/1.0/FullyConnectedReshape.cpp27
-rw-r--r--test/1.0/Lstm.cpp34
3 files changed, 41 insertions, 33 deletions
diff --git a/test/1.0/Convolution2D.cpp b/test/1.0/Convolution2D.cpp
index c833d89b..2af09157 100644
--- a/test/1.0/Convolution2D.cpp
+++ b/test/1.0/Convolution2D.cpp
@@ -1,18 +1,14 @@
//
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
-#include "../DriverTestHelpers.hpp"
#include "../Convolution2D.hpp"
-#include "../../1.0/HalPolicy.hpp"
-#include <doctest/doctest.h>
#include <log/log.h>
#include <OperationsUtils.h>
-
using namespace android::hardware;
using namespace driverTestHelpers;
using namespace armnn_driver;
@@ -28,16 +24,15 @@ void SetModelFp16Flag(V1_0::Model&, bool)
} // namespace driverTestHelpers
-TEST_SUITE("Convolution2DTests_1.0")
+DOCTEST_TEST_SUITE("Convolution2DTests_1.0")
{
-
-TEST_CASE("ConvValidPadding_Hal_1_0")
+DOCTEST_TEST_CASE("ConvValidPadding_Hal_1_0")
{
PaddingTestImpl<hal_1_0::HalPolicy>(android::nn::kPaddingValid);
}
-TEST_CASE("ConvSamePadding_Hal_1_0")
+DOCTEST_TEST_CASE("ConvSamePadding_Hal_1_0")
{
PaddingTestImpl<hal_1_0::HalPolicy>(android::nn::kPaddingSame);
}
diff --git a/test/1.0/FullyConnectedReshape.cpp b/test/1.0/FullyConnectedReshape.cpp
index 4585c95b..e481f2d2 100644
--- a/test/1.0/FullyConnectedReshape.cpp
+++ b/test/1.0/FullyConnectedReshape.cpp
@@ -1,36 +1,39 @@
//
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
#include "../DriverTestHelpers.hpp"
-#include "../../1.0/FullyConnected.hpp"
-#include <doctest/doctest.h>
-
-TEST_SUITE("FullyConnectedReshapeTests")
+DOCTEST_TEST_SUITE("FullyConnectedReshapeTests")
{
-TEST_CASE("TestFlattenFullyConnectedInput")
+DOCTEST_TEST_CASE("TestFlattenFullyConnectedInput")
{
using armnn::TensorShape;
// Pass through 2d input
- CHECK(FlattenFullyConnectedInput(TensorShape({2,2048}), TensorShape({512, 2048})) == TensorShape({2, 2048}));
+ DOCTEST_CHECK(FlattenFullyConnectedInput(TensorShape({2,2048}),
+ TensorShape({512, 2048})) == TensorShape({2, 2048}));
// Trivial flattening of batched channels
- CHECK(FlattenFullyConnectedInput(TensorShape({97,1,1,2048}), TensorShape({512, 2048})) == TensorShape({97, 2048}));
+ DOCTEST_CHECK(FlattenFullyConnectedInput(TensorShape({97,1,1,2048}),
+ TensorShape({512, 2048})) == TensorShape({97, 2048}));
// Flatten single batch of rows
- CHECK(FlattenFullyConnectedInput(TensorShape({1,97,1,2048}), TensorShape({512, 2048})) == TensorShape({97, 2048}));
+ DOCTEST_CHECK(FlattenFullyConnectedInput(TensorShape({1,97,1,2048}),
+ TensorShape({512, 2048})) == TensorShape({97, 2048}));
// Flatten single batch of columns
- CHECK(FlattenFullyConnectedInput(TensorShape({1,1,97,2048}), TensorShape({512, 2048})) == TensorShape({97, 2048}));
+ DOCTEST_CHECK(FlattenFullyConnectedInput(TensorShape({1,1,97,2048}),
+ TensorShape({512, 2048})) == TensorShape({97, 2048}));
// Move batches into input dimension
- CHECK(FlattenFullyConnectedInput(TensorShape({50,1,1,10}), TensorShape({512, 20})) == TensorShape({25, 20}));
+ DOCTEST_CHECK(FlattenFullyConnectedInput(TensorShape({50,1,1,10}),
+ TensorShape({512, 20})) == TensorShape({25, 20}));
// Flatten single batch of 3D data (e.g. convolution output)
- CHECK(FlattenFullyConnectedInput(TensorShape({1,16,16,10}), TensorShape({512, 2560})) == TensorShape({1, 2560}));
+ DOCTEST_CHECK(FlattenFullyConnectedInput(TensorShape({1,16,16,10}),
+ TensorShape({512, 2560})) == TensorShape({1, 2560}));
}
}
diff --git a/test/1.0/Lstm.cpp b/test/1.0/Lstm.cpp
index 0833fd65..6b3e7042 100644
--- a/test/1.0/Lstm.cpp
+++ b/test/1.0/Lstm.cpp
@@ -1,5 +1,5 @@
//
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
@@ -7,44 +7,54 @@
using namespace armnn_driver;
-TEST_SUITE("LstmTests_1.0_CpuRef")
+DOCTEST_TEST_SUITE("LstmTests_1.0_CpuRef")
{
- TEST_CASE("LstmNoCifgNoPeepholeNoProjectionTest_1.0_armnn::Compute::CpuRef")
+
+ DOCTEST_TEST_CASE("LstmNoCifgNoPeepholeNoProjectionTest_1.0_armnn::Compute::CpuRef")
{
LstmNoCifgNoPeepholeNoProjection<hal_1_0::HalPolicy>(armnn::Compute::CpuRef);
}
- TEST_CASE("LstmCifgPeepholeNoProjectionTest_1.0_CpuRef")
+
+ DOCTEST_TEST_CASE("LstmCifgPeepholeNoProjectionTest_1.0_CpuRef")
{
LstmCifgPeepholeNoProjection<hal_1_0::HalPolicy>(armnn::Compute::CpuRef);
}
- TEST_CASE("LstmNoCifgPeepholeProjectionTest_1.0_CpuRef")
+
+ DOCTEST_TEST_CASE("LstmNoCifgPeepholeProjectionTest_1.0_CpuRef")
{
LstmNoCifgPeepholeProjection<hal_1_0::HalPolicy>(armnn::Compute::CpuRef);
}
- TEST_CASE("LstmCifgPeepholeNoProjectionBatch2Test_1.0_CpuRef")
+
+ DOCTEST_TEST_CASE("LstmCifgPeepholeNoProjectionBatch2Test_1.0_CpuRef")
{
LstmCifgPeepholeNoProjectionBatch2<hal_1_0::HalPolicy>(armnn::Compute::CpuRef);
}
+
}
#if defined(ARMCOMPUTECL_ENABLED)
-TEST_SUITE("LstmTests_1.0_GpuAcc")
+DOCTEST_TEST_SUITE("LstmTests_1.0_GpuAcc")
{
- TEST_CASE("LstmNoCifgNoPeepholeNoProjectionTest_1.0_GpuAcc")
+
+ DOCTEST_TEST_CASE("LstmNoCifgNoPeepholeNoProjectionTest_1.0_GpuAcc")
{
LstmNoCifgNoPeepholeNoProjection<hal_1_0::HalPolicy>(armnn::Compute::GpuAcc);
}
- TEST_CASE("LstmCifgPeepholeNoProjectionTest_1.0_GpuAcc")
+
+ DOCTEST_TEST_CASE("LstmCifgPeepholeNoProjectionTest_1.0_GpuAcc")
{
LstmCifgPeepholeNoProjection<hal_1_0::HalPolicy>(armnn::Compute::GpuAcc);
}
- TEST_CASE("LstmNoCifgPeepholeProjectionTest_1.0_GpuAcc")
+
+ DOCTEST_TEST_CASE("LstmNoCifgPeepholeProjectionTest_1.0_GpuAcc")
{
LstmNoCifgPeepholeProjection<hal_1_0::HalPolicy>(armnn::Compute::GpuAcc);
}
- TEST_CASE("LstmCifgPeepholeNoProjectionBatch2Test_1.0_GpuAcc")
+
+ DOCTEST_TEST_CASE("LstmCifgPeepholeNoProjectionBatch2Test_1.0_GpuAcc")
{
LstmCifgPeepholeNoProjectionBatch2<hal_1_0::HalPolicy>(armnn::Compute::GpuAcc);
}
+
}
-#endif \ No newline at end of file
+#endif