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The lines using the flattened pad values were removed,
but the flatten call remained.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I2b33945fa40ba413a657c4daaaf1820dd5b1c3d4
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Add REQUIRE statements to constrain the range where needed.
Also fix a typo.
Change-Id: I281e6249d8951b4cb3ff19eaf199660bed3feac9
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
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Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: I3b57615531eebebd356528deeb95a4930ca0b04c
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This make it easier for implementations to use variadic constructs
to implement input_list.
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: I3fcc40be30551d883ead506f5eba2aa08cc5186e
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Adds new optional element to argument 'rank'
- Must supply minimum and maximum rank
- Integer values or the level based "MAX_RANK"
- trailing modifiers allowed for "MAX_RANK"
- Displays in a new column in the document
- Document generation validates rank against specified shape
Change-Id: I507dc51bfe012d3230af43103c6c423a6f1e92b5
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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- Add additional main inference compliance test
data sets for dot product testing in Appendix A.
- Express dot product test criteria in terms of
tensors rather than individual dot products.
- Add per-operation details on test set generation
in Appendix A.
- Clarify compliance vs conformance wording.
- Clarify that the comment in the table of section 1.8.2
on integer saturation applies to the CAST from
floating point to integer operation.
Change-Id: I1b4c4493b02ed7c8a6eb547656c91ca67d4b0e86
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
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Existing logic was impossible to resolve
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I7f38ea57adb7fff9018a6f0fa8dd82453782d59b
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resize_t is already used in the type support table for RESIZE, rename
the mode enum to resize_mode_t.
Also add a python function to get an enum object by name to the spec
object.
Change-Id: Id12c10929beda469c6e3714518d6e26f18ddd440
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
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The tensor size in bytes must fit within the level
defined size range.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I131e3aa7e8666b4d0093ae8198367f243081da51
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Also make LEVEL_CHECKs unconditional in pseudocode. The various
MAX_* maximums are always defined.
Change-Id: Iee5d8ade5cba3b4f86cc09f8b867b59fe18f5cfe
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
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Also replace all instances of "co-ordinate" with "coordinate" for
consistency.
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: Idff73092711d3ff85bf4db33df92924c754cf451
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Currently used by RESIZE and AVG_POOL2D
Change-Id: I4f401ac092fcf426e6d57b3729943135f634a31e
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ie75b0ea9c820fcd26602b9e143e06245a39b5a8b
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Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Change-Id: Idc68dfee54f1855782e57a8855b4e4120e25e74d
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multiplies -> multiples
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Iab407332a4f34ad658f7c7618f5811d120f21b80
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For an operation that performs broadcast the
output shape size must be the maximum of the input shape
sizes in each dimension.
Additionally, the input dimension size must be 1 whenever
an input shape does not match the output shape size
in a dimension.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I89492f4ef22da76f84f12e720c79634ea42545bc
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Most operators use in_out_t. This removes a special case.
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: Icfc86f1101d250700677959949bda466519152de
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Change-Id: Iafa30ecfce054ce86eadfc789123009970d1886b
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Also update copyright year on license.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I6acf8b11990e436c4e2ceffa9c044a34a577a5ae
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Needed to supply bias for 16-bit convolutions
Change-Id: Iad027bf755ed2b1a530d4964288c86ec19070e6f
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Add a check on the error bias for dot
product calculations and slightly increase the
error variance bound for dot products.
Change-Id: I518704d1fb1b109695b0f90f7ca6733850e6a8c7
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
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This commit removes the maximum rank 4 restriction
from REVERSE, SLICE and TILE operations so that the
new maximum is now MAX_RANK.
In doing so some rank inconsistencies were also
cleaned up, including:
* Adding a minimum rank to the PAD op description
* Adding level limit checks to SLICE and TILE ops
* Adding checks for rank(shape1) == rank(shape)
for TILE and TRANSPOSE ops
* Add tensor_size(shape1) == tensor_size(shape)
check for TRANSPOSE
* Replace tensor name with shape name in pesudo
code where necessary
Change-Id: I94bb8ee0b6b720b2ba5a884ce9300dca6281245a
Signed-off-by: Luke Hutton <luke.hutton@arm.com>
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The accumulator size cannot be determined from the current signature,
so a new attribute is needed to describe the possible accumulator
sizes.
Change-Id: I6de81b9ef2bb62a1ca726866f6561c6ae44904aa
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This patch contains a draft of the
Main Inference profile floating-point
conformance requirements.
Change-Id: Ib1201fff7f4015668b2de6dccf4cd85b419c3f76
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
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Align with the definition for LOGICAL_RIGHT_SHIFT which was clearer.
Change-Id: I9d8f33b54fb982a09597078eb14a7730c488bcef
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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The expected output shape of RFFT2d should be (N, H, W/2+1) as
opposed to (N, H/2+1, W/2+1).
Change-Id: I66d830f1ffa86417b57572b3cd904db0290cac42
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index_t is globally defined as int32_t.
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: I86ed2d42d488fb8e7630e98e3564f14ba5664f8c
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cmp_t is only used in the definition of SELECT and always defined to bool_t.
This removes a special case in generators.
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: I9e7992bbfdf5c7fafdd55df90feb4dcbcdee2972
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Also update to version 0.51.0 draft
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: Ib0754169b96d2f3110067e0bdc0bb3f309ec1951
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In preparation for the 0.50.0 release
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Ib7cda8120da40daef4c99e4614e62734512988c3
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Condition tensors used by the control
flow operations must contain a single
element.
Change-Id: Ie3cb8f0b4a4149cee1b3aacbfa720dd4cad02fbc
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
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Add definition of Level 1.0.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I1b34ae22396f273cc5ecdf99198fdbece6e2809c
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No such attribute.
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: If1b1ece15589e9bf07971542783f51294a05aab9
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Zero-point addition after rescale is not
permitted to overflow an int32_t.
Change-Id: I7bc99a9296dce9d48abe271e68f9069425c9c270
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
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Tensor co-ordinate indices are signed 32-bit values
in this version of the specification.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I6b8dde500ef9c4c4c5688c1a43f8d658863e4a49
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The restriction on border limits in the ERROR_IF is
-16 * scale_y_n <= border_y < scale_y_n
and
scale_y_n <= (1 << 11)
Together, these imply
-(1 << 15) < border_y < (1 << 11)
which fits in 16 bits
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I843f29a5efd8ea3fe559d83d33a3280b39bc7068
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BF16 <-> FP32
FP16 <-> FP32
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I8b8d31dc5debb29b609e927a26fabe9ce71f81cd
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Change resize_t to use the same type as in_t and out_t
for floating point data.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I3214d92477688b95ba572f22d34aab3fef7d0f82
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Change-Id: I5206e59c6dd2212796a8d888d4ef8986ad1dfd2d
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Iee620079018191e3e58627c6d779b94d81d84727
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Also be consistent to use the term 'rank'
rather than 'dims'.
Change-Id: Ica827fcfd44e9735da2d1a4ddb8cb1fa04c6479b
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
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Increasing output pad values reduces the size of the output
region in the old definition. This is counter-intuitive.
This patch inverts the sign of the output pad values such
that increasing values leads to increasing pad. It also
specifies a pad limit range of output pad values that
give an output dependent on the whole input.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I47ff4ee67942aec9e728f0b42d87d20117f0b97a
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tosa.xml had the wrong mode for 16-bit MATMUL.
Change-Id: I1feeac9b9a5f61c53d64ae826aa5727da21e5dce
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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This changes the arguments for the convolution operators to
be inputs rather than attributes for all profiles.
Change-Id: I9d5fd1ae721271b881179765dc44e966208150da
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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This converts portions of the asciidoc specification into an xml
document and schema. For the html and pdf outputs, the xml is
converted to asciidoc files that are included into the existing
specification.
The xml allows future automated uses of the tosa specification
while maintaining rough compatibility with the existing document.
No significant functional changes are included in this change.
Change-Id: I7f1f95c527638e270c157d58fcdec6a3510daea5
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Check output shape matches the padded
input shape.
Signed-off-by: Dominic Symes <dominic.symes@arm.com>
Change-Id: I8e335ce9b086a36d9e38aa332ecc88782e040cc6
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Define scaling factor as a ratio of integers so
that output dimensions can be derived from input
dimensions without rounding.
Change-Id: Iddfd9ff549edf2963bf22047e8641a348cadb35f
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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The current value is too strict, and can lead to some cases to fail.
By making the new value limit between (-1 << shift-1) and (1 << shift-1),
we still restrict the input value a range that works for optimized implementations
that left shift their values before multiplying.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Ib4f49732e361418884888d398087560da3ccd6e8
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Use branch v0.30 and tag 0.30.0 for previous version.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I1469a9f631e44488142a1c0536e1d4be10153958
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Also update copyright date for specification.
Change-Id: I72d2423247f62fa304d0c0535ef33defb903b74e
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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