From 3b0544c1e7463295c49a48a162ebb9a546326829 Mon Sep 17 00:00:00 2001 From: Jeremy Johnson Date: Tue, 18 Oct 2022 16:32:19 +0100 Subject: Add TILE bool tests & rename CAST/RESCALE tests Signed-off-by: Jeremy Johnson Change-Id: If9639a94c8e7322d470a1ca97e9e95d821683629 --- verif/generator/tosa_arg_gen.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'verif/generator/tosa_arg_gen.py') diff --git a/verif/generator/tosa_arg_gen.py b/verif/generator/tosa_arg_gen.py index 791fbf7..0203513 100644 --- a/verif/generator/tosa_arg_gen.py +++ b/verif/generator/tosa_arg_gen.py @@ -1426,7 +1426,7 @@ class TosaArgGen: raise Exception("Unexpected input dtype: {}".format(inDtype)) for dtype in dtypeList: - arg_list.append(("out{}".format(DTypeNames[dtype]), [dtype])) + arg_list.append(("out{}".format(testGen.typeStr(dtype)), [dtype])) return arg_list @@ -1518,7 +1518,7 @@ class TosaArgGen: arg_list.append( ( "out{}_sc{}_dr{}_pc{}".format( - DTypeNames[outDtype], + testGen.typeStr(outDtype), int(scale32), int(double_round), int(per_channel), -- cgit v1.2.1