From 66704d5aac0819ea1755e800806b869d90552ec6 Mon Sep 17 00:00:00 2001 From: Won Jeon Date: Wed, 28 Jun 2023 22:34:38 +0000 Subject: Fix logical right shift operator for signed negative integers Signed-off-by: Won Jeon Change-Id: Id37100ba8bc2ac64b1f54788c6f765fedfab0816 --- reference_model/src/ops/ewise_binary.cc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/reference_model/src/ops/ewise_binary.cc b/reference_model/src/ops/ewise_binary.cc index e1713a0..22ace95 100644 --- a/reference_model/src/ops/ewise_binary.cc +++ b/reference_model/src/ops/ewise_binary.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2020-2023, ARM Limited. +// Copyright (c) 2020-2024, ARM Limited. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -348,21 +348,21 @@ int OpLogicalRightShift::register_fcn() this->fcn = [this](InEigenType a, InEigenType b) -> OutEigenType { REQUIRE(b >= 0 && b <= 31, "OpLogicalRightShift: shift value %d is out of valid range [0, 31]", (int32_t)b); - return static_cast(static_cast(a) >> b); + return static_cast(static_cast(static_cast(a) >> b)); }; break; case TOSA_REF_TYPE_INT16: this->fcn = [this](InEigenType a, InEigenType b) -> OutEigenType { REQUIRE(b >= 0 && b <= 31, "OpLogicalRightShift: shift value %d is out of valid range [0, 31]", (int32_t)b); - return static_cast(static_cast(a) >> b); + return static_cast(static_cast(static_cast(a) >> b)); }; break; case TOSA_REF_TYPE_INT32: this->fcn = [this](InEigenType a, InEigenType b) -> OutEigenType { REQUIRE(b >= 0 && b <= 31, "OpLogicalRightShift: shift value %d is out of valid range [0, 31]", (int32_t)b); - return static_cast(static_cast(a) >> b); + return static_cast(static_cast(static_cast(a) >> b)); }; break; default: -- cgit v1.2.1