Age | Commit message (Collapse) | Author |
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Update tensor operations naming to state input type as TxT in
all cases. Effects CONV2D, CONV3D, DEPTHWISE_CONV2D,
FULLY_CONNECTED, TRANSPOSE_CONV2D.
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ic959acfcb3aa0a910b33b774a5a85fac08219205
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Change-Id: I72f21fcfa153046274969d327313e3349981dbe6
Signed-off-by: James Ward <james.ward@arm.com>
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Add a new attribute `rank` to indicate the testing dimension range of
input tensor. Also fix a minor bug in the existing conv3d simulation.
And relax rescale operator in the reference model to support 5-D input.
Change-Id: Ib42fe513831dc83eb7f9af07e011787a6c752704
Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
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Increasing out pad values now leads to increasing pad.
Reference model changes, and test generator changes to
match specification definition
Change-Id: I4f3ebfbca5048354fb15bedc7ab640ff28ed853a
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
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Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ib6e81814e022f33e45430e47ca99d6d9f9e0e101
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Matches a corresponding change to the specification
Change-Id: If70356e0c78c1c88530e5d2f58bc50de864f249a
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Attribute stride and shift are removed, and has new scale and border.
Also add tests in the generator to test tf.resize with all option
combinations.
Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: If0f330d04395762d2d907863235eda1532f5e1ff
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In the case of an int16xint8 test, the zero point was not being
subtracted from the weights.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Ic77119b200b952715870abc11d09d1a646da86b1
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Any needed information moves into the attributes for each operator.
New serialization library version removes teh quantization information
attributes from the schema
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: Icf6165687ab1fd34a01f64c01b0b92b2820e72fa
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Rename outpad to out_pad, and also fix the dilation in the generator.
Change-Id: I4c1599871f0d0b41856e819d8c644a85ca6d8267
Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
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It is not in the spec and is being removed from serialization
Change-Id: I82a102de37d8eb75210088dfda2df9b2fadb9c74
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
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Now corresponds with the ERROR_IF in the specification
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I1f4e303c330d18661ca2e6ef65d0119baabedec6
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The operators are pool, conv, reshape, slice, transpose, and table.
Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
Change-Id: I13f8d626df59be14361068222746347ba69d2fb5
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I098daf49c92da12c07143cdd23ac9bb58acebbb9
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Update ref-model RESCALE op to support UINT16 conversions
Add testing for RESCALE UINT16 and ERROR_IFs
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ic6e6e53de1f0b054bedb9e6ba3856e7475498aba
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Bias was mistakenly unused previously.
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: If776e923f7b3cd442c7f147fcbd22a214c37fd36
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Fixes issue where pad_left < stride would cause padding
values to be missed
Signed-off-by: Eric Kunze <eric.kunze@arm.com>
Change-Id: I2ba0d0969ce1f00e2cb3ca1ab293c5e15a0c7749
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ie5d119dc317303a0d2a71d018ac94ce6800ecbf5
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Update to ref model to check ERROR_IF criteria for pooling
and convolution ops to match specification
Update to tosa_verif_build_tests to produce valid test ranges and
new ERROR_IF tests
Plus update pooling ops big kernel to 9 (from 6) for better testing
coverage and set dilation to 1 and add out_pad bottom & right for
transpose_conv2d to match specification
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ic5759872d40ae8d3f3d07043d9a0f2fa0244d72e
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And limit REDUCE_SUM test values to within int32
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I4d902b245d17eb343cfb2bbc23d9db28c1d1f4c3
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And update test generation to create values in predictable range
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I4ba1ff445bf6caeec9f8782902fc45929fe0ee77
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Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Ifa34021413cd6543c987a7b7c9c664144a4dd95d
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Previous code assumed symmetric padding when calculating the divisor for
the average pool, and had issues with extra padding.
The padding now follows the definition from the specification. Extra
padding to the right/bottom is ignored when calculating the average pool
divisor.
Change-Id: Ib05e2346c6e9d55b6fef5294322e58ee18ef4928
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Added missing reference model REQUIRE check for shift value (0-31)
Make sure result of LOGICAL_SHIFT_LEFT is masked to input size
Fixed test generation to produce shift values in that range
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Id511de0d989ea954fc1afd18dc2051341bce2cd0
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I49d498dd3d4c069d8d1db07310f939268b9df4b7
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I9ed3d8971a133b4cbb2cf7d827f4e69d55dee246
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- TRANSPOSE: move perm attribute check to compile-time checker
- TABLE: add output type checker
Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I834a5f290fbc384ef339b624060e6e5c77072c36
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- MATMUL: only check a_zp/b_zp valid when this->qinfo exists
- Fix typo in debug message
Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I2cedcb25e4f57fcaec2caa1b850ea1232a023340
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- update serialization_lib hash
- PAD:
1. make padding as an attribute instead of tensor.
2. add pad_const_int (for non-float type) / pad_const_fp (for float type)
- TRANSPOSE: make perm as an attribute instead of tensor
- TABLE: make table as attribute instead of tensor
- update examples/ tests
Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: Iddc446db4b356ba2f36ea4a79b7220b9cfc2aa4e
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I37fa4fedbeb64c1e147f2b43f45cf8e25854256c
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Change output size error_if check in ref model to match specification.
Remove size check from test generation as output shape is always
correctly calculated.
Change-Id: I5be64f31e6448b47e80fc0a4af11bb312f366a26
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: Ifd771171904d1e5a9db3ea1cae3ac9017e971c8c
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- Also delay tensor allocation after operator being validated
ERROR_IF can be caught first before 0 or negative dimension set the graph_status to UNPREDICTABLE
- Rescale, Argmax, FullyConnected, Matmul, Pad, Reshape, Slice, Transpose, Clamp, Concat, Equal, Greater, GreaterEqual, Table
Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I4e1b3e5794fe195ce1a37e28443ae584645a3b91
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I0947f136e768605f997fcaf74c6b9a7e62e748a4
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: Id0e4ec849a9cf94c9fb04ca999738cc164dbb669
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- comparison ops could have different type of input/output
- add SUBGRAPH_ERROR_IF() when operator doesn't have any output tensor
Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I10f2c10f92de1c7a979221a421fa8e86b26fcc72
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- Elementwise unary op input/output type should match.
- TOSA_UNPREDICTABLE should ONLY be sent when a tensor with negative dimension is read/written
Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I689518933a2b56cd62793e3f28ea66a6e57b057c
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- Also replace SIMPLE_FATAL_ERROR() with FATAL_ERROR() since they're duplicate
- Replace FATAL_ERROR()/ASSERT_MSG() with ERROR_IF_SUBGRAPH() if the condition is a graph error
FATAL_ERROR()/ASSERT() should only be used by model internal/runtime error like file reading.
Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: If1e1e2488054a0ecd800fb0f2ea6487019282500
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: Iaac727159a84de1f83de549c3a22704096f46bf9
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I14bec5020c91f7abd6c1adc31068a22961330a97
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Change-Id: Ib70f6bdbfacfe125283821f1e3858542b05c60ad
Signed-off-by: Matthew Haddon <matthew.haddon@arm.com>
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: Iccbabe4298de4bd681115e273c16c48ea6d3028e
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: Ic16e918b1a2423ad563684e29ce70d9efdbf9c02
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I466dd1dcf5230e8e07df202ba88515e775e04a1e
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Change-Id: I358fbd4c958e057687f25d585eb8fdd80fd9ae42
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
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* In line with the TOSA spec the DIV operator has been renamed INTDIV
Signed-off-by: Matthew Haddon <matthew.haddon@arm.com>
Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I1dc6e88220ef26b24487675600b6cd1e5bb8b0f7
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or ERROR_IF()
- Adding return code enum class: {VALID, UNPREDICTABLE, ERROR}
- Runtime errors (e.g. memory allocation failure) will abort immediately, or will return one of the three return codes
Part of the codes are re-written to pass REQUIRE() to the top-level (e.g. apply_scale_32/16())
- Update setExpectedFailure() to setExpectedReturnCode() on test generation script
- Update test regression script to interface with reference model change
Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: Ia063c936bcb2a54d6e379a5bb6801aa72d1186f1
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: I83f75dd5beb60fe7ca2d573ea0f81bac4cd62a07
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Signed-off-by: Kevin Cheng <kevin.cheng@arm.com>
Change-Id: If577035d71c5f9970df5b6a78640a3028c3f83c0
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- remove identityN and placeholder
- add div
- update serialization_lib hash
- update apply_scale_16() assertion
- regenerate examples/ due to serialization_lib change
Change-Id: I7183d92bec33697c65adfc07cb8eb89c6882675a
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