aboutsummaryrefslogtreecommitdiff
path: root/verif
diff options
context:
space:
mode:
authorJerry Ge <jerry.ge@arm.com>2022-08-12 16:12:40 -0700
committerJerry Ge <jerry.ge@arm.com>2022-08-24 23:52:00 +0100
commitd511f9e604c3e2b915d6f6b7a4975b23ac06041d (patch)
tree01e2b6be77e1f84a1e3be941481b87ef30a8e462 /verif
parent286f834ce60e4ebcaaf131cb7da97ebf79098fa0 (diff)
downloadreference_model-d511f9e604c3e2b915d6f6b7a4975b23ac06041d.tar.gz
Enabled 16-bit TABLE REQUIRE statement
Signed-off-by: Jerry Ge <jerry.ge@arm.com> Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: Ib6e81814e022f33e45430e47ca99d6d9f9e0e101
Diffstat (limited to 'verif')
-rw-r--r--verif/generator/tosa_arg_gen.py11
1 files changed, 10 insertions, 1 deletions
diff --git a/verif/generator/tosa_arg_gen.py b/verif/generator/tosa_arg_gen.py
index 2181735..2596bec 100644
--- a/verif/generator/tosa_arg_gen.py
+++ b/verif/generator/tosa_arg_gen.py
@@ -1879,7 +1879,16 @@ class TosaArgGen:
table = np.int32(
testGen.rng.integers(low=-32768, high=32768, size=[513])
).tolist()
-
+ # Make sure all slopes are within REQUIRE min/max 16-bit int
+ for idx in range(len(table) - 1):
+ slope = table[idx + 1] - table[idx]
+ # Alter the next table entry to force the slope to be ok
+ if slope > 32767:
+ table[idx + 1] -= slope - 32767
+ if slope < -32768:
+ table[idx + 1] -= slope + 32768
+ slope = table[idx + 1] - table[idx]
+ assert slope <= 32767 and slope >= -32768
arg_list.append(
(
"",