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| author | James Ward <james.ward@arm.com> | 2023-02-09 16:58:11 +0000 |
|---|---|---|
| committer | Eric Kunze <eric.kunze@arm.com> | 2023-02-22 16:28:53 +0000 |
| commit | 9bcb0878be85d1f84a0beee9c4c8d920ce80d825 (patch) | |
| tree | e75e79ec2fea1f5a1c1b8e5723c472ab31903b9c /operators/tensor/transpose_conv2d_3x3/transpose_conv2d_3x3_1x11x33x3_i8xi4_acci32_st11_pad-2-2-2-2_os1x9x31x14/test.json | |
| parent | dca402e71ab73c9e5843eb5a1cba4c380f8874a9 (diff) | |
| download | conformance_tests-9bcb0878be85d1f84a0beee9c4c8d920ce80d825.tar.gz | |
Regen for max-batch-size/ofm_depth bug fixes
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: Ic3450f7fe401db64b8979577169d425d29a0e29d
Diffstat (limited to 'operators/tensor/transpose_conv2d_3x3/transpose_conv2d_3x3_1x11x33x3_i8xi4_acci32_st11_pad-2-2-2-2_os1x9x31x14/test.json')
| -rw-r--r-- | operators/tensor/transpose_conv2d_3x3/transpose_conv2d_3x3_1x11x33x3_i8xi4_acci32_st11_pad-2-2-2-2_os1x9x31x14/test.json | 366 |
1 files changed, 366 insertions, 0 deletions
diff --git a/operators/tensor/transpose_conv2d_3x3/transpose_conv2d_3x3_1x11x33x3_i8xi4_acci32_st11_pad-2-2-2-2_os1x9x31x14/test.json b/operators/tensor/transpose_conv2d_3x3/transpose_conv2d_3x3_1x11x33x3_i8xi4_acci32_st11_pad-2-2-2-2_os1x9x31x14/test.json new file mode 100644 index 000000000..390105b1f --- /dev/null +++ b/operators/tensor/transpose_conv2d_3x3/transpose_conv2d_3x3_1x11x33x3_i8xi4_acci32_st11_pad-2-2-2-2_os1x9x31x14/test.json @@ -0,0 +1,366 @@ +{ + version: { + _major: 0, + _minor: 51, + _patch: 0, + _draft: true + }, + regions: [ + { + name: "main", + blocks: [ + { + name: "main", + operators: [ + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-1" + ] + }, + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-2" + ] + }, + { + op: "TRANSPOSE_CONV2D", + attribute_type: "TransposeConvAttribute", + attribute: { + out_pad: [ + -2, + -2, + -2, + -2 + ], + stride: [ + 1, + 1 + ], + output_shape: [ + 1, + 9, + 31, + 14 + ], + input_zp: 121, + weight_zp: 0 + }, + inputs: [ + "input-0", + "const-1", + "const-2" + ], + outputs: [ + "result-0" + ] + } + ], + tensors: [ + { + name: "input-0", + shape: [ + 1, + 11, + 33, + 3 + ], + type: "INT8" + }, + { + name: "const-1", + shape: [ + 14, + 3, + 3, + 3 + ], + type: "INT4", + data: [ + 6, + 113, + 171, + 226, + 209, + 207, + 34, + 227, + 223, + 178, + 234, + 114, + 108, + 172, + 43, + 14, + 61, + 113, + 160, + 21, + 172, + 237, + 251, + 161, + 201, + 21, + 192, + 49, + 44, + 10, + 19, + 215, + 25, + 215, + 101, + 171, + 205, + 199, + 70, + 246, + 19, + 208, + 220, + 45, + 58, + 3, + 54, + 66, + 161, + 195, + 41, + 109, + 94, + 21, + 253, + 154, + 105, + 74, + 215, + 12, + 193, + 111, + 255, + 93, + 39, + 12, + 107, + 182, + 144, + 32, + 100, + 183, + 195, + 228, + 98, + 86, + 127, + 73, + 236, + 150, + 44, + 103, + 241, + 238, + 68, + 237, + 69, + 192, + 44, + 19, + 241, + 212, + 34, + 124, + 212, + 157, + 111, + 157, + 159, + 180, + 78, + 172, + 4, + 186, + 22, + 12, + 215, + 28, + 213, + 90, + 101, + 14, + 160, + 210, + 86, + 204, + 170, + 127, + 16, + 255, + 96, + 25, + 1, + 223, + 63, + 61, + 181, + 66, + 244, + 253, + 100, + 177, + 10, + 240, + 36, + 192, + 195, + 151, + 91, + 167, + 43, + 151, + 30, + 194, + 41, + 71, + 118, + 67, + 123, + 98, + 215, + 228, + 250, + 224, + 79, + 227, + 99, + 22, + 213, + 91, + 51, + 212, + 109, + 244, + 175, + 89, + 62, + 150, + 189, + 96, + 156, + 19, + 147, + 92, + 189, + 23, + 119, + 43, + 243, + 229, + 121, + 17, + 116, + 146, + 94, + 180, + 235, + 37, + 83 + ] + }, + { + name: "const-2", + shape: [ + 14 + ], + type: "INT32", + data: [ + 164, + 236, + 45, + 209, + 200, + 246, + 148, + 17, + 161, + 74, + 22, + 0, + 12, + 255, + 200, + 154, + 119, + 89, + 136, + 211, + 185, + 59, + 9, + 129, + 208, + 16, + 188, + 209, + 236, + 100, + 80, + 95, + 99, + 174, + 75, + 146, + 213, + 45, + 46, + 198, + 12, + 139, + 193, + 1, + 52, + 241, + 205, + 43, + 7, + 94, + 204, + 151, + 145, + 64, + 153, + 70 + ] + }, + { + name: "result-0", + shape: [ + 1, + 9, + 31, + 14 + ], + type: "INT32" + } + ], + inputs: [ + "input-0" + ], + outputs: [ + "result-0" + ] + } + ] + } + ] +} |