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author | James Ward <james.ward@arm.com> | 2023-02-07 20:10:48 +0000 |
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committer | James Ward <james.ward@arm.com> | 2023-02-20 11:12:45 +0000 |
commit | dca402e71ab73c9e5843eb5a1cba4c380f8874a9 (patch) | |
tree | 4085e4c3262be4bbfa371702d50956599d663541 /operators/tensor/depthwise_conv2d_5x5/depthwise_conv2d_5x5_1x17x31x4_f16xf16_accf32_st21_pad0090_dilat21/test.json | |
parent | 2e5ae1b56c08821a5e0dd7dac40d0a6d73acbadc (diff) | |
download | conformance_tests-dca402e71ab73c9e5843eb5a1cba4c380f8874a9.tar.gz |
Create MI tests for Tensors: DEPTHWISE_CONV2D
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I1f414a68c4f532b3315ec5ffab932dd3d70407b5
Diffstat (limited to 'operators/tensor/depthwise_conv2d_5x5/depthwise_conv2d_5x5_1x17x31x4_f16xf16_accf32_st21_pad0090_dilat21/test.json')
-rw-r--r-- | operators/tensor/depthwise_conv2d_5x5/depthwise_conv2d_5x5_1x17x31x4_f16xf16_accf32_st21_pad0090_dilat21/test.json | 551 |
1 files changed, 551 insertions, 0 deletions
diff --git a/operators/tensor/depthwise_conv2d_5x5/depthwise_conv2d_5x5_1x17x31x4_f16xf16_accf32_st21_pad0090_dilat21/test.json b/operators/tensor/depthwise_conv2d_5x5/depthwise_conv2d_5x5_1x17x31x4_f16xf16_accf32_st21_pad0090_dilat21/test.json new file mode 100644 index 000000000..f9dc8aa69 --- /dev/null +++ b/operators/tensor/depthwise_conv2d_5x5/depthwise_conv2d_5x5_1x17x31x4_f16xf16_accf32_st21_pad0090_dilat21/test.json @@ -0,0 +1,551 @@ +{ + version: { + _major: 0, + _minor: 51, + _patch: 0, + _draft: true + }, + regions: [ + { + name: "main", + blocks: [ + { + name: "main", + operators: [ + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-1" + ] + }, + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-2" + ] + }, + { + op: "DEPTHWISE_CONV2D", + attribute_type: "ConvAttribute", + attribute: { + pad: [ + 0, + 0, + 9, + 0 + ], + stride: [ + 2, + 1 + ], + dilation: [ + 2, + 1 + ], + input_zp: 0, + weight_zp: 0 + }, + inputs: [ + "input-0", + "const-1", + "const-2" + ], + outputs: [ + "result-0" + ] + } + ], + tensors: [ + { + name: "input-0", + shape: [ + 1, + 17, + 31, + 4 + ], + type: "FP16" + }, + { + name: "const-1", + shape: [ + 5, + 5, + 4, + 2 + ], + type: "FP16", + data: [ + 96, + 190, + 151, + 61, + 110, + 62, + 145, + 187, + 190, + 47, + 103, + 41, + 147, + 191, + 126, + 190, + 160, + 184, + 113, + 181, + 163, + 61, + 58, + 187, + 238, + 54, + 52, + 191, + 201, + 63, + 213, + 52, + 168, + 61, + 52, + 62, + 70, + 56, + 114, + 188, + 133, + 58, + 122, + 56, + 114, + 179, + 111, + 60, + 154, + 56, + 74, + 190, + 53, + 61, + 22, + 61, + 42, + 188, + 24, + 62, + 67, + 188, + 241, + 63, + 124, + 62, + 251, + 176, + 249, + 191, + 110, + 61, + 108, + 61, + 118, + 190, + 142, + 60, + 172, + 56, + 120, + 63, + 79, + 59, + 91, + 63, + 115, + 58, + 48, + 44, + 237, + 180, + 137, + 187, + 115, + 179, + 125, + 57, + 151, + 55, + 107, + 169, + 98, + 61, + 35, + 57, + 248, + 52, + 219, + 60, + 23, + 188, + 87, + 63, + 119, + 51, + 70, + 58, + 169, + 185, + 43, + 61, + 144, + 60, + 127, + 185, + 207, + 53, + 110, + 56, + 143, + 60, + 13, + 183, + 177, + 54, + 5, + 186, + 120, + 189, + 41, + 60, + 172, + 62, + 115, + 61, + 250, + 62, + 163, + 49, + 112, + 48, + 134, + 59, + 195, + 187, + 130, + 165, + 253, + 58, + 46, + 186, + 41, + 60, + 229, + 60, + 91, + 188, + 126, + 185, + 62, + 189, + 11, + 52, + 83, + 184, + 34, + 59, + 138, + 61, + 251, + 190, + 162, + 60, + 74, + 58, + 144, + 42, + 137, + 61, + 196, + 50, + 5, + 58, + 170, + 61, + 69, + 168, + 127, + 190, + 251, + 191, + 99, + 57, + 73, + 187, + 100, + 184, + 125, + 189, + 18, + 187, + 155, + 190, + 193, + 189, + 136, + 180, + 144, + 188, + 16, + 181, + 190, + 62, + 215, + 63, + 7, + 190, + 34, + 188, + 242, + 181, + 7, + 181, + 217, + 60, + 130, + 187, + 74, + 177, + 91, + 161, + 187, + 184, + 158, + 58, + 130, + 190, + 151, + 183, + 219, + 59, + 115, + 63, + 97, + 191, + 99, + 59, + 123, + 57, + 251, + 62, + 82, + 176, + 165, + 190, + 42, + 186, + 164, + 49, + 102, + 60, + 13, + 54, + 8, + 60, + 171, + 189, + 242, + 63, + 190, + 186, + 168, + 182, + 40, + 57, + 5, + 61, + 168, + 60, + 118, + 62, + 193, + 61, + 52, + 190, + 160, + 60, + 1, + 58, + 128, + 59, + 98, + 58, + 214, + 188, + 68, + 175, + 84, + 47, + 32, + 191, + 111, + 182, + 26, + 62, + 144, + 53, + 160, + 59, + 86, + 60, + 212, + 190, + 13, + 58, + 124, + 63, + 63, + 60, + 74, + 61, + 187, + 56, + 158, + 190, + 91, + 60, + 215, + 174, + 206, + 191, + 250, + 182, + 37, + 63, + 94, + 180, + 29, + 188, + 58, + 189, + 96, + 61, + 119, + 188, + 40, + 189, + 230, + 56, + 179, + 189, + 179, + 191, + 148, + 56, + 149, + 184, + 229, + 189, + 226, + 176, + 247, + 184, + 196, + 63, + 107, + 50, + 151, + 62, + 203, + 63, + 227, + 48, + 248, + 56, + 166, + 190, + 177, + 62, + 195, + 185, + 93, + 189, + 177, + 180, + 126, + 177, + 204, + 56 + ] + }, + { + name: "const-2", + shape: [ + 8 + ], + type: "FP32", + data: [ + 49, + 146, + 150, + 190, + 166, + 139, + 247, + 191, + 96, + 32, + 169, + 190, + 224, + 118, + 97, + 62, + 126, + 192, + 162, + 63, + 192, + 88, + 128, + 189, + 185, + 125, + 151, + 63, + 227, + 214, + 196, + 190 + ] + }, + { + name: "result-0", + shape: [ + 1, + 5, + 36, + 8 + ], + type: "FP32" + } + ], + inputs: [ + "input-0" + ], + outputs: [ + "result-0" + ] + } + ] + } + ] +} |