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author | James Ward <james.ward@arm.com> | 2023-02-07 20:10:48 +0000 |
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committer | James Ward <james.ward@arm.com> | 2023-02-20 11:12:45 +0000 |
commit | dca402e71ab73c9e5843eb5a1cba4c380f8874a9 (patch) | |
tree | 4085e4c3262be4bbfa371702d50956599d663541 /operators/tensor/depthwise_conv2d_3x1/depthwise_conv2d_3x1_1x37x11x5_bf16xbf16_accf32_st81_pad9999_dilat71/test.json | |
parent | 2e5ae1b56c08821a5e0dd7dac40d0a6d73acbadc (diff) | |
download | conformance_tests-dca402e71ab73c9e5843eb5a1cba4c380f8874a9.tar.gz |
Create MI tests for Tensors: DEPTHWISE_CONV2D
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I1f414a68c4f532b3315ec5ffab932dd3d70407b5
Diffstat (limited to 'operators/tensor/depthwise_conv2d_3x1/depthwise_conv2d_3x1_1x37x11x5_bf16xbf16_accf32_st81_pad9999_dilat71/test.json')
-rw-r--r-- | operators/tensor/depthwise_conv2d_3x1/depthwise_conv2d_3x1_1x37x11x5_bf16xbf16_accf32_st81_pad9999_dilat71/test.json | 279 |
1 files changed, 279 insertions, 0 deletions
diff --git a/operators/tensor/depthwise_conv2d_3x1/depthwise_conv2d_3x1_1x37x11x5_bf16xbf16_accf32_st81_pad9999_dilat71/test.json b/operators/tensor/depthwise_conv2d_3x1/depthwise_conv2d_3x1_1x37x11x5_bf16xbf16_accf32_st81_pad9999_dilat71/test.json new file mode 100644 index 000000000..52b15c4af --- /dev/null +++ b/operators/tensor/depthwise_conv2d_3x1/depthwise_conv2d_3x1_1x37x11x5_bf16xbf16_accf32_st81_pad9999_dilat71/test.json @@ -0,0 +1,279 @@ +{ + version: { + _major: 0, + _minor: 51, + _patch: 0, + _draft: true + }, + regions: [ + { + name: "main", + blocks: [ + { + name: "main", + operators: [ + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-1" + ] + }, + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-2" + ] + }, + { + op: "DEPTHWISE_CONV2D", + attribute_type: "ConvAttribute", + attribute: { + pad: [ + 9, + 9, + 9, + 9 + ], + stride: [ + 8, + 1 + ], + dilation: [ + 7, + 1 + ], + input_zp: 0, + weight_zp: 0 + }, + inputs: [ + "input-0", + "const-1", + "const-2" + ], + outputs: [ + "result-0" + ] + } + ], + tensors: [ + { + name: "input-0", + shape: [ + 1, + 37, + 11, + 5 + ], + type: "BF16" + }, + { + name: "const-1", + shape: [ + 3, + 1, + 5, + 2 + ], + type: "BF16", + data: [ + 0, + 0, + 18, + 191, + 0, + 0, + 109, + 63, + 0, + 0, + 214, + 191, + 0, + 0, + 207, + 191, + 0, + 0, + 25, + 62, + 0, + 0, + 232, + 63, + 0, + 0, + 222, + 63, + 0, + 0, + 60, + 63, + 0, + 0, + 202, + 63, + 0, + 0, + 174, + 63, + 0, + 0, + 243, + 191, + 0, + 0, + 104, + 187, + 0, + 0, + 186, + 63, + 0, + 0, + 194, + 191, + 0, + 0, + 122, + 189, + 0, + 0, + 197, + 191, + 0, + 0, + 97, + 190, + 0, + 0, + 207, + 191, + 0, + 0, + 188, + 191, + 0, + 0, + 163, + 191, + 0, + 0, + 188, + 63, + 0, + 0, + 39, + 191, + 0, + 0, + 97, + 63, + 0, + 0, + 149, + 62, + 0, + 0, + 53, + 63, + 0, + 0, + 162, + 191, + 0, + 0, + 40, + 191, + 0, + 0, + 52, + 62, + 0, + 0, + 172, + 63, + 0, + 0, + 28, + 62 + ] + }, + { + name: "const-2", + shape: [ + 10 + ], + type: "FP32", + data: [ + 48, + 226, + 139, + 62, + 5, + 123, + 50, + 62, + 254, + 81, + 236, + 63, + 145, + 153, + 197, + 63, + 215, + 165, + 132, + 63, + 221, + 249, + 175, + 63, + 184, + 139, + 98, + 190, + 47, + 54, + 147, + 63, + 81, + 113, + 152, + 62, + 89, + 197, + 45, + 191 + ] + }, + { + name: "result-0", + shape: [ + 1, + 6, + 29, + 10 + ], + type: "FP32" + } + ], + inputs: [ + "input-0" + ], + outputs: [ + "result-0" + ] + } + ] + } + ] +} |