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author | James Ward <james.ward@arm.com> | 2023-02-07 20:10:48 +0000 |
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committer | James Ward <james.ward@arm.com> | 2023-02-20 11:12:45 +0000 |
commit | dca402e71ab73c9e5843eb5a1cba4c380f8874a9 (patch) | |
tree | 4085e4c3262be4bbfa371702d50956599d663541 /operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x37x11x5_f32xf32_accf32_st21_pad0090_dilat21/test.json | |
parent | 2e5ae1b56c08821a5e0dd7dac40d0a6d73acbadc (diff) | |
download | conformance_tests-dca402e71ab73c9e5843eb5a1cba4c380f8874a9.tar.gz |
Create MI tests for Tensors: DEPTHWISE_CONV2D
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I1f414a68c4f532b3315ec5ffab932dd3d70407b5
Diffstat (limited to 'operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x37x11x5_f32xf32_accf32_st21_pad0090_dilat21/test.json')
-rw-r--r-- | operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x37x11x5_f32xf32_accf32_st21_pad0090_dilat21/test.json | 319 |
1 files changed, 319 insertions, 0 deletions
diff --git a/operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x37x11x5_f32xf32_accf32_st21_pad0090_dilat21/test.json b/operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x37x11x5_f32xf32_accf32_st21_pad0090_dilat21/test.json new file mode 100644 index 000000000..8cb56fc69 --- /dev/null +++ b/operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x37x11x5_f32xf32_accf32_st21_pad0090_dilat21/test.json @@ -0,0 +1,319 @@ +{ + version: { + _major: 0, + _minor: 51, + _patch: 0, + _draft: true + }, + regions: [ + { + name: "main", + blocks: [ + { + name: "main", + operators: [ + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-1" + ] + }, + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-2" + ] + }, + { + op: "DEPTHWISE_CONV2D", + attribute_type: "ConvAttribute", + attribute: { + pad: [ + 0, + 0, + 9, + 0 + ], + stride: [ + 2, + 1 + ], + dilation: [ + 2, + 1 + ], + input_zp: 0, + weight_zp: 0 + }, + inputs: [ + "input-0", + "const-1", + "const-2" + ], + outputs: [ + "result-0" + ] + } + ], + tensors: [ + { + name: "input-0", + shape: [ + 1, + 37, + 11, + 5 + ], + type: "FP32" + }, + { + name: "const-1", + shape: [ + 2, + 2, + 5, + 2 + ], + type: "FP32", + data: [ + 54, + 222, + 223, + 191, + 112, + 122, + 233, + 190, + 59, + 242, + 2, + 190, + 39, + 71, + 58, + 63, + 191, + 183, + 124, + 191, + 179, + 118, + 180, + 191, + 122, + 146, + 35, + 191, + 219, + 203, + 187, + 190, + 19, + 71, + 30, + 62, + 63, + 213, + 248, + 190, + 123, + 188, + 218, + 190, + 200, + 100, + 86, + 62, + 172, + 248, + 10, + 191, + 124, + 63, + 237, + 63, + 126, + 222, + 208, + 63, + 242, + 123, + 1, + 191, + 125, + 52, + 187, + 63, + 236, + 177, + 162, + 63, + 140, + 252, + 173, + 63, + 66, + 5, + 120, + 63, + 131, + 50, + 78, + 63, + 94, + 88, + 244, + 191, + 52, + 101, + 204, + 63, + 135, + 110, + 22, + 190, + 28, + 65, + 188, + 63, + 9, + 5, + 235, + 61, + 111, + 154, + 151, + 61, + 233, + 94, + 184, + 190, + 21, + 134, + 131, + 63, + 86, + 121, + 90, + 190, + 144, + 226, + 177, + 63, + 198, + 150, + 13, + 190, + 16, + 99, + 254, + 191, + 168, + 4, + 231, + 62, + 39, + 30, + 252, + 63, + 187, + 124, + 255, + 190, + 98, + 205, + 103, + 190, + 243, + 162, + 38, + 63, + 20, + 211, + 175, + 63, + 208, + 179, + 196, + 191 + ] + }, + { + name: "const-2", + shape: [ + 10 + ], + type: "FP32", + data: [ + 183, + 243, + 220, + 63, + 132, + 140, + 164, + 190, + 97, + 13, + 94, + 190, + 119, + 78, + 246, + 191, + 122, + 11, + 156, + 63, + 63, + 17, + 221, + 191, + 169, + 81, + 177, + 63, + 2, + 142, + 137, + 191, + 44, + 143, + 186, + 191, + 9, + 193, + 140, + 63 + ] + }, + { + name: "result-0", + shape: [ + 1, + 18, + 19, + 10 + ], + type: "FP32" + } + ], + inputs: [ + "input-0" + ], + outputs: [ + "result-0" + ] + } + ] + } + ] +} |