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author | James Ward <james.ward@arm.com> | 2023-02-07 20:10:48 +0000 |
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committer | James Ward <james.ward@arm.com> | 2023-02-20 11:12:45 +0000 |
commit | dca402e71ab73c9e5843eb5a1cba4c380f8874a9 (patch) | |
tree | 4085e4c3262be4bbfa371702d50956599d663541 /operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x17x31x4_f32xf32_accf32_st11_pad0990_dilat11/test.json | |
parent | 2e5ae1b56c08821a5e0dd7dac40d0a6d73acbadc (diff) | |
download | conformance_tests-dca402e71ab73c9e5843eb5a1cba4c380f8874a9.tar.gz |
Create MI tests for Tensors: DEPTHWISE_CONV2D
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I1f414a68c4f532b3315ec5ffab932dd3d70407b5
Diffstat (limited to 'operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x17x31x4_f32xf32_accf32_st11_pad0990_dilat11/test.json')
-rw-r--r-- | operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x17x31x4_f32xf32_accf32_st11_pad0990_dilat11/test.json | 279 |
1 files changed, 279 insertions, 0 deletions
diff --git a/operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x17x31x4_f32xf32_accf32_st11_pad0990_dilat11/test.json b/operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x17x31x4_f32xf32_accf32_st11_pad0990_dilat11/test.json new file mode 100644 index 000000000..3b28c9e6d --- /dev/null +++ b/operators/tensor/depthwise_conv2d_2x2/depthwise_conv2d_2x2_1x17x31x4_f32xf32_accf32_st11_pad0990_dilat11/test.json @@ -0,0 +1,279 @@ +{ + version: { + _major: 0, + _minor: 51, + _patch: 0, + _draft: true + }, + regions: [ + { + name: "main", + blocks: [ + { + name: "main", + operators: [ + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-1" + ] + }, + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-2" + ] + }, + { + op: "DEPTHWISE_CONV2D", + attribute_type: "ConvAttribute", + attribute: { + pad: [ + 0, + 9, + 9, + 0 + ], + stride: [ + 1, + 1 + ], + dilation: [ + 1, + 1 + ], + input_zp: 0, + weight_zp: 0 + }, + inputs: [ + "input-0", + "const-1", + "const-2" + ], + outputs: [ + "result-0" + ] + } + ], + tensors: [ + { + name: "input-0", + shape: [ + 1, + 17, + 31, + 4 + ], + type: "FP32" + }, + { + name: "const-1", + shape: [ + 2, + 2, + 4, + 2 + ], + type: "FP32", + data: [ + 96, + 10, + 191, + 63, + 254, + 175, + 154, + 63, + 143, + 59, + 40, + 63, + 14, + 191, + 83, + 63, + 99, + 57, + 144, + 63, + 76, + 201, + 49, + 191, + 202, + 160, + 93, + 62, + 117, + 121, + 174, + 63, + 172, + 19, + 233, + 191, + 89, + 123, + 253, + 63, + 241, + 10, + 141, + 62, + 19, + 6, + 203, + 63, + 222, + 45, + 79, + 189, + 245, + 229, + 55, + 63, + 129, + 70, + 132, + 190, + 197, + 185, + 172, + 191, + 57, + 183, + 29, + 60, + 143, + 209, + 136, + 191, + 251, + 178, + 239, + 190, + 67, + 233, + 220, + 191, + 243, + 156, + 20, + 63, + 174, + 181, + 162, + 63, + 3, + 29, + 237, + 190, + 56, + 29, + 213, + 62, + 163, + 125, + 80, + 191, + 62, + 227, + 180, + 191, + 159, + 240, + 197, + 63, + 66, + 250, + 194, + 62, + 142, + 191, + 136, + 191, + 23, + 150, + 1, + 191, + 118, + 117, + 226, + 191, + 22, + 87, + 184, + 191 + ] + }, + { + name: "const-2", + shape: [ + 8 + ], + type: "FP32", + data: [ + 58, + 117, + 182, + 63, + 66, + 140, + 232, + 63, + 87, + 66, + 133, + 190, + 222, + 167, + 248, + 63, + 110, + 234, + 227, + 191, + 167, + 93, + 12, + 191, + 1, + 224, + 92, + 191, + 71, + 82, + 175, + 191 + ] + }, + { + name: "result-0", + shape: [ + 1, + 25, + 39, + 8 + ], + type: "FP32" + } + ], + inputs: [ + "input-0" + ], + outputs: [ + "result-0" + ] + } + ] + } + ] +} |