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| author | Jeremy Johnson <jeremy.johnson@arm.com> | 2022-11-16 14:39:55 +0000 |
|---|---|---|
| committer | Jeremy Johnson <jeremy.johnson@arm.com> | 2022-11-16 14:46:02 +0000 |
| commit | 874bb4fe493b2958a21e9a84c22828e82d4ff167 (patch) | |
| tree | 4e4a0e31a9ba5c912373ba3a0419c8c84b03688e /operators/tensor/depthwise_conv2d_1x1/depthwise_conv2d_1x1_ERRORIF_DilationSmallerOne_1x14x5x7_i8xi4_acci32_st11_pad0000_dilat-5-5/test.json | |
| parent | 7596fd972b49fecfd1c0cc0a425a5d8c64e9c33c (diff) | |
| download | conformance_tests-874bb4fe493b2958a21e9a84c22828e82d4ff167.tar.gz | |
Updating conformance files for BF16 support
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Iabe3a47a30eaea83f29b160ae2227e57ec22e96d
Diffstat (limited to 'operators/tensor/depthwise_conv2d_1x1/depthwise_conv2d_1x1_ERRORIF_DilationSmallerOne_1x14x5x7_i8xi4_acci32_st11_pad0000_dilat-5-5/test.json')
| -rw-r--r-- | operators/tensor/depthwise_conv2d_1x1/depthwise_conv2d_1x1_ERRORIF_DilationSmallerOne_1x14x5x7_i8xi4_acci32_st11_pad0000_dilat-5-5/test.json | 210 |
1 files changed, 210 insertions, 0 deletions
diff --git a/operators/tensor/depthwise_conv2d_1x1/depthwise_conv2d_1x1_ERRORIF_DilationSmallerOne_1x14x5x7_i8xi4_acci32_st11_pad0000_dilat-5-5/test.json b/operators/tensor/depthwise_conv2d_1x1/depthwise_conv2d_1x1_ERRORIF_DilationSmallerOne_1x14x5x7_i8xi4_acci32_st11_pad0000_dilat-5-5/test.json new file mode 100644 index 000000000..fd6680e98 --- /dev/null +++ b/operators/tensor/depthwise_conv2d_1x1/depthwise_conv2d_1x1_ERRORIF_DilationSmallerOne_1x14x5x7_i8xi4_acci32_st11_pad0000_dilat-5-5/test.json @@ -0,0 +1,210 @@ +{ + version: { + _major: 0, + _minor: 41, + _patch: 0, + _draft: true + }, + blocks: [ + { + name: "main", + operators: [ + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-1" + ] + }, + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-2" + ] + }, + { + op: "DEPTHWISE_CONV2D", + attribute_type: "ConvAttribute", + attribute: { + pad: [ + 0, + 0, + 0, + 0 + ], + stride: [ + 1, + 1 + ], + dilation: [ + -5, + -5 + ], + input_zp: 59, + weight_zp: 0, + accum_dtype: "INT32" + }, + inputs: [ + "input-0", + "const-1", + "const-2" + ], + outputs: [ + "result-0" + ] + } + ], + tensors: [ + { + name: "input-0", + shape: [ + 1, + 14, + 5, + 7 + ], + type: "INT8" + }, + { + name: "const-1", + shape: [ + 1, + 1, + 7, + 3 + ], + type: "INT4", + data: [ + 201, + 26, + 117, + 60, + 221, + 50, + 161, + 223, + 153, + 175, + 4 + ] + }, + { + name: "const-2", + shape: [ + 21 + ], + type: "INT32", + data: [ + 145, + 60, + 103, + 142, + 206, + 164, + 56, + 188, + 245, + 150, + 85, + 124, + 87, + 243, + 86, + 53, + 37, + 44, + 177, + 14, + 33, + 14, + 225, + 131, + 195, + 184, + 46, + 139, + 16, + 51, + 115, + 104, + 144, + 200, + 163, + 76, + 254, + 196, + 53, + 115, + 243, + 130, + 225, + 78, + 214, + 80, + 161, + 128, + 0, + 140, + 57, + 78, + 106, + 150, + 51, + 245, + 249, + 221, + 61, + 49, + 19, + 60, + 240, + 233, + 32, + 5, + 148, + 56, + 232, + 170, + 133, + 87, + 246, + 237, + 121, + 121, + 238, + 186, + 108, + 10, + 159, + 50, + 109, + 199 + ] + }, + { + name: "result-0", + shape: [ + 1, + 14, + 5, + 21 + ], + type: "INT32" + } + ], + inputs: [ + "input-0" + ], + outputs: [ + "result-0" + ] + } + ] +} |