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| author | Jeremy Johnson <jeremy.johnson@arm.com> | 2023-01-16 15:17:52 +0000 |
|---|---|---|
| committer | Jeremy Johnson <jeremy.johnson@arm.com> | 2023-01-16 16:40:57 +0000 |
| commit | b08fb3e856b7757403ff9aafc9487f9c0ad61fe7 (patch) | |
| tree | 4b4737ff52e92c1c17922a972384930953a26a61 /operators/tensor/conv3d_1x1x1/conv3d_1x1x1_ERRORIF_WrongOutputList_1x12x6x15x7_i8xi4_acci32_st111_pad000000_dilat111/test.json | |
| parent | 007a2c7c0743b002587cd5e7b4c6b6acbcaedff8 (diff) | |
| download | conformance_tests-b08fb3e856b7757403ff9aafc9487f9c0ad61fe7.tar.gz | |
Regen tests after control flow operator support
Includes removing 3 tests that are not needed anymore.
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: I2c62d95a7b053e9016000d90125e00862f94200e
Diffstat (limited to 'operators/tensor/conv3d_1x1x1/conv3d_1x1x1_ERRORIF_WrongOutputList_1x12x6x15x7_i8xi4_acci32_st111_pad000000_dilat111/test.json')
| -rw-r--r-- | operators/tensor/conv3d_1x1x1/conv3d_1x1x1_ERRORIF_WrongOutputList_1x12x6x15x7_i8xi4_acci32_st111_pad000000_dilat111/test.json | 283 |
1 files changed, 144 insertions, 139 deletions
diff --git a/operators/tensor/conv3d_1x1x1/conv3d_1x1x1_ERRORIF_WrongOutputList_1x12x6x15x7_i8xi4_acci32_st111_pad000000_dilat111/test.json b/operators/tensor/conv3d_1x1x1/conv3d_1x1x1_ERRORIF_WrongOutputList_1x12x6x15x7_i8xi4_acci32_st111_pad000000_dilat111/test.json index 13f886dde..0f66d5931 100644 --- a/operators/tensor/conv3d_1x1x1/conv3d_1x1x1_ERRORIF_WrongOutputList_1x12x6x15x7_i8xi4_acci32_st111_pad000000_dilat111/test.json +++ b/operators/tensor/conv3d_1x1x1/conv3d_1x1x1_ERRORIF_WrongOutputList_1x12x6x15x7_i8xi4_acci32_st111_pad000000_dilat111/test.json @@ -5,156 +5,161 @@ _patch: 0, _draft: true }, - blocks: [ + regions: [ { name: "main", - operators: [ + blocks: [ { - op: "CONST", - attribute_type: "NONE", - inputs: [ + name: "main", + operators: [ + { + op: "CONST", + attribute_type: "NONE", + inputs: [ - ], - outputs: [ - "const-1" - ] - }, - { - op: "CONST", - attribute_type: "NONE", - inputs: [ + ], + outputs: [ + "const-1" + ] + }, + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + ], + outputs: [ + "const-2" + ] + }, + { + op: "CONV3D", + attribute_type: "ConvAttribute", + attribute: { + pad: [ + 0, + 0, + 0, + 0, + 0, + 0 + ], + stride: [ + 1, + 1, + 1 + ], + dilation: [ + 1, + 1, + 1 + ], + input_zp: -100, + weight_zp: 0, + accum_dtype: "INT32" + }, + inputs: [ + "input-0", + "const-1", + "const-2" + ], + outputs: [ + "result-0", + "eiDummyOutput" + ] + } + ], + tensors: [ + { + name: "input-0", + shape: [ + 1, + 12, + 6, + 15, + 7 + ], + type: "INT8" + }, + { + name: "const-1", + shape: [ + 5, + 1, + 1, + 1, + 7 + ], + type: "INT4", + data: [ + 160, + 57, + 237, + 199, + 38, + 124, + 210, + 239, + 245, + 57, + 228, + 246, + 60, + 122, + 211, + 26, + 65, + 13 + ] + }, + { + name: "const-2", + shape: [ + 5 + ], + type: "INT32", + data: [ + 68, + 4, + 78, + 182, + 90, + 10, + 170, + 233, + 10, + 93, + 125, + 81, + 189, + 186, + 118, + 104, + 223, + 187, + 220, + 218 + ] + }, + { + name: "result-0", + shape: [ + 1, + 12, + 6, + 15, + 5 + ], + type: "INT32" + } ], - outputs: [ - "const-2" - ] - }, - { - op: "CONV3D", - attribute_type: "ConvAttribute", - attribute: { - pad: [ - 0, - 0, - 0, - 0, - 0, - 0 - ], - stride: [ - 1, - 1, - 1 - ], - dilation: [ - 1, - 1, - 1 - ], - input_zp: -100, - weight_zp: 0, - accum_dtype: "INT32" - }, inputs: [ - "input-0", - "const-1", - "const-2" + "input-0" ], outputs: [ - "result-0", - "eiDummyOutput" + "result-0" ] } - ], - tensors: [ - { - name: "input-0", - shape: [ - 1, - 12, - 6, - 15, - 7 - ], - type: "INT8" - }, - { - name: "const-1", - shape: [ - 5, - 1, - 1, - 1, - 7 - ], - type: "INT4", - data: [ - 160, - 57, - 237, - 199, - 38, - 124, - 210, - 239, - 245, - 57, - 228, - 246, - 60, - 122, - 211, - 26, - 65, - 13 - ] - }, - { - name: "const-2", - shape: [ - 5 - ], - type: "INT32", - data: [ - 68, - 4, - 78, - 182, - 90, - 10, - 170, - 233, - 10, - 93, - 125, - 81, - 189, - 186, - 118, - 104, - 223, - 187, - 220, - 218 - ] - }, - { - name: "result-0", - shape: [ - 1, - 12, - 6, - 15, - 5 - ], - type: "INT32" - } - ], - inputs: [ - "input-0" - ], - outputs: [ - "result-0" ] } ] |