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| author | James Ward <james.ward@arm.com> | 2023-02-28 10:27:40 +0000 |
|---|---|---|
| committer | Eric Kunze <eric.kunze@arm.com> | 2023-03-01 18:52:54 +0000 |
| commit | 98103a66940821513a58e4616105d2a4b8ed1e71 (patch) | |
| tree | 87b5bc3a147259c7113339004bfe57513d80fd06 /operators/tensor/conv2d_3x1/conv2d_3x1_1x65535x3x1_i8xi8_acci32_st81_pad0010_dilat71/test.json | |
| parent | 9e373fceb46b17c8afa7534018196cd82620f543 (diff) | |
| download | conformance_tests-98103a66940821513a58e4616105d2a4b8ed1e71.tar.gz | |
Updating CONV2D_3X1 tests for ofm_depth fix Regen
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: Ibf0e6e6078fa236fcf6e544fd6a74c52f7eeb4cb
Diffstat (limited to 'operators/tensor/conv2d_3x1/conv2d_3x1_1x65535x3x1_i8xi8_acci32_st81_pad0010_dilat71/test.json')
| -rw-r--r-- | operators/tensor/conv2d_3x1/conv2d_3x1_1x65535x3x1_i8xi8_acci32_st81_pad0010_dilat71/test.json | 154 |
1 files changed, 154 insertions, 0 deletions
diff --git a/operators/tensor/conv2d_3x1/conv2d_3x1_1x65535x3x1_i8xi8_acci32_st81_pad0010_dilat71/test.json b/operators/tensor/conv2d_3x1/conv2d_3x1_1x65535x3x1_i8xi8_acci32_st81_pad0010_dilat71/test.json new file mode 100644 index 000000000..8ea9209b8 --- /dev/null +++ b/operators/tensor/conv2d_3x1/conv2d_3x1_1x65535x3x1_i8xi8_acci32_st81_pad0010_dilat71/test.json @@ -0,0 +1,154 @@ +{ + version: { + _major: 0, + _minor: 51, + _patch: 0, + _draft: true + }, + regions: [ + { + name: "main", + blocks: [ + { + name: "main", + operators: [ + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-1" + ] + }, + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-2" + ] + }, + { + op: "CONV2D", + attribute_type: "ConvAttribute", + attribute: { + pad: [ + 0, + 0, + 1, + 0 + ], + stride: [ + 8, + 1 + ], + dilation: [ + 7, + 1 + ], + input_zp: -65, + weight_zp: 39 + }, + inputs: [ + "input-0", + "const-1", + "const-2" + ], + outputs: [ + "result-0" + ] + } + ], + tensors: [ + { + name: "input-0", + shape: [ + 1, + 65535, + 3, + 1 + ], + type: "INT8" + }, + { + name: "const-1", + shape: [ + 5, + 3, + 1, + 1 + ], + type: "INT8", + data: [ + 102, + 78, + 164, + 62, + 157, + 206, + 133, + 198, + 16, + 49, + 202, + 240, + 58, + 204, + 0 + ] + }, + { + name: "const-2", + shape: [ + 5 + ], + type: "INT32", + data: [ + 50, + 102, + 28, + 72, + 134, + 12, + 156, + 6, + 56, + 2, + 39, + 149, + 40, + 121, + 87, + 224, + 57, + 56, + 8, + 56 + ] + }, + { + name: "result-0", + shape: [ + 1, + 8191, + 4, + 5 + ], + type: "INT32" + } + ], + inputs: [ + "input-0" + ], + outputs: [ + "result-0" + ] + } + ] + } + ] +} |