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author | Jeremy Johnson <jeremy.johnson@arm.com> | 2022-10-13 13:54:26 +0100 |
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committer | Jeremy Johnson <jeremy.johnson@arm.com> | 2022-10-13 13:54:26 +0100 |
commit | ab4bb694c6df1a837be89d0271fb21377a086658 (patch) | |
tree | 3072e003a6982722bc90e16fbd3b4e1faf2cf3e9 /operators/tensor/conv2d_1x1/conv2d_1x1_ERRORIF_PadSmallerZero_1x12x10x8_i8xi4_acci32_st11_pad-4-4-4-4_dilat11/test.json | |
parent | d065e338624da04730c490bbaae208d111176f22 (diff) | |
download | conformance_tests-ab4bb694c6df1a837be89d0271fb21377a086658.tar.gz |
Updating CONV2D_1X1 tests for FP16 and accumulator types
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com>
Change-Id: Id1fb1687ffc4de1b92336ffbf65087c0d1ebf905
Diffstat (limited to 'operators/tensor/conv2d_1x1/conv2d_1x1_ERRORIF_PadSmallerZero_1x12x10x8_i8xi4_acci32_st11_pad-4-4-4-4_dilat11/test.json')
-rw-r--r-- | operators/tensor/conv2d_1x1/conv2d_1x1_ERRORIF_PadSmallerZero_1x12x10x8_i8xi4_acci32_st11_pad-4-4-4-4_dilat11/test.json | 203 |
1 files changed, 203 insertions, 0 deletions
diff --git a/operators/tensor/conv2d_1x1/conv2d_1x1_ERRORIF_PadSmallerZero_1x12x10x8_i8xi4_acci32_st11_pad-4-4-4-4_dilat11/test.json b/operators/tensor/conv2d_1x1/conv2d_1x1_ERRORIF_PadSmallerZero_1x12x10x8_i8xi4_acci32_st11_pad-4-4-4-4_dilat11/test.json new file mode 100644 index 000000000..01be250cd --- /dev/null +++ b/operators/tensor/conv2d_1x1/conv2d_1x1_ERRORIF_PadSmallerZero_1x12x10x8_i8xi4_acci32_st11_pad-4-4-4-4_dilat11/test.json @@ -0,0 +1,203 @@ +{ + version: { + _major: 0, + _minor: 41, + _patch: 0, + _draft: true + }, + blocks: [ + { + name: "main", + operators: [ + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-1" + ] + }, + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-2" + ] + }, + { + op: "CONV2D", + attribute_type: "ConvAttribute", + attribute: { + pad: [ + -4, + -4, + -4, + -4 + ], + stride: [ + 1, + 1 + ], + dilation: [ + 1, + 1 + ], + input_zp: 111, + weight_zp: 0, + accum_dtype: "INT32" + }, + inputs: [ + "input-0", + "const-1", + "const-2" + ], + outputs: [ + "result-0" + ] + } + ], + tensors: [ + { + name: "input-0", + shape: [ + 1, + 12, + 10, + 8 + ], + type: "INT8" + }, + { + name: "const-1", + shape: [ + 11, + 1, + 1, + 8 + ], + type: "INT4", + data: [ + 203, + 254, + 194, + 147, + 45, + 252, + 194, + 87, + 7, + 126, + 67, + 107, + 64, + 165, + 154, + 98, + 185, + 224, + 42, + 198, + 201, + 251, + 234, + 58, + 160, + 9, + 177, + 45, + 160, + 190, + 86, + 205, + 75, + 214, + 194, + 214, + 106, + 231, + 198, + 29, + 226, + 68, + 122, + 11 + ] + }, + { + name: "const-2", + shape: [ + 11 + ], + type: "INT32", + data: [ + 120, + 75, + 76, + 236, + 213, + 208, + 165, + 243, + 227, + 149, + 227, + 160, + 249, + 42, + 209, + 215, + 37, + 124, + 196, + 135, + 39, + 186, + 44, + 121, + 52, + 111, + 211, + 164, + 233, + 115, + 184, + 251, + 194, + 106, + 77, + 183, + 196, + 51, + 145, + 173, + 172, + 20, + 229, + 227 + ] + }, + { + name: "result-0", + shape: [ + 1, + 4, + 2, + 11 + ], + type: "INT32" + } + ], + inputs: [ + "input-0" + ], + outputs: [ + "result-0" + ] + } + ] +} |