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| author | James Ward <james.ward@arm.com> | 2023-02-28 10:26:50 +0000 |
|---|---|---|
| committer | Eric Kunze <eric.kunze@arm.com> | 2023-03-01 18:52:54 +0000 |
| commit | b48e5e1067571c4f391db1830fdbcaedc3bd14b4 (patch) | |
| tree | dd61f4f2e159cfe84cc9cd369cd67a766f15a5dd /operators/tensor/conv2d_1x1/conv2d_1x1_1x2x65536x1_i8xi4_acci32_st18_pad0001_dilat17/test.json | |
| parent | ee8c9c4e7e0d7788b5015a4b95c613bf60cd7937 (diff) | |
| download | conformance_tests-b48e5e1067571c4f391db1830fdbcaedc3bd14b4.tar.gz | |
Updating CONV2D_1X1 tests for ofm_depth fix Regen
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I9cd4cb91b2996145247028e8aafa6cf1b77aa71f
Diffstat (limited to 'operators/tensor/conv2d_1x1/conv2d_1x1_1x2x65536x1_i8xi4_acci32_st18_pad0001_dilat17/test.json')
| -rw-r--r-- | operators/tensor/conv2d_1x1/conv2d_1x1_1x2x65536x1_i8xi4_acci32_st18_pad0001_dilat17/test.json | 146 |
1 files changed, 146 insertions, 0 deletions
diff --git a/operators/tensor/conv2d_1x1/conv2d_1x1_1x2x65536x1_i8xi4_acci32_st18_pad0001_dilat17/test.json b/operators/tensor/conv2d_1x1/conv2d_1x1_1x2x65536x1_i8xi4_acci32_st18_pad0001_dilat17/test.json new file mode 100644 index 000000000..a085c4ddb --- /dev/null +++ b/operators/tensor/conv2d_1x1/conv2d_1x1_1x2x65536x1_i8xi4_acci32_st18_pad0001_dilat17/test.json @@ -0,0 +1,146 @@ +{ + version: { + _major: 0, + _minor: 51, + _patch: 0, + _draft: true + }, + regions: [ + { + name: "main", + blocks: [ + { + name: "main", + operators: [ + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-1" + ] + }, + { + op: "CONST", + attribute_type: "NONE", + inputs: [ + + ], + outputs: [ + "const-2" + ] + }, + { + op: "CONV2D", + attribute_type: "ConvAttribute", + attribute: { + pad: [ + 0, + 0, + 0, + 1 + ], + stride: [ + 1, + 8 + ], + dilation: [ + 1, + 7 + ], + input_zp: 110, + weight_zp: 0 + }, + inputs: [ + "input-0", + "const-1", + "const-2" + ], + outputs: [ + "result-0" + ] + } + ], + tensors: [ + { + name: "input-0", + shape: [ + 1, + 2, + 65536, + 1 + ], + type: "INT8" + }, + { + name: "const-1", + shape: [ + 6, + 1, + 1, + 1 + ], + type: "INT4", + data: [ + 98, + 195, + 83 + ] + }, + { + name: "const-2", + shape: [ + 6 + ], + type: "INT32", + data: [ + 50, + 196, + 13, + 205, + 28, + 191, + 93, + 185, + 198, + 115, + 201, + 50, + 21, + 146, + 67, + 57, + 49, + 245, + 143, + 195, + 154, + 87, + 85, + 144 + ] + }, + { + name: "result-0", + shape: [ + 1, + 2, + 8193, + 6 + ], + type: "INT32" + } + ], + inputs: [ + "input-0" + ], + outputs: [ + "result-0" + ] + } + ] + } + ] +} |