From ee4920b338f7d1e690377093bcfaaf0ba203bff0 Mon Sep 17 00:00:00 2001 From: Isabella Gottardi Date: Fri, 25 Feb 2022 14:29:32 +0000 Subject: MLECO-2976: Configurable Ethos-U cache size for Dedicated_Sram MLECO-2949: Platform drivers should own NPU and TA init Change-Id: I13606a0197f137816bae803eb9d7d46c358b5fb8 Signed-off-by: Isabella Gottardi --- source/hal/profiles/bare-metal/bsp/include/bsp.h | 26 ----------- .../bare-metal/bsp/include/ethosu_mem_config.h | 53 ---------------------- .../bare-metal/data_acquisition/data_acq.c | 4 +- .../bare-metal/data_presentation/data_psn.c | 4 +- .../bare-metal/data_presentation/lcd/lcd_img.c | 4 +- .../bare-metal/timer/include/platform_timer.h | 4 +- .../hal/profiles/bare-metal/timer/platform_timer.c | 4 +- 7 files changed, 10 insertions(+), 89 deletions(-) delete mode 100644 source/hal/profiles/bare-metal/bsp/include/bsp.h delete mode 100644 source/hal/profiles/bare-metal/bsp/include/ethosu_mem_config.h (limited to 'source/hal/profiles') diff --git a/source/hal/profiles/bare-metal/bsp/include/bsp.h b/source/hal/profiles/bare-metal/bsp/include/bsp.h deleted file mode 100644 index e6dd0b5..0000000 --- a/source/hal/profiles/bare-metal/bsp/include/bsp.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef BSP_H -#define BSP_H - -#include "platform_drivers.h" - -#if defined(ARM_NPU) -#include "ethosu_mem_config.h" -#endif /* defined(ARM_NPU) */ - -#endif /* BSP_H */ diff --git a/source/hal/profiles/bare-metal/bsp/include/ethosu_mem_config.h b/source/hal/profiles/bare-metal/bsp/include/ethosu_mem_config.h deleted file mode 100644 index b393a03..0000000 --- a/source/hal/profiles/bare-metal/bsp/include/ethosu_mem_config.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef ETHOS_U_NPU_MEM_CONFIG_H -#define ETHOS_U_NPU_MEM_CONFIG_H - -#define ETHOS_U_NPU_MEMORY_MODE_SRAM_ONLY 0 -#define ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM 1 -#define ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM 2 - -#define ETHOS_U_MEM_BYTE_ALIGNMENT 16 - -#ifndef ETHOS_U_NPU_MEMORY_MODE - #define ETHOS_U_NPU_MEMORY_MODE ETHOS_U_MEMORY_MODE_SHARED_SRAM -#endif /* ETHOS_U_NPU_MEMORY_MODE */ - -#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM) - #define ETHOS_U_CACHE_BUF_SZ (393216U) /* See vela doc? for reference? */ -#else - #define ETHOS_U_CACHE_BUF_SZ (0U) -#endif /* CACHE_BUF_SZ */ - -/** - * Activation buffer aka tensor arena section name - * We have to place the tensor arena in different region based on the memory config. - **/ -#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM) - #define ACTIVATION_BUF_SECTION section(".bss.NoInit.activation_buf_sram") - #define ACTIVATION_BUF_SECTION_NAME ("SRAM") -#elif (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_SRAM_ONLY) - #define ACTIVATION_BUF_SECTION section(".bss.NoInit.activation_buf_sram") - #define ACTIVATION_BUF_SECTION_NAME ("SRAM") -#elif (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM) - #define ACTIVATION_BUF_SECTION section("activation_buf_dram") - #define CACHE_BUF_SECTION section(".bss.NoInit.ethos_u_cache") - #define ACTIVATION_BUF_SECTION_NAME ("DDR/DRAM") - #define CACHE_BUF_ATTRIBUTE __attribute__((aligned(ETHOS_U_MEM_BYTE_ALIGNMENT), CACHE_BUF_SECTION)) -#endif - -#endif /* ETHOS_U_NPU_MEM_CONFIG_H */ \ No newline at end of file diff --git a/source/hal/profiles/bare-metal/data_acquisition/data_acq.c b/source/hal/profiles/bare-metal/data_acquisition/data_acq.c index 7113a24..b7eba2d 100644 --- a/source/hal/profiles/bare-metal/data_acquisition/data_acq.c +++ b/source/hal/profiles/bare-metal/data_acquisition/data_acq.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022 Arm Limited. All rights reserved. + * Copyright (c) 2022 Arm Limited. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -16,8 +16,8 @@ */ #include "data_acq.h" -#include "bsp.h" #include "log_macros.h" +#include "platform_drivers.h" #include "uart_stdout.h" #include diff --git a/source/hal/profiles/bare-metal/data_presentation/data_psn.c b/source/hal/profiles/bare-metal/data_presentation/data_psn.c index 474d552..de088d7 100644 --- a/source/hal/profiles/bare-metal/data_presentation/data_psn.c +++ b/source/hal/profiles/bare-metal/data_presentation/data_psn.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. All rights reserved. + * Copyright (c) 2022 Arm Limited. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -16,8 +16,8 @@ */ #include "data_psn.h" -#include "bsp.h" #include "lcd_img.h" +#include "platform_drivers.h" #include #include diff --git a/source/hal/profiles/bare-metal/data_presentation/lcd/lcd_img.c b/source/hal/profiles/bare-metal/data_presentation/lcd/lcd_img.c index bb950c3..6e05f29 100644 --- a/source/hal/profiles/bare-metal/data_presentation/lcd/lcd_img.c +++ b/source/hal/profiles/bare-metal/data_presentation/lcd/lcd_img.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022 Arm Limited. All rights reserved. + * Copyright (c) 2022 Arm Limited. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -16,8 +16,8 @@ */ #include "lcd_img.h" -#include "bsp.h" #include "log_macros.h" +#include "platform_drivers.h" #include #include diff --git a/source/hal/profiles/bare-metal/timer/include/platform_timer.h b/source/hal/profiles/bare-metal/timer/include/platform_timer.h index 6338e0b..dd3934e 100644 --- a/source/hal/profiles/bare-metal/timer/include/platform_timer.h +++ b/source/hal/profiles/bare-metal/timer/include/platform_timer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. All rights reserved. + * Copyright (c) 2022 Arm Limited. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -17,7 +17,7 @@ #ifndef BAREMETAL_TIMER_H #define BAREMETAL_TIMER_H -#include "bsp.h" +#include "platform_drivers.h" #include #include diff --git a/source/hal/profiles/bare-metal/timer/platform_timer.c b/source/hal/profiles/bare-metal/timer/platform_timer.c index 11ccf8b..0388198 100644 --- a/source/hal/profiles/bare-metal/timer/platform_timer.c +++ b/source/hal/profiles/bare-metal/timer/platform_timer.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022 Arm Limited. All rights reserved. + * Copyright (c) 2022 Arm Limited. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -14,9 +14,9 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -#include "bsp.h" #include "timer.h" #include "log_macros.h" +#include "platform_drivers.h" #include #include -- cgit v1.2.1