Age | Commit message (Collapse) | Author |
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MLECO-2930: logging macros were extracted from hal.h and used separately around the code.
MLECO-2931: arm_math lib introduced, cmsis-dsp removed from top level linkage.
MLECO-2915: platform related post-build steps.
Change-Id: Id718884e22f262a5c070ded3f3f5d4b048820147
Signed-off-by: alexander <alexander.efremov@arm.com>
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Change-Id: Ic14e93a50fb7b3f3cfd9497bac1280794cc0fc15
Signed-off-by: Isabella Gottardi <isabella.gottardi@arm.com>
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Added QSPI_SRAM_BASE for Secure region.
Updated UART and other peripherals affected by change in reserved region
Updated names of some base addresses in cmake and template files
Error in TRM swapping individual for combined GPIO IRQs reported
Follow-up - Marked region in TRM not covered in CMake
Change-Id: I046e740053477fe3a51bc171a2b7e28f4a9f0523
Signed-off-by: Liam Barry <liam.barry@arm.com>
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Change-Id: I182bfa55b5ae743d6f0b9f5c766b746202a7968d
Signed-off-by: Isabella Gottardi <isabella.gottardi@arm.com>
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Signed-off-by: Michael Levit michaell@emza-vs.com
Change-Id: I7958b05b5dbe9a785e0f8a241b716c17a9ca976f
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Replaced overloaded PresentInferenceresults with single function and removed
logic to handle arguments which are no longer passed.
Change-Id: I745271638fcf78b7121c2a4b95844b752643bac2
Signed-off-by: Liam Barry <liam.barry@arm.com>
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Issues identified with Armclang 6.15; bumping up the minimum
version required to Armclang 6.16.
Change-Id: I33ec21f04e0c954919cacaf6f3c4d99ef8f517cc
Signed-off-by: Kshitij Sisodia <kshitij.sisodia@arm.com>
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Added tests for recently added Softmax function in
PlatformMath module.
Change-Id: Iacf1f4eaf33a92e1d42275000765e7152d17176b
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Replaced ctx.set/get<uint32>(keywordindex) with
keyword itself as const std::string&
Change-Id: I1811d93548105d6db58e57b88675f9b41e66d914
Signed-off-by: Liam Barry <liam.barry@arm.com>
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Aligning with output from other use cases, inference runner
output now prints the number of inferences as one.
Change-Id: Ifc03385a5de86477508fe8c377d481b7140a8429
Signed-off-by: Kshitij Sisodia <kshitij.sisodia@arm.com>
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Added SoftMax function to Mathutils to allow MicroNet
to output probability as it does not nativelu have this layer.
Minor refactoring to accommodate Softmax Calculations
Extensive renaming and updating of documentation and resource download script.
Added SoftMax function to Mathutils to allow MicroNet
to output probability.
Change-Id: I7cbbda1024d14b85c9ac1beea7ca8fbffd0b6eb5
Signed-off-by: Liam Barry <liam.barry@arm.com>
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Change-Id: I2b2685dd65e08e3d8b52d223cfad53e90a73d2ba
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builds
-Added conditonals to ethos-u-driver and cmsis path for making tflite micro library native build
Change-Id: I89ce87ef368392b087cfca1898531bd2c5a2ba1c
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* LCD display behavior for Run All now matches Run Next
* Remove repeated code
Signed-off-by: Richard Burton <richard.burton@arm.com>
Change-Id: I16706187fd4e7a59dd935783f5bfb8731435f381
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-Fixed noise_reduction CMake bug cause inference to fail when non-default mac_units passed to build script
-Inference complete message added to noise_reduction LCD
-Doc update clarfiy vela.ini config file for compiling to non-default memory modes
-QOL improvement by adding a note on how to make path variables permenant when configuring Arm compilers
Change-Id: Id798b25638260721d8e48468b7a5942bd802d63b
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Change-Id: I81fc96b412959d2a6dd61b6fbd671345b2f39b8d
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* CMSIS-DSP acceleration will now be used for FFT in RNNoise pre-processing
* PESQ scores tested and similar
Signed-off-by: Richard Burton <richard.burton@arm.com>
Change-Id: Ifeebc041f58867909b27c948950e08f8f39ef276
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Arena-cache-size is different from default when using
Dedicated_Sram memory mode.
Change-Id: Ie112146218e1ec456e17babd4ed3e7c7bc2009a8
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Signed-off-by: Richard Burton <richard.burton@arm.com>
Change-Id: I47879089734cd3ab70ef8068277e677742e1b2b3
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* Documentation added with missing prerequisite
* build_default.py can now be tuned for constraint build systems
Change-Id: I74c061359ff663335e664528c4f0616f55cff0f7
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* Currently using 21.11 release candidates
Signed-off-by: Richard Burton <richard.burton@arm.com>
Change-Id: I696b48c3a4c87c5dca3bbee957049790d900b48e
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These changes will limit the use of FPGA internal SRAM from a max
of 4MiB to 2MiB and the BRAM from 2MiB to 1MiB.
Change-Id: I69c8e695aee26ff4f235bfe83ffd26efbd66f547
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For easier look up and maintenance, all common CMake user options
have been consolidated in one CMake file.
NOTE: the individual use case specific options are still within
the correspoinding use case CMake files.
Change-Id: Id887f7b2c763f4d3eb997d997cf466684d0089b6
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Change-Id: I0ea57b69bdb095f2580d80001d145fefed5cd72c
Signed-off-by: George Gekov <george.gekov@arm.com>
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-Updated CMake to use C++ 14
-Removed cmsis makefile include from tensorflow.cmake
-Documentation update
-Added more flags for processor in CMake
Change-Id: I1c2b72141e98a5cf8bb09176d7c331da3b05b4c5
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Change-Id: I3ec18583c321eb2815a670d56f4958e610331d6d
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Signed-off-by: Liam Barry <liam.barry@arm.com>
Change-Id: Ibf712cb9359b9bc9977d4f77aec1d7c7f4245825
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Change-Id: I15dceeafec554e58257e8e6d6e8896cc9b397106
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Change-Id: I90fca833d501bbd4db4fd99903b9ffef161a9a6b
Signed-off-by: George Gekov <george.gekov@arm.com>
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* Use RNNoise model from PMZ
* Add Noise reduction use-case
Signed-off-by: Richard burton <richard.burton@arm.com>
Change-Id: Ia8cc7ef102e22a5ff8bfbd3833594a4905a66057
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Change-Id: I5170aafa6d159d537906da17b194534fd7d44bea
Signed-off-by: Liam Barry <liam.barry@arm.com>
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Change-Id: If34a22cdc1313bd8cce4d1cd30e845eb361b93e4
Signed-off-by: George Gekov <george.gekov@arm.com>
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Python scripts 'build_default.py' and 'set_up_default_resources.py'
now allow building for non-default Ethos-U configurations: H32, H64,
H256 and Y512.
Change-Id: Iefdbf135410396c4dc0be73462644725d4b47910
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* Changed image->cc conversion to be similar with preprocessing
of img_class and vww models: images are scaled maintaing the
aspect ration and then the centre crop of the correct size
is taken.
* VWW applies input quantization info to the int8 image
(prior converted to [0,1] float range).
* Changed adult_blur to a image without person.
* Fix menu print when selecting a specific ifm to run
(Select message was displayed after typing something)
Change-Id: Ie6cde7ab4835ea842667b87397458a5d32131df3
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Adding sine function and allowing FFTs to be computed for cases where
the FFT len is not a power of 2. In this case, the naive implementation
is used. Option for computing FFT for a complex vector has also been
added, although, the CMSIS-DSP flow needs to be tested.
Change-Id: Iad9902b946f3088de91a5f67acfb4cb3d0b00457
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* Fixed vww usage warnings (imageData in RunInferene and _GetImageIdx function)
Change-Id: I2c37e4e4cc8c8eca841690f2df8d525ed516ecc8
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Change-Id: Icf09410f12072e8d7850dd1e540c3243af24ed09
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Change-Id: Ifd6d3d72abb1e8ce058e612295d01a148962627e
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Documenting how the target platform's SRAM size impacts configuration files,
sources and linker scripts.
Change-Id: I8647ab67b73bafd0c44e6c586a1b5f2602bf03f5
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AN547 sets the core clock for both M55 and U55 to 32MHz, while the
blocks on APB use a different clock of 25MHz.
Note: this will have not change any of the MPS3 FPGA profiling
numbers (cycle counts and elapsed time in milliseconds) for
Cortex-M55 as this was already using the correct counters under
MPS3. The only difference would be that the system tick interrupt
will fire every 10ms as intended instead of every 7.8125 ms as it
is doing with current software.
Change-Id: I77cd269c7c02f5d6e65328eb285185bae74e4e36
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* Update all dependancies to 21.08
* Refactoring to fit the new changes
Change-Id: Icc2ae3628ee6e8fbc0af2cd8f91e368c9ccae053
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Change-Id: Id3919e5ec507bbfe7e7bf4c4c199b5dbdcc043d2
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With this patch, the generic inference runner use-case can be
configured to accept the model tflite file at run-time via
the FVP's command line parameters. Same is true for the IFM
and the inference results can be dumped out too.
NOTE: this change is only for supporting the FVP, the FPGA
implementation will not allow additional loading for the
changes in this patch to be useful.
Change-Id: I1318bd5b0cfb7bb635ced6fe58d22c3e401d2547
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Change-Id: I3b75a9fe5b002a8206674aff154f44df2ccc85ca
Reviewed-on: https://eu-gerrit-2.euhpc.arm.com/c/ml/ecosystem/ml-embedded-evaluation-kit/+/472168
Tested-by: mlecosys <mlecosys@arm.com>
Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
Reviewed-by: Kshitij Sisodia <kshitij.sisodia@arm.com>
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MLECO-2083: Refactoring img_class and visual wake word
*Added source files for visual wake word
*Added tests
*Added docs
*Added new images for visual wake word demo
*Refactored common functions in img_class, visual wake word and other usecases
Change-Id: Ibd25854e19a5517f940a8d3086a5d4835fab89e9
Signed-off-by: Éanna Ó Catháin <eanna.ocathain@arm.com>
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Change-Id: I4dbab11223697c6c1405a3466fdbe87e9b23cf0d
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Change-Id: Ie2f358ef52aaa8734ff09ead97aea72e5bda7f8b
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The ApplicationContext::Set function allocates always new memory for the attibute.
When called multiple times (like it is done in most of the UseCaseHandler) this will generate a memory leak.
The function now checks if the attibute exists; If it does it frees the memory and then allocate memory for the new attribute.
Change-Id: I21db10009d6d0e360eab2dd33c344ef72eafe77f
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* updated vela version in setup resources script
* updated vela version in documentation
* updated minimum cmake version in documentation
Change-Id: Iadd1d082bb7f6124016a2804fd7a28e59bf72639
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Change-Id: I0dab5308bf5c3eba9b4bb2c9bf0939ac9598d2f6
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