diff options
Diffstat (limited to 'docs/use_cases/asr.md')
| -rw-r--r-- | docs/use_cases/asr.md | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/docs/use_cases/asr.md b/docs/use_cases/asr.md index 4600698..fa93d9a 100644 --- a/docs/use_cases/asr.md +++ b/docs/use_cases/asr.md @@ -496,9 +496,9 @@ INFO - For timestamp: 0.000000 (inference #: 0); label: and he walked immediatel INFO - For timestamp: 0.000000 (inference #: 1); label: e apartment by another door INFO - Complete recognition: and he walked immediately out of the apartment by another door INFO - Profile for Inference : -INFO - NPU AXI0_RD_DATA_BEAT_RECEIVED cycles: 6564262 -INFO - NPU AXI0_WR_DATA_BEAT_WRITTEN cycles: 928889 -INFO - NPU AXI1_RD_DATA_BEAT_RECEIVED cycles: 841712 +INFO - NPU AXI0_RD_DATA_BEAT_RECEIVED beats: 6564262 +INFO - NPU AXI0_WR_DATA_BEAT_WRITTEN beats: 928889 +INFO - NPU AXI1_RD_DATA_BEAT_RECEIVED beats: 841712 INFO - NPU ACTIVE cycles: 28450696 INFO - NPU IDLE cycles: 476 INFO - NPU total cycles: 28451172 @@ -517,12 +517,12 @@ The profiling section of the log shows that for the first inference: - 476 idle cycles: number of cycles for which the NPU was idle - - 6,564,262 AXI0 read cycles: The number of cycles the NPU spends to execute AXI0 read transactions. + - 6,564,262 AXI0 read beats: The number of AXI beats with read transactions from AXI0 bus. AXI0 is the bus where Ethos-U55 NPU reads and writes to the computation buffers (activation buf/tensor arenas). - - 928,889 AXI0 write cycles: The number of cycles the NPU spends to execute AXI0 write transactions. + - 928,889 AXI0 write beats: The number of AXI beats with write transactions to AXI0 bus. - - 841,712 AXI1 read cycles: The number of cycles the NPU spends to execute AXI1 read transactions. + - 841,712 AXI1 read beats: The number of AXI beats with read transactions from AXI1 bus. AXI1 is the bus where Ethos-U55 NPU reads the model (read only) - For FPGA platforms, CPU cycle count can also be enabled. For FVP, however, CPU cycle counters should not be used as |