diff options
author | Kshitij Sisodia <kshitij.sisodia@arm.com> | 2022-03-03 16:30:07 +0000 |
---|---|---|
committer | Isabella Gottardi <isabella.gottardi@arm.com> | 2022-03-04 11:09:15 +0000 |
commit | d5679cc8db0a6ab43369eb91089ea5fe015f552f (patch) | |
tree | 4477b3f1e5b5a70066d958d98e61ba6e5a183bb5 /source/hal | |
parent | b4123fd715e41070be5bb39600625c740185f562 (diff) | |
download | ml-embedded-evaluation-kit-d5679cc8db0a6ab43369eb91089ea5fe015f552f.tar.gz |
MLECO-2984: Refactor components
* Use UART component from Ethos-U core-platform
* Components as cmake project
Change-Id: I053f3a59800abc20216e6a4df8555db357e3f21d
Signed-off-by: Isabella Gottardi <isabella.gottardi@arm.com>
Diffstat (limited to 'source/hal')
26 files changed, 344 insertions, 854 deletions
diff --git a/source/hal/CMakeLists.txt b/source/hal/CMakeLists.txt index 536682f..f720cdf 100644 --- a/source/hal/CMakeLists.txt +++ b/source/hal/CMakeLists.txt @@ -108,16 +108,18 @@ elseif (PLATFORM_PROFILE STREQUAL native) PUBLIC PLATFORM_HAL=PLATFORM_UNKNOWN_LINUX_OS ACTIVATION_BUF_SRAM_SZ=0) +else() + message(FATAL_ERROR "PLATFORM_PROFILE ${PLATFORM_PROFILE} not supported") endif() -# Add platform-drivers target +# Add platform_drivers target add_subdirectory(${PLATFORM_DRIVERS_DIR} ${CMAKE_BINARY_DIR}/platform_driver) # Link time library targets: target_link_libraries(${HAL_TARGET} PUBLIC log - platform-drivers) + platform_drivers) # Display status: message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR}) diff --git a/source/hal/components/ethosu_npu_init/CMakeLists.txt b/source/hal/components/ethosu_npu_init/CMakeLists.txt new file mode 100644 index 0000000..57eef61 --- /dev/null +++ b/source/hal/components/ethosu_npu_init/CMakeLists.txt @@ -0,0 +1,98 @@ +#---------------------------------------------------------------------------- +# Copyright (c) 2022 Arm Limited. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +#---------------------------------------------------------------------------- + +######################################################### +# Ethos-U NPU initialization library # +######################################################### + +cmake_minimum_required(VERSION 3.15.6) +set(ETHOS_U_NPU_INIT_COMPONENT ethosu_npu_init_component) +project(${ETHOS_U_NPU_INIT_COMPONENT} + DESCRIPTION "Ethos-U NPU initialization library" + LANGUAGES C CXX ASM) + +if (NOT DEFINED ETHOS_U_NPU_DRIVER_SRC_PATH) + message(FATAL_ERROR "ETHOS_U_NPU_DRIVER_SRC_PATH should" + " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}") +endif() + +# For the driver, we need to provide the CMSIS_PATH variable +set(CMSIS_PATH ${CMSIS_SRC_PATH} CACHE PATH "Path to CMSIS directory") +add_subdirectory(${ETHOS_U_NPU_DRIVER_SRC_PATH} ${CMAKE_BINARY_DIR}/ethos-u-driver) + +# Create static library +add_library(${ETHOS_U_NPU_INIT_COMPONENT} STATIC) + +## Include directories - public +target_include_directories(${ETHOS_U_NPU_INIT_COMPONENT} + PUBLIC + include + ${SOURCE_GEN_DIR}) + +## Component sources +target_sources(${ETHOS_U_NPU_INIT_COMPONENT} + PRIVATE + ethosu_npu_init.c) + +## Add dependencies: +target_link_libraries(${ETHOS_U_NPU_INIT_COMPONENT} PUBLIC + cmsis_device + ethosu_core_driver + log) + +## Memory mode target definition +if (NOT DEFINED ETHOS_U_NPU_ID) + set(ETHOS_U_NPU_ID U55) +endif() + +if (NOT DEFINED ETHOS_U_NPU_MEMORY_MODE) + set(ETHOS_U_NPU_MEMORY_MODE Shared_Sram) +endif() + +if (ETHOS_U_NPU_MEMORY_MODE STREQUAL Sram_Only) + if (ETHOS_U_NPU_ID STREQUAL U55) + set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEM_MODE_SRAM_ONLY") + else () + message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `sram_only` can be used only for Ethos-U55.") + endif () + +elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Shared_Sram) + # Shared Sram can be used for Ethos-U55 and Ethos-U65 + set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM") + +elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Dedicated_Sram) + # Dedicated Sram is used only for Ethos-U65 + if (ETHOS_U_NPU_ID STREQUAL U65) + list(APPEND ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM" "-DETHOS_U_NPU_CACHE_SIZE=${ETHOS_U_NPU_CACHE_SIZE}") + else () + message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `dedicated_sram` can be used only for Ethos-U65.") + endif () + +else () + message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode ${ETHOS_U_NPU_MEMORY_MODE}") + +endif () + +target_compile_definitions(${ETHOS_U_NPU_INIT_COMPONENT} + PUBLIC + ${ETHOS_U_NPU_MEMORY_MODE_FLAG}) + +# Display status +message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR}) +message(STATUS "*******************************************************") +message(STATUS "Library : " ${ETHOS_U_NPU_INIT_COMPONENT}) +message(STATUS "*******************************************************") diff --git a/source/hal/platform/mps3/include/ethosu_mem_config.h b/source/hal/components/ethosu_npu_init/include/ethosu_mem_config.h index aa0cfda..aa0cfda 100644 --- a/source/hal/platform/mps3/include/ethosu_mem_config.h +++ b/source/hal/components/ethosu_npu_init/include/ethosu_mem_config.h diff --git a/source/hal/components/ethosu_ta_init/CMakeLists.txt b/source/hal/components/ethosu_ta_init/CMakeLists.txt new file mode 100644 index 0000000..b5f94c1 --- /dev/null +++ b/source/hal/components/ethosu_ta_init/CMakeLists.txt @@ -0,0 +1,67 @@ +#---------------------------------------------------------------------------- +# Copyright (c) 2022 Arm Limited. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +#---------------------------------------------------------------------------- + +######################################################### +# Ethos-U NPU timing adapter initialization library # +######################################################### + +cmake_minimum_required(VERSION 3.15.6) +set(ETHOS_U_NPU_TA_COMPONENT ethosu_ta_init_component) +project(${ETHOS_U_NPU_TA_COMPONENT} + DESCRIPTION "Ethos-U NPU timing adapter initialization library" + LANGUAGES C CXX ASM) + +# Checks +## If a TA config file is provided, we generate a settings file +if (DEFINED TA_CONFIG_FILE) + include(${TA_CONFIG_FILE}) + set(TA_SETTINGS_TEMPLATE ${CMAKE_CURRENT_SOURCE_DIR}/cmake/templates/timing_adapter_settings.template) + configure_file("${TA_SETTINGS_TEMPLATE}" "${SOURCE_GEN_DIR}/timing_adapter_settings.h") +endif() + +## Timing adapter Source path check +if (NOT DEFINED ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH) + message(FATAL_ERROR "ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH should" + " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}") +endif() + +add_subdirectory(${ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH} ${CMAKE_BINARY_DIR}/timing_adapter) + +# Create static library +add_library(${ETHOS_U_NPU_TA_COMPONENT} STATIC) + +## Include directories - public +target_include_directories(${ETHOS_U_NPU_TA_COMPONENT} + PUBLIC + include + ${SOURCE_GEN_DIR}) + +## Component sources +target_sources(${ETHOS_U_NPU_TA_COMPONENT} + PRIVATE + ethosu_ta_init.c) + +## Add dependencies +target_link_libraries(${ETHOS_U_NPU_TA_COMPONENT} PUBLIC + timing_adapter + log) + +# Display status +message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR}) +message(STATUS "*******************************************************") +message(STATUS "Library : " ${ETHOS_U_NPU_TA_COMPONENT}) +message(STATUS "*******************************************************") diff --git a/source/hal/components/ethosu_ta_init/cmake/templates/timing_adapter_settings.template b/source/hal/components/ethosu_ta_init/cmake/templates/timing_adapter_settings.template new file mode 100644 index 0000000..5b6c43d --- /dev/null +++ b/source/hal/components/ethosu_ta_init/cmake/templates/timing_adapter_settings.template @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2021 Arm Limited. All rights reserved. + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// Auto-generated file +// ** DO NOT EDIT ** + +#ifndef TIMING_ADAPTER_SETTINGS_H +#define TIMING_ADAPTER_SETTINGS_H + +#cmakedefine TA0_BASE (@TA0_BASE@) +#cmakedefine TA1_BASE (@TA1_BASE@) + +/* Timing adapter settings for AXI0 */ +#if defined(TA0_BASE) + +#define TA0_MAXR (@TA0_MAXR@) +#define TA0_MAXW (@TA0_MAXW@) +#define TA0_MAXRW (@TA0_MAXRW@) +#define TA0_RLATENCY (@TA0_RLATENCY@) +#define TA0_WLATENCY (@TA0_WLATENCY@) +#define TA0_PULSE_ON (@TA0_PULSE_ON@) +#define TA0_PULSE_OFF (@TA0_PULSE_OFF@) +#define TA0_BWCAP (@TA0_BWCAP@) +#define TA0_PERFCTRL (@TA0_PERFCTRL@) +#define TA0_PERFCNT (@TA0_PERFCNT@) +#define TA0_MODE (@TA0_MODE@) +#define TA0_HISTBIN (@TA0_HISTBIN@) +#define TA0_HISTCNT (@TA0_HISTCNT@) + +#endif /* defined(TA0_BASE) */ + +/* Timing adapter settings for AXI1 */ +#if defined(TA1_BASE) + +#define TA1_MAXR (@TA1_MAXR@) +#define TA1_MAXW (@TA1_MAXW@) +#define TA1_MAXRW (@TA1_MAXRW@) +#define TA1_RLATENCY (@TA1_RLATENCY@) +#define TA1_WLATENCY (@TA1_WLATENCY@) +#define TA1_PULSE_ON (@TA1_PULSE_ON@) +#define TA1_PULSE_OFF (@TA1_PULSE_OFF@) +#define TA1_BWCAP (@TA1_BWCAP@) +#define TA1_PERFCTRL (@TA1_PERFCTRL@) +#define TA1_PERFCNT (@TA1_PERFCNT@) +#define TA1_MODE (@TA1_MODE@) +#define TA1_HISTBIN (@TA1_HISTBIN@) +#define TA1_HISTCNT (@TA1_HISTCNT@) + +#endif /* defined(TA1_BASE) */ + +#endif /* TIMING_ADAPTER_SETTINGS_H */ diff --git a/source/hal/components/ethosu_ta_init/ethosu_ta_init.c b/source/hal/components/ethosu_ta_init/ethosu_ta_init.c index 26eeb5c..323ab73 100644 --- a/source/hal/components/ethosu_ta_init/ethosu_ta_init.c +++ b/source/hal/components/ethosu_ta_init/ethosu_ta_init.c @@ -19,8 +19,6 @@ #include "log_macros.h" /* Logging functions */ -#if defined(TIMING_ADAPTER_AVAILABLE) - #include "timing_adapter.h" /* Arm Ethos-U timing adapter driver header */ #include "timing_adapter_settings.h" /* Arm Ethos-U timing adapter settings */ @@ -82,5 +80,3 @@ int arm_ethosu_timing_adapter_init(void) return 0; } - -#endif /* TIMING_ADAPTER_AVAILABLE */ diff --git a/source/hal/components/ethosu_ta_init/include/ethosu_ta_init.h b/source/hal/components/ethosu_ta_init/include/ethosu_ta_init.h index 2ab7fb2..7e6df6c 100644 --- a/source/hal/components/ethosu_ta_init/include/ethosu_ta_init.h +++ b/source/hal/components/ethosu_ta_init/include/ethosu_ta_init.h @@ -17,14 +17,10 @@ #ifndef ETHOS_U_TA_INIT_H #define ETHOS_U_TA_INIT_H -#if defined(ARM_NPU) && defined(TIMING_ADAPTER_AVAILABLE) - /** * @brief Initialises the Arm Ethos-U NPU timing adapter * @return 0 if successful, error code otherwise **/ int arm_ethosu_timing_adapter_init(void); -#endif /* ARM_NPU && TIMING_ADAPTER_AVAILABLE */ - #endif /* ETHOS_U_TA_INIT_H */ diff --git a/source/hal/components/uart_cmsdk/include/uart_stdout.h b/source/hal/components/uart_cmsdk/include/uart_stdout.h deleted file mode 100644 index 9c5fbcf..0000000 --- a/source/hal/components/uart_cmsdk/include/uart_stdout.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef UART_STDOUT_H -#define UART_STDOUT_H - -#include <stdbool.h> - -/** - * @brief Initialised the UART block. - **/ -extern void UartStdOutInit(void); - -/** - * @brief Transmits a character over UART (blocking call). - * @param[in] my_ch Character to be transmitted. - * @return Character transmitted. - **/ -extern unsigned char UartPutc(unsigned char my_ch); - -/** - * @brief Receives a character from the UART block (blocking call). - * @return Character received. - **/ -extern unsigned char UartGetc(void); - -/** - * @brief Reads characters from the UART block until a line feed or - * carriage return terminates the function. NULL character - * also terminates the function, error is returned. - * @param[out] lp Characters read from the UART block. - * @param[in] len Character to be transmitted. - * @return true if successful, false otherwise. - **/ -extern bool GetLine(char *lp, unsigned int len); - -/** - * @brief Terminates UART simulation. This is useful when a Fixed - * Virtual Platform's session needs to be gracefully terminated. - * @param[in] code Terminating code displayed on the UART before the end of the simulation. - **/ -extern void UartEndSimulation(int code); - -#endif /* UART_STDOUT_H */ diff --git a/source/hal/components/uart_cmsdk/uart_cmsdk.c b/source/hal/components/uart_cmsdk/uart_cmsdk.c deleted file mode 100644 index 35d4160..0000000 --- a/source/hal/components/uart_cmsdk/uart_cmsdk.c +++ /dev/null @@ -1,136 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "uart_stdout.h" - -#include "device_mps3.h" - -#include <stdio.h> - -#define CNTLQ 0x11 -#define CNTLS 0x13 -#define DEL 0x7F -#define BACKSPACE 0x08 -#define CR 0x0D -#define LF 0x0A -#define ESC 0x1B - -void UartStdOutInit(void) -{ - CMSDK_UART0->BAUDDIV = PERIF_CLK / 115200; /* => (25 or 32 MHz) / (115200 bps). */ - CMSDK_UART0->CTRL = ((1ul << 0) | /* TX enable. */ - (1ul << 1) ); /* RX enable. */ - return; -} - -unsigned char UartPutc(unsigned char my_ch) -{ - while ((CMSDK_UART0->STATE & 1)); /* Wait if Transmit Holding register is full. */ - - if (my_ch == '\n') { - CMSDK_UART0->DATA = '\r'; - while ((CMSDK_UART0->STATE & 1)); /* Wait if Transmit Holding register is full. */ - } - - CMSDK_UART0->DATA = my_ch; /* Write to transmit holding register. */ - return (my_ch); -} - -unsigned char UartGetc(void) -{ - unsigned char my_ch; - unsigned int cnt; - - /* Wait if Receive Holding register is empty. */ - while (0 == (CMSDK_UART0->STATE & 2)) { - cnt = MPS3_FPGAIO->CLK100HZ / 50; - if (cnt & 0x8) { - MPS3_FPGAIO->LED = 0x01 << (cnt & 0x7); - } - else { - MPS3_FPGAIO->LED = 0x80 >> (cnt & 0x7); - } - } - - my_ch = CMSDK_UART0->DATA; - - /* Convert CR to LF. */ - if(my_ch == '\r') { - my_ch = '\n'; - } - - return (my_ch); -} - -bool GetLine(char *lp, unsigned int len) -{ - unsigned int cnt = 0; - char c; - - do { - c = UartGetc (); - switch (c) { - case CNTLQ: /* Ignore Control S/Q. */ - case CNTLS: - break; - - case BACKSPACE: - case DEL: - if (cnt == 0) { - break; - } - cnt--; /* Decrement count. */ - lp--; /* Decrement line pointer. */ - UartPutc (0x08); /* Echo backspace. */ - UartPutc (' '); - UartPutc (0x08); - fflush (stdout); - break; - - case ESC: - case 0: - *lp = 0; /* ESC - stop editing line. */ - return false; - - case CR: /* CR - done, stop editing line. */ - UartPutc (*lp = c); /* Echo and store character. */ - lp++; /* Increment line pointer */ - cnt++; /* and count. */ - c = LF; - UartPutc (*lp = c); /* Echo and store character. */ - fflush (stdout); - lp++; /* Increment line pointer */ - cnt++; /* and count. */ - break; - default: - UartPutc (*lp = c); /* Echo and store character. */ - fflush (stdout); - lp++; /* Increment line pointer */ - cnt++; /* and count. */ - break; - } - } while (cnt < len - 2 && c != LF); /* Check limit and CR. */ - *lp = 0; /* Mark end of string. */ - - return true; -} - -__attribute__((noreturn)) void UartEndSimulation(int code) -{ - UartPutc((char) 0x4); /* End of simulation */ - UartPutc((char) code); /* End of simulation */ - while(1); -} diff --git a/source/hal/components/uart_pl011/include/uart_stdout.h b/source/hal/components/uart_pl011/include/uart_stdout.h deleted file mode 100644 index 9c5fbcf..0000000 --- a/source/hal/components/uart_pl011/include/uart_stdout.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef UART_STDOUT_H -#define UART_STDOUT_H - -#include <stdbool.h> - -/** - * @brief Initialised the UART block. - **/ -extern void UartStdOutInit(void); - -/** - * @brief Transmits a character over UART (blocking call). - * @param[in] my_ch Character to be transmitted. - * @return Character transmitted. - **/ -extern unsigned char UartPutc(unsigned char my_ch); - -/** - * @brief Receives a character from the UART block (blocking call). - * @return Character received. - **/ -extern unsigned char UartGetc(void); - -/** - * @brief Reads characters from the UART block until a line feed or - * carriage return terminates the function. NULL character - * also terminates the function, error is returned. - * @param[out] lp Characters read from the UART block. - * @param[in] len Character to be transmitted. - * @return true if successful, false otherwise. - **/ -extern bool GetLine(char *lp, unsigned int len); - -/** - * @brief Terminates UART simulation. This is useful when a Fixed - * Virtual Platform's session needs to be gracefully terminated. - * @param[in] code Terminating code displayed on the UART before the end of the simulation. - **/ -extern void UartEndSimulation(int code); - -#endif /* UART_STDOUT_H */ diff --git a/source/hal/components/uart_pl011/uart_pl011.c b/source/hal/components/uart_pl011/uart_pl011.c deleted file mode 100644 index 1cbf70c..0000000 --- a/source/hal/components/uart_pl011/uart_pl011.c +++ /dev/null @@ -1,229 +0,0 @@ -/* - * Copyright (c) 2021 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "uart_stdout.h" -#include "peripheral_memmap.h" /* peripheral memory map definitions */ - -#include <stdio.h> -#include <stdint.h> - -#define CNTLQ 0x11 -#define CNTLS 0x13 -#define DEL 0x7F -#define BACKSPACE 0x08 -#define CR 0x0D -#define LF 0x0A -#define ESC 0x1B - -#define UARTBASE (PL011_UART0_BASE) - -/*****************************************************************************/ -/* UART Control Register Locations */ -/*****************************************************************************/ -#define UART0_DR *((volatile unsigned *) UARTBASE) -#define UART0_RSR *((volatile unsigned *)(UARTBASE + 0x04)) -#define UART0_ECR *((volatile unsigned *)(UARTBASE + 0x04)) -#define UART0_LCRH *((volatile unsigned *)(UARTBASE + 0x2C)) -#define UART0_LCRM *((volatile unsigned *)(UARTBASE + 0x28)) -#define UART0_LCRL *((volatile unsigned *)(UARTBASE + 0x24)) -#define UART0_CR *((volatile unsigned *)(UARTBASE + 0x30)) -#define UART0_FR *((volatile unsigned *)(UARTBASE + 0x18)) -#define UART0_IIR *((volatile unsigned *)(UARTBASE + 0x1C)) -#define UART0_ICR *((volatile unsigned *)(UARTBASE + 0x44)) - -/*****************************************************************************/ -/* Received Status Register - RSR */ -/*****************************************************************************/ -#define RSR_OVERRUN_ERROR 0x08 -#define RSR_BREAK_ERROR 0x04 -#define RSR_PARITY_ERROR 0x02 -#define RSR_FRAMING_ERROR 0x01 - -/*****************************************************************************/ -/* Line Control High Byte Register - LCRH */ -/*****************************************************************************/ -#define LCRH_WORD_LENGTH_8 0x60 -#define LCRH_WORD_LENGTH_7 0x40 -#define LCRH_WORD_LENGTH_6 0x20 -#define LCRH_WORD_LENGTH_5 0x00 -#define LCRH_FIFO_ENABLED 0x10 -#define LCRH_2_STOP_BITS 0x08 -#define LCRH_EVEN_PARITY 0x04 -#define LCRH_PARITY_ENABLE 0x02 -#define LCRH_SEND_BREAK 0x01 - -/*****************************************************************************/ -/* Line Control Medium Byte Register - LCRM */ -/* This register specifies the high byte of the Baud rate divisor */ -/*****************************************************************************/ -#define LCRM_BAUD_460800 0x00 -#define LCRM_BAUD_230400 0x00 -#define LCRM_BAUD_115200 0x00 -#define LCRM_BAUD_76800 0x00 -#define LCRM_BAUD_57600 0x00 -#define LCRM_BAUD_38400 0x00 -#define LCRM_BAUD_19200 0x00 -#define LCRM_BAUD_14400 0x00 -#define LCRM_BAUD_9600 0x00 -#define LCRM_BAUD_2400 0x01 -#define LCRM_BAUD_1200 0x02 - -/*****************************************************************************/ -/* Line Control Low Byte Register - LCRL */ -/* This register specifies the low byte of the Baud rate divisor */ -/*****************************************************************************/ -#define LCRL_BAUD_460800 0x01 -#define LCRL_BAUD_230400 0x03 -#define LCRL_BAUD_115200 0x07 -#define LCRL_BAUD_76800 0x0B -#define LCRL_BAUD_57600 0x0F -#define LCRL_BAUD_38400 0xC -#define LCRL_BAUD_19200 0x2F -#define LCRL_BAUD_14400 0x3F -#define LCRL_BAUD_9600 0x5F -#define LCRL_BAUD_2400 0x7F -#define LCRL_BAUD_1200 0xFF - -/*****************************************************************************/ -/* Control Register - CR */ -/*****************************************************************************/ -#define CR_LOOP_BACK_EN 0x80 -#define CR_TIMEOUT_INT_EN 0x40 -#define CR_TX_INT_ENABLE 0x100 -#define CR_RX_INT_ENABLE 0x200 -#define CR_MODSTAT_INT_EN 0x08 -#define CR_UART_ENABLE 0x01 - -/*****************************************************************************/ -/* Flag Register - FR */ -/*****************************************************************************/ -#define FR_TX_FIFO_EMPTY 0x80 -#define FR_RX_FIFO_FULL 0x40 -#define FR_TX_FIFO_FULL 0x20 -#define FR_RX_FIFO_EMPTY 0x10 -#define FR_BUSY 0x08 -#define FR_CARRIER_DETECT 0x04 -#define FR_SET_READY 0x02 -#define FR_CLEAR_TO_SEND 0x01 - -/*****************************************************************************/ -/* Interrupt Identification Register - IIR */ -/*****************************************************************************/ -#define IIR_RX_TIME_OUT 0x08 -#define IIR_TX 0x04 -#define IIR_RX 0x02 -#define IIR_MODEM 0x01 - -void UartStdOutInit(void) -{ - /* Disable the serial port while setting the baud rate and word length. */ - UART0_CR = 0; - - /* Clear the receive status register. */ - UART0_ECR = 0; - - /* Set the correct baud rate and word length. */ - UART0_LCRL = LCRL_BAUD_115200; - UART0_LCRM = LCRM_BAUD_115200; - UART0_LCRH = LCRH_WORD_LENGTH_8; - - /* Explicitly disable FIFO's for char mode. */ - UART0_LCRH &= ~LCRH_FIFO_ENABLED; - - /* Enable UART0 (and RX/TX) without interrupts. */ - UART0_CR = CR_UART_ENABLE | CR_TX_INT_ENABLE | CR_RX_INT_ENABLE; -} - -unsigned char UartPutc(unsigned char ch) -{ - if (ch == '\n') { - (void) UartPutc('\r'); - } - while (UART0_FR & FR_TX_FIFO_FULL) - ; - UART0_DR = ch; - - return ch; -} - -unsigned char UartGetc(void) -{ - unsigned char c; - while (UART0_FR & FR_RX_FIFO_EMPTY) - ; - c = UART0_DR; - if (c == '\r') { - c = '\n'; - } - - return c; -} - -bool GetLine (char *lp, unsigned int len) -{ - unsigned int cnt = 0; - char c; - - do { - c = UartGetc(); - switch (c) { - case CNTLQ: /* ignore Control S/Q. */ - case CNTLS: - break; - case BACKSPACE: - case DEL: - if (cnt == 0) { - break; - } - cnt--; /* decrement count. */ - lp--; /* and line pointer. */ - UartPutc (0x08); /* echo backspace. */ - UartPutc (' '); - UartPutc (0x08); - fflush (stdout); - break; - case ESC: - case 0: - *lp = 0; /* ESC - stop editing line. */ - return false; - case CR: /* CR - done, stop editing line. */ - UartPutc (*lp = c); /* Echo and store character. */ - lp++; /* Increment line pointer */ - cnt++; /* and count. */ - c = LF; - UartPutc (*lp = c); /* Echo and store character. */ - fflush (stdout); - lp++; /* Increment line pointer */ - cnt++; /* and count. */ - break; - default: - UartPutc (*lp = c); /* echo and store character. */ - fflush (stdout); - lp++; /* increment line pointer. */ - cnt++; /* and count. */ - break; - } - } while (cnt < len - 2 && c != LF); /* check limit and CR. */ - *lp = 0; /* mark end of string. */ - return true; -} - -__attribute__((noreturn)) void UartEndSimulation(int code) -{ - UartPutc((char) 0x4); // End of simulation - UartPutc((char) code); // Exit code - while(1); -} diff --git a/source/hal/platform/mps3/CMakeLists.txt b/source/hal/platform/mps3/CMakeLists.txt index 75e70a2..7ef4ed4 100644 --- a/source/hal/platform/mps3/CMakeLists.txt +++ b/source/hal/platform/mps3/CMakeLists.txt @@ -20,7 +20,7 @@ ######################################################### cmake_minimum_required(VERSION 3.15.6) -set(PLATFORM_DRIVERS_TARGET platform-drivers) +set(PLATFORM_DRIVERS_TARGET platform_drivers) project(${PLATFORM_DRIVERS_TARGET} DESCRIPTION "Platform drivers library for MPS3 FPGA/FVP targets" LANGUAGES C CXX ASM) @@ -54,145 +54,75 @@ configure_file("${MEM_PROFILE_TEMPLATE}" "${SOURCE_GEN_DIR}/peripheral_memmap.h" configure_file("${IRQ_PROFILE_TEMPLATE}" "${SOURCE_GEN_DIR}/peripheral_irqs.h") configure_file("${MEM_REGIONS_TEMPLATE}" "${SOURCE_GEN_DIR}/mem_regions.h") -# If a TA config file is provided, we generate a settings file -if (DEFINED TA_CONFIG_FILE) - include(${TA_CONFIG_FILE}) - set(TA_SETTINGS_TEMPLATE ${CMAKE_CURRENT_SOURCE_DIR}/cmake/templates/timing_adapter_settings.template) - configure_file("${TA_SETTINGS_TEMPLATE}" "${SOURCE_GEN_DIR}/timing_adapter_settings.h") -endif() - # 4. Create static library add_library(${PLATFORM_DRIVERS_TARGET} STATIC) +## Include directories - private +target_include_directories(${PLATFORM_DRIVERS_TARGET} + PRIVATE + source) + ## Include directories - public target_include_directories(${PLATFORM_DRIVERS_TARGET} PUBLIC include ${SOURCE_GEN_DIR}) -## Include directories - private -target_include_directories(${PLATFORM_DRIVERS_TARGET} - PRIVATE - source/include) - ## Platform sources target_sources(${PLATFORM_DRIVERS_TARGET} PRIVATE source/device_mps3.c source/timer_mps3.c - source/platform_drivers.c) + source/platform_drivers.c + source/glcd_mps3.c) ## Directory for additional components required by MPS3: if (NOT DEFINED COMPONENTS_DIR) set(COMPONENTS_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../components) endif() -## Platform component: uart -target_sources(${PLATFORM_DRIVERS_TARGET} - PRIVATE - ${COMPONENTS_DIR}/uart_cmsdk/uart_cmsdk.c) -target_include_directories(${PLATFORM_DRIVERS_TARGET} - PUBLIC - ${COMPONENTS_DIR}/uart_cmsdk/include) - -## Platform component: LCD -target_sources(${PLATFORM_DRIVERS_TARGET} - PRIVATE - ${COMPONENTS_DIR}/lcd_mps3/glcd_mps3.c) -target_include_directories(${PLATFORM_DRIVERS_TARGET} - PUBLIC - ${COMPONENTS_DIR}/lcd_mps3/include) - ## This target provides the following definitions for MPS3 specific behaviour ## TODO: We should aim to remove this now with platform refactoring.. target_compile_definitions(${PLATFORM_DRIVERS_TARGET} PUBLIC MPS3_PLATFORM - ACTIVATION_BUF_SRAM_SZ=${ACTIVATION_BUF_SRAM_SZ} - $<$<BOOL:TA_CONFIG_FILE>:TIMING_ADAPTER_AVAILABLE>) + ACTIVATION_BUF_SRAM_SZ=${ACTIVATION_BUF_SRAM_SZ}) + +## Platform component: uart +add_subdirectory(${DEPENDENCY_ROOT_DIR}/core-platform/drivers/uart ${CMAKE_BINARY_DIR}/uart) # Add dependencies: target_link_libraries(${PLATFORM_DRIVERS_TARGET} PUBLIC - log cmsis_device) + log + cmsis_device + ethosu_uart_cmsdk_apb) # If Ethos-U is enabled, we need the driver library too if (ETHOS_U_NPU_ENABLED) - - ## Platform component: Ethos-U initialization - target_sources(${PLATFORM_DRIVERS_TARGET} - PRIVATE - ${COMPONENTS_DIR}/ethosu_npu_init/ethosu_npu_init.c) - target_include_directories(${PLATFORM_DRIVERS_TARGET} - PUBLIC - ${COMPONENTS_DIR}/ethosu_npu_init/include) - - ## Platform component: Ethos-U timing apadpter initialization - target_sources(${PLATFORM_DRIVERS_TARGET} - PRIVATE - ${COMPONENTS_DIR}/ethosu_ta_init/ethosu_ta_init.c) - target_include_directories(${PLATFORM_DRIVERS_TARGET} - PUBLIC - ${COMPONENTS_DIR}/ethosu_ta_init/include) - - if (NOT DEFINED ETHOS_U_NPU_DRIVER_SRC_PATH) - message(FATAL_ERROR "ETHOS_U_NPU_DRIVER_SRC_PATH should" - " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}") - endif() - - # Timing adapter - if (NOT DEFINED ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH) - message(FATAL_ERROR "ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH should" - " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}") - endif() - target_compile_definitions(${PLATFORM_DRIVERS_TARGET} PUBLIC ARM_NPU) - # For the driver, we need to provide the CMSIS_PATH variable - set(CMSIS_PATH ${CMSIS_SRC_PATH} CACHE PATH "Path to CMSIS directory") - add_subdirectory(${ETHOS_U_NPU_DRIVER_SRC_PATH} ${CMAKE_BINARY_DIR}/ethos-u-driver) - add_subdirectory(${ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH} ${CMAKE_BINARY_DIR}/timing-adapter) + ## Platform component: Ethos-U initialization + add_subdirectory(${COMPONENTS_DIR}/ethosu_npu_init ${CMAKE_BINARY_DIR}/ethosu_npu_init) target_link_libraries(${PLATFORM_DRIVERS_TARGET} PUBLIC - ethosu_core_driver - timing_adapter) + ethosu_npu_init_component) - if (NOT DEFINED ETHOS_U_NPU_ID) - set(ETHOS_U_NPU_ID U55) - endif() + if (ETHOS_U_NPU_TIMING_ADAPTER_ENABLED) + ## Platform component: Ethos-U timing adapter initialization + add_subdirectory(${COMPONENTS_DIR}/ethosu_ta_init ${CMAKE_BINARY_DIR}/ethosu_ta_init) - if (NOT DEFINED ETHOS_U_NPU_MEMORY_MODE) - set(ETHOS_U_NPU_MEMORY_MODE Shared_Sram) + target_link_libraries(${PLATFORM_DRIVERS_TARGET} + PUBLIC + ethosu_ta_init_component) + target_compile_definitions(${PLATFORM_DRIVERS_TARGET} + PUBLIC + ETHOS_U_NPU_TIMING_ADAPTER_ENABLED) endif() - if (ETHOS_U_NPU_MEMORY_MODE STREQUAL Sram_Only) - if (ETHOS_U_NPU_ID STREQUAL U55) - set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEM_MODE_SRAM_ONLY") - else () - message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `sram_only` can be used only for Ethos-U55.") - endif () - - elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Shared_Sram) - # Shared Sram can be used for Ethos-U55 and Ethos-U65 - set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM") - - elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Dedicated_Sram) - # Dedicated Sram is used only for Ethos-U65 - if (ETHOS_U_NPU_ID STREQUAL U65) - list(APPEND ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM" "-DETHOS_U_NPU_CACHE_SIZE=${ETHOS_U_NPU_CACHE_SIZE}") - else () - message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `dedicated_sram` can be used only for Ethos-U65.") - endif () - else () - message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode ${ETHOS_U_NPU_MEMORY_MODE}") - endif () - - target_compile_definitions(${PLATFORM_DRIVERS_TARGET} - PUBLIC - ${ETHOS_U_NPU_MEMORY_MODE_FLAG}) endif() # 5. Display status: diff --git a/source/hal/components/lcd_mps3/include/glcd_mps3.h b/source/hal/platform/mps3/include/glcd_mps3.h index 313d4ca..5cb5a54 100644 --- a/source/hal/components/lcd_mps3/include/glcd_mps3.h +++ b/source/hal/platform/mps3/include/glcd_mps3.h @@ -57,7 +57,7 @@ #define ROTATE180 1 /* 1 to rotate the screen for 180 deg. */ #endif -/*------------------------- Speed dependant settings -------------------------*/ +/*------------------------- Speed dependent settings -------------------------*/ /* If processor works on high frequency delay has to be increased, it can be increased by factor 2^N by this constant. */ @@ -66,10 +66,10 @@ /*---------------------- Graphic LCD size definitions ------------------------*/ #if (LANDSCAPE == 1) #define GLCD_WIDTH 320 /* Screen Width (in pixels). */ - #define GLCD_HEIGHT 240 /* Screen Hight (in pixels). */ + #define GLCD_HEIGHT 240 /* Screen Height (in pixels). */ #else #define GLCD_WIDTH 240 /* Screen Width (in pixels). */ - #define GLCD_HEIGHT 320 /* Screen Hight (in pixels). */ + #define GLCD_HEIGHT 320 /* Screen Height (in pixels). */ #endif #define BPP 16 /* Bits per pixel. */ diff --git a/source/hal/platform/mps3/source/device_mps3.h b/source/hal/platform/mps3/source/device_mps3.h new file mode 100644 index 0000000..9447c07 --- /dev/null +++ b/source/hal/platform/mps3/source/device_mps3.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2022 Arm Limited. All rights reserved. + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef DEVICE_MPS3_H +#define DEVICE_MPS3_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdio.h> +#include <stdint.h> + +/** + * @brief Gets the core clock set for MPS3. + * @return Clock value in Hz. + **/ +uint32_t GetMPS3CoreClock(void); + +#ifdef __cplusplus +} +#endif + +#endif /* DEVICE_MPS3_H */ diff --git a/source/hal/components/lcd_mps3/include/font_9x15_h.h b/source/hal/platform/mps3/source/font_9x15_h.h index b8b6bdc..bbfb930 100644 --- a/source/hal/components/lcd_mps3/include/font_9x15_h.h +++ b/source/hal/platform/mps3/source/font_9x15_h.h @@ -125,4 +125,4 @@ const unsigned short Font_9x15_h[] = { }; -#endif /* FONT_9x15_H_H */
\ No newline at end of file +#endif /* FONT_9x15_H_H */ diff --git a/source/hal/components/lcd_mps3/glcd_mps3.c b/source/hal/platform/mps3/source/glcd_mps3.c index 55a6575..9a375f2 100644 --- a/source/hal/components/lcd_mps3/glcd_mps3.c +++ b/source/hal/platform/mps3/source/glcd_mps3.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022 Arm Limited. All rights reserved. + * Copyright (c) 2022 Arm Limited. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -20,6 +20,8 @@ #include "font_9x15_h.h" #include "smm_mps3.h" +#include "peripheral_memmap.h" /* Peripheral memory map definitions. */ + /*-------------- CLCD Controller Internal Register addresses ----------------*/ #define CHAR_COM ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x000)) #define CHAR_DAT ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x004)) diff --git a/source/hal/platform/mps3/source/include/device_mps3.h b/source/hal/platform/mps3/source/include/device_mps3.h deleted file mode 100644 index 445965d..0000000 --- a/source/hal/platform/mps3/source/include/device_mps3.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright (c) 2021-2022 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef DEVICE_MPS3_H -#define DEVICE_MPS3_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "smm_mps3.h" /* Memory map for MPS3. */ - -#include <stdio.h> - -#define PERIF_CLK (25000000) /* Clock source for APB peripherals */ - -typedef struct _CMSDK_UART_TypeDef_ -{ - __IO uint32_t DATA; /* Offset: 0x000 (R/W) Data Register. */ - __IO uint32_t STATE; /* Offset: 0x004 (R/W) Status Register. */ - __IO uint32_t CTRL; /* Offset: 0x008 (R/W) Control Register. */ - - union { - __I uint32_t INTSTATUS; /* Offset: 0x00C (R/ ) Interrupt Status Register. */ - __O uint32_t INTCLEAR; /* Offset: 0x00C ( /W) Interrupt Clear Register. */ - }; - __IO uint32_t BAUDDIV; /* Offset: 0x010 (R/W) Baudrate Divider Register. */ - -} CMSDK_UART_TypeDef; - -#define CMSDK_UART0 ((CMSDK_UART_TypeDef *)CMSDK_UART0_BASE) - -/* CMSDK_UART DATA Register Definitions. */ -#define CMSDK_UART_DATA_Pos 0 /* CMSDK_UART_DATA_Pos: DATA Position. */ -#define CMSDK_UART_DATA_Msk (0xFFul << CMSDK_UART_DATA_Pos) /* CMSDK_UART DATA: DATA Mask. */ - -/* CMSDK_UART STATE Register Definitions. */ -#define CMSDK_UART_STATE_RXOR_Pos 3 /* CMSDK_UART STATE: RXOR Position. */ -#define CMSDK_UART_STATE_RXOR_Msk (0x1ul << CMSDK_UART_STATE_RXOR_Pos) /* CMSDK_UART STATE: RXOR Mask. */ - -#define CMSDK_UART_STATE_TXOR_Pos 2 /* CMSDK_UART STATE: TXOR Position. */ -#define CMSDK_UART_STATE_TXOR_Msk (0x1ul << CMSDK_UART_STATE_TXOR_Pos) /* CMSDK_UART STATE: TXOR Mask. */ - -#define CMSDK_UART_STATE_RXBF_Pos 1 /* CMSDK_UART STATE: RXBF Position. */ -#define CMSDK_UART_STATE_RXBF_Msk (0x1ul << CMSDK_UART_STATE_RXBF_Pos) /* CMSDK_UART STATE: RXBF Mask. */ - -#define CMSDK_UART_STATE_TXBF_Pos 0 /* CMSDK_UART STATE: TXBF Position. */ -#define CMSDK_UART_STATE_TXBF_Msk (0x1ul << CMSDK_UART_STATE_TXBF_Pos ) /* CMSDK_UART STATE: TXBF Mask. */ - -/* CMSDK_UART CTRL Register Definitions. */ -#define CMSDK_UART_CTRL_HSTM_Pos 6 /* CMSDK_UART CTRL: HSTM Position. */ -#define CMSDK_UART_CTRL_HSTM_Msk (0x01ul << CMSDK_UART_CTRL_HSTM_Pos) /* CMSDK_UART CTRL: HSTM Mask. */ - -#define CMSDK_UART_CTRL_RXORIRQEN_Pos 5 /* CMSDK_UART CTRL: RXORIRQEN Position. */ -#define CMSDK_UART_CTRL_RXORIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_RXORIRQEN_Pos) /* CMSDK_UART CTRL: RXORIRQEN Mask. */ - -#define CMSDK_UART_CTRL_TXORIRQEN_Pos 4 /* CMSDK_UART CTRL: TXORIRQEN Position. */ -#define CMSDK_UART_CTRL_TXORIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_TXORIRQEN_Pos) /* CMSDK_UART CTRL: TXORIRQEN Mask. */ - -#define CMSDK_UART_CTRL_RXIRQEN_Pos 3 /* CMSDK_UART CTRL: RXIRQEN Position. */ -#define CMSDK_UART_CTRL_RXIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_RXIRQEN_Pos) /* CMSDK_UART CTRL: RXIRQEN Mask. */ - -#define CMSDK_UART_CTRL_TXIRQEN_Pos 2 /* CMSDK_UART CTRL: TXIRQEN Position. */ -#define CMSDK_UART_CTRL_TXIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_TXIRQEN_Pos) /* CMSDK_UART CTRL: TXIRQEN Mask. */ - -#define CMSDK_UART_CTRL_RXEN_Pos 1 /* CMSDK_UART CTRL: RXEN Position. */ -#define CMSDK_UART_CTRL_RXEN_Msk (0x01ul << CMSDK_UART_CTRL_RXEN_Pos) /* CMSDK_UART CTRL: RXEN Mask. */ - -#define CMSDK_UART_CTRL_TXEN_Pos 0 /* CMSDK_UART CTRL: TXEN Position. */ -#define CMSDK_UART_CTRL_TXEN_Msk (0x01ul << CMSDK_UART_CTRL_TXEN_Pos) /* CMSDK_UART CTRL: TXEN Mask. */ - -/* CMSDK_UART INTSTATUS\INTCLEAR Register Definitions. */ -#define CMSDK_UART_INT_RXORIRQ_Pos 3 /* CMSDK_UART INT: RXORIRQ Position. */ -#define CMSDK_UART_INT_RXORIRQ_Msk (0x01ul << CMSDK_UART_INT_RXORIRQ_Pos) /* CMSDK_UART INT: RXORIRQ Mask. */ - -#define CMSDK_UART_INT_TXORIRQ_Pos 2 /* CMSDK_UART INT: TXORIRQ Position. */ -#define CMSDK_UART_INT_TXORIRQ_Msk (0x01ul << CMSDK_UART_INT_TXORIRQ_Pos) /* CMSDK_UART INT: TXORIRQ Mask. */ - -#define CMSDK_UART_INT_RXIRQ_Pos 1 /* CMSDK_UART INT: RXIRQ Position. */ -#define CMSDK_UART_INT_RXIRQ_Msk (0x01ul << CMSDK_UART_INT_RXIRQ_Pos) /* CMSDK_UART INT: RXIRQ Mask. */ - -#define CMSDK_UART_INT_TXIRQ_Pos 0 /* CMSDK_UART INT: TXIRQ Position. */ -#define CMSDK_UART_INT_TXIRQ_Msk (0x01ul << CMSDK_UART_INT_TXIRQ_Pos) /* CMSDK_UART INT: TXIRQ Mask. */ - -/* CMSDK_UART BAUDDIV Register Definitions. */ -#define CMSDK_UART_BAUDDIV_Pos 0 /* CMSDK_UART BAUDDIV: BAUDDIV Position. */ -#define CMSDK_UART_BAUDDIV_Msk (0xFFFFFul << CMSDK_UART_BAUDDIV_Pos) - -/** - * @brief Gets the core clock set for MPS3. - * @return Clock value in Hz. - **/ -uint32_t GetMPS3CoreClock(void); - -#ifdef __cplusplus -} -#endif - -#endif /* DEVICE_MPS3_H */ diff --git a/source/hal/platform/mps3/source/platform_drivers.c b/source/hal/platform/mps3/source/platform_drivers.c index fc119ab..00afb78 100644 --- a/source/hal/platform/mps3/source/platform_drivers.c +++ b/source/hal/platform/mps3/source/platform_drivers.c @@ -21,14 +21,16 @@ #include "device_mps3.h" /* FPGA level definitions and functions. */ #include "uart_stdout.h" /* stdout over UART. */ +#include "smm_mps3.h" /* Memory map for MPS3. */ + #include <string.h> /* For strncpy */ #if defined(ARM_NPU) #include "ethosu_npu_init.h" -#if defined(TIMING_ADAPTER_AVAILABLE) +#if defined(ETHOS_U_NPU_TIMING_ADAPTER_ENABLED) #include "ethosu_ta_init.h" -#endif /* TIMING_ADAPTER_AVAILABLE */ +#endif /* ETHOS_U_NPU_TIMING_ADAPTER_ENABLED */ #endif /* ARM_NPU */ @@ -56,14 +58,14 @@ int platform_init(void) #if defined(ARM_NPU) -#if defined(TIMING_ADAPTER_AVAILABLE) +#if defined(ETHOS_U_NPU_TIMING_ADAPTER_ENABLED) /* If the platform has timing adapter blocks along with Ethos-U core * block, initialise them here. */ if (0 != (err = arm_ethosu_timing_adapter_init())) { return err; } -#endif /* TIMING_ADAPTER_AVAILABLE */ +#endif /* ETHOS_U_NPU_TIMING_ADAPTER_ENABLED */ int state; diff --git a/source/hal/platform/mps3/source/include/smm_mps3.h b/source/hal/platform/mps3/source/smm_mps3.h index bc93fdf..8d5614a 100644 --- a/source/hal/platform/mps3/source/include/smm_mps3.h +++ b/source/hal/platform/mps3/source/smm_mps3.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022 Arm Limited. All rights reserved. + * Copyright (c) 2022 Arm Limited. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/source/hal/platform/mps3/source/timer_mps3.c b/source/hal/platform/mps3/source/timer_mps3.c index 16ff4cd..6da026f 100644 --- a/source/hal/platform/mps3/source/timer_mps3.c +++ b/source/hal/platform/mps3/source/timer_mps3.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022 Arm Limited. All rights reserved. + * Copyright (c) 2022 Arm Limited. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -18,6 +18,7 @@ #include "log_macros.h" #include "device_mps3.h" +#include "smm_mps3.h" /* Memory map for MPS3. */ static uint64_t cpu_cycle_count = 0; /* 64-bit cpu cycle counter */ diff --git a/source/hal/platform/native/CMakeLists.txt b/source/hal/platform/native/CMakeLists.txt index 0435cf1..0b9fee1 100644 --- a/source/hal/platform/native/CMakeLists.txt +++ b/source/hal/platform/native/CMakeLists.txt @@ -21,7 +21,7 @@ cmake_minimum_required(VERSION 3.15.6) -set(PLATFORM_DRIVERS_TARGET platform-drivers) +set(PLATFORM_DRIVERS_TARGET platform_drivers) project(${PLATFORM_DRIVERS_TARGET} DESCRIPTION "Platform drivers library for native target" diff --git a/source/hal/platform/simple/CMakeLists.txt b/source/hal/platform/simple/CMakeLists.txt index 105fc9b..df4df00 100644 --- a/source/hal/platform/simple/CMakeLists.txt +++ b/source/hal/platform/simple/CMakeLists.txt @@ -20,7 +20,7 @@ ######################################################### cmake_minimum_required(VERSION 3.15.6) -set(PLATFORM_DRIVERS_TARGET platform-drivers) +set(PLATFORM_DRIVERS_TARGET platform_drivers) project(${PLATFORM_DRIVERS_TARGET} DESCRIPTION "Platform drivers library for a generic target" LANGUAGES C CXX ASM) @@ -52,13 +52,6 @@ configure_file("${MEM_PROFILE_TEMPLATE}" "${SOURCE_GEN_DIR}/peripheral_memmap.h" configure_file("${IRQ_PROFILE_TEMPLATE}" "${SOURCE_GEN_DIR}/peripheral_irqs.h") configure_file("${MEM_REGIONS_TEMPLATE}" "${SOURCE_GEN_DIR}/mem_regions.h") -## If a TA config file is provided, we generate a settings file -if (DEFINED TA_CONFIG_FILE) - include(${TA_CONFIG_FILE}) - set(TA_SETTINGS_TEMPLATE ${CMAKE_CURRENT_SOURCE_DIR}/cmake/templates/timing_adapter_settings.template) - configure_file("${TA_SETTINGS_TEMPLATE}" "${SOURCE_GEN_DIR}/timing_adapter_settings.h") -endif() - # 4. Create static library add_library(${PLATFORM_DRIVERS_TARGET} STATIC) @@ -81,101 +74,45 @@ if (NOT DEFINED COMPONENTS_DIR) endif() ## Platform component: uart -target_sources(${PLATFORM_DRIVERS_TARGET} - PRIVATE - ${COMPONENTS_DIR}/uart_pl011/uart_pl011.c) -target_include_directories(${PLATFORM_DRIVERS_TARGET} - PUBLIC - ${COMPONENTS_DIR}/uart_pl011/include) +add_subdirectory(${DEPENDENCY_ROOT_DIR}/core-platform/drivers/uart ${CMAKE_BINARY_DIR}/uart) ## Compile defs target_compile_definitions(${PLATFORM_DRIVERS_TARGET} PUBLIC - ACTIVATION_BUF_SRAM_SZ=${ACTIVATION_BUF_SRAM_SZ} - $<$<BOOL:TA_CONFIG_FILE>:TIMING_ADAPTER_AVAILABLE>) + ACTIVATION_BUF_SRAM_SZ=${ACTIVATION_BUF_SRAM_SZ}) # Add dependencies: target_link_libraries(${PLATFORM_DRIVERS_TARGET} PUBLIC cmsis_device - log) + log + ethosu_uart_pl011) # If Ethos-U is enabled, we need the driver library too if (ETHOS_U_NPU_ENABLED) - ## Platform component: Ethos-U initialization - target_sources(${PLATFORM_DRIVERS_TARGET} - PRIVATE - ${COMPONENTS_DIR}/ethosu_npu_init/ethosu_npu_init.c) - target_include_directories(${PLATFORM_DRIVERS_TARGET} - PUBLIC - ${COMPONENTS_DIR}/ethosu_npu_init/include) - - ## Platform component: Ethos-U timing apadpter initialization - target_sources(${PLATFORM_DRIVERS_TARGET} - PRIVATE - ${COMPONENTS_DIR}/ethosu_ta_init/ethosu_ta_init.c) - target_include_directories(${PLATFORM_DRIVERS_TARGET} - PUBLIC - ${COMPONENTS_DIR}/ethosu_ta_init/include) - - if (NOT DEFINED ETHOS_U_NPU_DRIVER_SRC_PATH) - message(FATAL_ERROR "ETHOS_U_NPU_DRIVER_SRC_PATH should" - " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}") - endif() - - # Timing adapter - if (NOT DEFINED ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH) - message(FATAL_ERROR "ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH should" - " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}") - endif() - target_compile_definitions(${PLATFORM_DRIVERS_TARGET} PUBLIC ARM_NPU) - # For the driver, we need to provide the CMSIS_PATH variable - set(CMSIS_PATH ${CMSIS_SRC_PATH} CACHE PATH "Path to CMSIS directory") - add_subdirectory(${ETHOS_U_NPU_DRIVER_SRC_PATH} ${CMAKE_BINARY_DIR}/ethos-u-driver) - add_subdirectory(${ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH} ${CMAKE_BINARY_DIR}/timing-adapter) + ## Platform component: Ethos-U initialization + add_subdirectory(${COMPONENTS_DIR}/ethosu_npu_init ${CMAKE_BINARY_DIR}/ethosu_npu_init) target_link_libraries(${PLATFORM_DRIVERS_TARGET} PUBLIC - ethosu_core_driver - timing_adapter) + ethosu_npu_init_component) - if (NOT DEFINED ETHOS_U_NPU_ID) - set(ETHOS_U_NPU_ID U55) - endif() + if (ETHOS_U_NPU_TIMING_ADAPTER_ENABLED) + ## Platform component: Ethos-U timing apadpter initialization + add_subdirectory(${COMPONENTS_DIR}/ethosu_ta_init ${CMAKE_BINARY_DIR}/ethosu_ta_init) - if (NOT DEFINED ETHOS_U_NPU_MEMORY_MODE) - set(ETHOS_U_NPU_MEMORY_MODE Shared_Sram) + target_link_libraries(${PLATFORM_DRIVERS_TARGET} + PUBLIC + ethosu_ta_init_component) + target_compile_definitions(${PLATFORM_DRIVERS_TARGET} + PUBLIC + ETHOS_U_NPU_TIMING_ADAPTER_ENABLED) endif() - if (ETHOS_U_NPU_MEMORY_MODE STREQUAL Sram_Only) - if (ETHOS_U_NPU_ID STREQUAL U55) - set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEM_MODE_SRAM_ONLY") - else () - message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `sram_only` can be used only for Ethos-U55.") - endif () - - elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Shared_Sram) - # Shared Sram can be used for Ethos-U55 and Ethos-U65 - set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM") - - elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Dedicated_Sram) - # Dedicated Sram is used only for Ethos-U65 - if (ETHOS_U_NPU_ID STREQUAL U65) - list(APPEND ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM" "-DETHOS_U_NPU_CACHE_SIZE=${ETHOS_U_NPU_CACHE_SIZE}") - else () - message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `dedicated_sram` can be used only for Ethos-U65.") - endif () - else () - message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode ${ETHOS_U_NPU_MEMORY_MODE}") - endif () - - target_compile_definitions(${PLATFORM_DRIVERS_TARGET} - PUBLIC - ${ETHOS_U_NPU_MEMORY_MODE_FLAG}) endif() # 5. Display status: diff --git a/source/hal/platform/simple/include/ethosu_mem_config.h b/source/hal/platform/simple/include/ethosu_mem_config.h deleted file mode 100644 index aa0cfda..0000000 --- a/source/hal/platform/simple/include/ethosu_mem_config.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright (c) 2022 Arm Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef ETHOS_U_NPU_MEM_CONFIG_H -#define ETHOS_U_NPU_MEM_CONFIG_H - -#define ETHOS_U_NPU_MEMORY_MODE_SRAM_ONLY 0 -#define ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM 1 -#define ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM 2 - -#define ETHOS_U_MEM_BYTE_ALIGNMENT 16 - -#ifndef ETHOS_U_NPU_MEMORY_MODE - #define ETHOS_U_NPU_MEMORY_MODE ETHOS_U_MEMORY_MODE_SHARED_SRAM -#endif /* ETHOS_U_NPU_MEMORY_MODE */ - -#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM) - #ifndef ETHOS_U_NPU_CACHE_SIZE - #define ETHOS_U_CACHE_BUF_SZ (393216U) /* See vela doc for reference */ - #else - #define ETHOS_U_CACHE_BUF_SZ ETHOS_U_NPU_CACHE_SIZE - #endif /* ETHOS_U_NPU_CACHE_SIZE */ -#else - #define ETHOS_U_CACHE_BUF_SZ (0U) -#endif /* CACHE_BUF_SZ */ - -/** - * Activation buffer aka tensor arena section name - * We have to place the tensor arena in different region based on the memory config. - **/ -#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM) - #define ACTIVATION_BUF_SECTION section(".bss.NoInit.activation_buf_sram") - #define ACTIVATION_BUF_SECTION_NAME ("SRAM") -#elif (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_SRAM_ONLY) - #define ACTIVATION_BUF_SECTION section(".bss.NoInit.activation_buf_sram") - #define ACTIVATION_BUF_SECTION_NAME ("SRAM") -#elif (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM) - #define ACTIVATION_BUF_SECTION section("activation_buf_dram") - #define CACHE_BUF_SECTION section(".bss.NoInit.ethos_u_cache") - #define ACTIVATION_BUF_SECTION_NAME ("DDR/DRAM") - #define CACHE_BUF_ATTRIBUTE __attribute__((aligned(ETHOS_U_MEM_BYTE_ALIGNMENT), CACHE_BUF_SECTION)) -#endif - -#endif /* ETHOS_U_NPU_MEM_CONFIG_H */ diff --git a/source/hal/platform/simple/source/platform_drivers.c b/source/hal/platform/simple/source/platform_drivers.c index 6a89c61..aae867c 100644 --- a/source/hal/platform/simple/source/platform_drivers.c +++ b/source/hal/platform/simple/source/platform_drivers.c @@ -23,9 +23,9 @@ #if defined(ARM_NPU) #include "ethosu_npu_init.h" -#if defined(TIMING_ADAPTER_AVAILABLE) +#if defined(ETHOS_U_NPU_TIMING_ADAPTER_ENABLED) #include "ethosu_ta_init.h" -#endif /* TIMING_ADAPTER_AVAILABLE */ +#endif /* ETHOS_U_NPU_TIMING_ADAPTER_ENABLED */ #endif /* ARM_NPU */ @@ -45,13 +45,13 @@ int platform_init(void) /* If the platform has timing adapter blocks along with Ethos-U core * block, initialise them here. */ -#if defined(TIMING_ADAPTER_AVAILABLE) +#if defined(ETHOS_U_NPU_TIMING_ADAPTER_ENABLED) int err; if (0 != (err = arm_ethosu_timing_adapter_init())) { return err; } -#endif /* TIMING_ADAPTER_AVAILABLE */ +#endif /* ETHOS_U_NPU_TIMING_ADAPTER_ENABLED */ /* If Arm Ethos-U NPU is to be used, we initialise it here */ if (0 != (state = arm_ethosu_npu_init())) { diff --git a/source/hal/profiles/bare-metal/bsp/retarget.c b/source/hal/profiles/bare-metal/bsp/retarget.c index 9ed3004..ac9b282 100644 --- a/source/hal/profiles/bare-metal/bsp/retarget.c +++ b/source/hal/profiles/bare-metal/bsp/retarget.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. All rights reserved. + * Copyright (c) 2022 Arm Limited. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -64,6 +64,13 @@ const char __stdin_name[] __attribute__((aligned(4))) = "STDIN"; const char __stdout_name[] __attribute__((aligned(4))) = "STDOUT"; const char __stderr_name[] __attribute__((aligned(4))) = "STDERR"; +__attribute__((noreturn)) static void UartEndSimulation(int code) +{ + UartPutc((char) 0x4); // End of simulation + UartPutc((char) code); // Exit code + while(1); +} + void _ttywrch(int ch) { (void)fputc(ch, stdout); } diff --git a/source/hal/profiles/bare-metal/data_acquisition/data_acq.c b/source/hal/profiles/bare-metal/data_acquisition/data_acq.c index b7eba2d..84d80a6 100644 --- a/source/hal/profiles/bare-metal/data_acquisition/data_acq.c +++ b/source/hal/profiles/bare-metal/data_acquisition/data_acq.c @@ -32,7 +32,7 @@ **/ static int get_uart_user_input(char* user_input, int size) { - if (true != GetLine(user_input, size - 1)) { + if (1 != GetLine(user_input, size - 1)) { return 1; } return 0; |